From cc38eef867f006f45b1ff118f5eb760888799a00 Mon Sep 17 00:00:00 2001
From: Wayne Warthen <wwarthen@gmail.com>
Date: Mon, 23 Sep 2019 18:49:33 -0700
Subject: [PATCH] KIO Cleanup

---
 Source/HBIOS/Config/RCZ80_kio.asm | 2 ++
 Source/HBIOS/hbios.asm            | 6 +++---
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/Source/HBIOS/Config/RCZ80_kio.asm b/Source/HBIOS/Config/RCZ80_kio.asm
index d4cbea78..f096c73d 100644
--- a/Source/HBIOS/Config/RCZ80_kio.asm
+++ b/Source/HBIOS/Config/RCZ80_kio.asm
@@ -40,6 +40,8 @@ SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIOCNT		.SET	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 SIO0MODE	.SET	SIOMODE_EZZ80	; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80]
 SIO0BASE	.SET	KIOBASE+$08	; SIO 0: REGISTERS BASE ADR
+SIO0ACLK	.SET	1843200		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BCLK	.SET	1843200		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 ;
 FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm
index 7be689d8..081a67cd 100644
--- a/Source/HBIOS/hbios.asm
+++ b/Source/HBIOS/hbios.asm
@@ -995,7 +995,7 @@ HB_CPU1:
 #IF (KIOENABLE)
 	LD	A,%11111001	; RESET ALL DEVICES, SET DAISYCHAIN
 	OUT	(KIOBASE+$0E),A	; DO IT
-	CALL	DLY64		; WAIT A BIT FOR RESET TO COMPLETE
+	;CALL	DLY64		; WAIT A BIT FOR RESET TO COMPLETE
 #ENDIF  
 ;
 ; SETUP INTERRUPT VECTORS, AS APPROPRIATE
@@ -1158,7 +1158,7 @@ HB_CPU1:
 ;
 ; FOR NOW, THIS IS SPECIFICALLY FOR A CTC TO DRIVE AN SIO
 ; AT 1:1 USING CTC CHANNELS A & B.  IN OTHER WORDS, IT JUST
-; PASSES THE INCOMING TRIGGER OUT AT 1:1.  NO INTERRUPTS.
+; PASSES THE INCOMING TRIGGER OUT AT 1:1.
 ;
   #IF (CTCENABLE == TRUE)
 ;
@@ -1206,7 +1206,7 @@ HB_CPU1:
 	LD	A,0
 	OUT	(CTCA),A		; SETUP CTC BASE INT VECTOR
 ;
-	; CTCC IS SLAVED (WIRED) TO TO CTCD TO ACT AS A PRESCALER
+	; CTCC IS SLAVED (WIRED) TO CTCD TO ACT AS A PRESCALER
 	; CONFIGURE CHANNEL D FOR 50HZ PERIODIC INTERRUPTS
 	; CTC CLK = 1,843,200HZ
 	; CTCC TIME CONSTANT = 256