From 9e5f7331b15e11da54c582c2698bfb0ad0d7324f Mon Sep 17 00:00:00 2001
From: b1ackmai1er <39449559+b1ackmai1er@users.noreply.github.com>
Date: Sat, 18 May 2019 15:45:24 +0800
Subject: [PATCH 1/2] Add  N8 Beep

---
 Source/HBIOS/ay.asm     | 6 ++++++
 Source/HBIOS/cfg_n8.asm | 7 ++++++-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/Source/HBIOS/ay.asm b/Source/HBIOS/ay.asm
index 0e0b657b..7c95df6e 100644
--- a/Source/HBIOS/ay.asm
+++ b/Source/HBIOS/ay.asm
@@ -4,9 +4,15 @@
 ; WILL ALSO WORK WITH YM2149
 ;======================================================================
 ;
+#IF (PLATFORM == PLT_N8)
+AY_RSEL		.EQU	N8_PSG+0
+AY_RDAT		.EQU	N8_PSG+1
+AY_ACR		.EQU	N8_DEFACR
+#ELSE
 AY_RSEL		.EQU	$9A
 AY_RDAT		.EQU	$9B
 AY_ACR		.EQU	$9C
+#ENDIF
 AY_R0CHAP	.EQU	$00
 AY_R1CHAP	.EQU	$01
 AY_R2CHBP	.EQU	$02
diff --git a/Source/HBIOS/cfg_n8.asm b/Source/HBIOS/cfg_n8.asm
index 9542eb4a..983b7d1b 100644
--- a/Source/HBIOS/cfg_n8.asm
+++ b/Source/HBIOS/cfg_n8.asm
@@ -6,6 +6,7 @@
 ; BUILD CONFIGURATION OPTIONS
 ;
 CPUOSC		.EQU	18432000	; CPU OSC FREQ
+MEMMGR		.EQU	MM_N8		; MM_NONE, MM_SBC, MM_Z2, MM_N8, MM_Z180
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE)
 INTMODE		.EQU	2		; 0=NONE, 1=INT MODE 1, 2=INT MODE 2
@@ -35,7 +36,7 @@ TMSENABLE	.EQU	TRUE		; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT
 VGAENABLE	.EQU	FALSE		; TRUE FOR VGA VIDEO/KBD SUPPORT
 ;
 SPKENABLE	.EQU	FALSE		; TRUE FOR RTC LATCH IOBIT SOUND
-AYENABLE	.EQU	FALSE		; TRUE FOR AY PSG SOUND
+AYENABLE	.EQU	TRUE		; TRUE FOR AY PSG SOUND
 ;
 MDENABLE	.EQU	TRUE		; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED)
 MDTRACE		.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE)
@@ -91,3 +92,7 @@ BOOT_DEFAULT	.EQU	'Z'		; SELECTION TO INVOKE AT TIMEOUT
 Z180_CLKDIV	.EQU	1		; 0=OSC/2, 1=OSC, 2=OSC*2
 Z180_MEMWAIT	.EQU	1		; MEMORY WAIT STATES TO INSERT (0-3)
 Z180_IOWAIT	.EQU	3		; IO WAIT STATES TO INSERT (0-3)
+;
+PIO_4P		.EQU	FALSE		; TRUE FOR ECB-4PIO PIO SUPPORT
+PIO_ZP		.EQU	FALSE		; TRUE FOR ECB-ZILOG PERIPHERALS BOARD
+PPI_SBC		.EQU	FALSE		; TRUE FOR SBC V2 8255 (IF NOT BEING USED FOR PPIDE)

From 346b190f97008e86bd42e6758cd955e4a57f8a65 Mon Sep 17 00:00:00 2001
From: Wayne Warthen <wwarthen@gmail.com>
Date: Fri, 24 May 2019 18:13:21 -0700
Subject: [PATCH 2/2] Minor Cleanup

---
 Doc/ChangeLog.txt      |  1 +
 Source/HBIOS/hbios.asm | 67 +++++++++++++++++++++++++++++++-----------
 2 files changed, 51 insertions(+), 17 deletions(-)

diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt
index 5c572920..634fd0ae 100644
--- a/Doc/ChangeLog.txt
+++ b/Doc/ChangeLog.txt
@@ -29,6 +29,7 @@ Version 2.9.1
 - WBW: Support LBA style access in floppy driver
 - WBW: Added beta version of FAT filesystem utility (copy, dir, del, ren)
 - SCC: Added support for native memory addressing on Z180-based RC2014
+- PMS: Dynamically discover and display processor type at boot
 
 Version 2.9.0
 -------------
diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm
index d59ccfb4..e8b74a06 100644
--- a/Source/HBIOS/hbios.asm
+++ b/Source/HBIOS/hbios.asm
@@ -968,6 +968,46 @@ HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 	CALL	DSKY_SHOWSEG
 #ENDIF
 ;
+; DISCOVER CPU TYPE
+;
+; THIS CODE IS DERIVED FROM UNA BY JOHN COFFMAN
+;
+;	0: Z80
+;	1: Z80180 - ORIGINAL Z180 IDENTICAL TO HD64180
+;	2: Z8S180 - ORIGINAL S-CLASS, REV. K, AKA SL1960, NO ASCI BRG
+;	3: Z8S180 - REVISED S-CLASS, REV. N, W/ ASCI BRG
+;
+	LD	HL,0		; L = 0 MEANS Z80
+;
+#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4) | (PLATFORM == PLT_RCZ180))
+;
+	; TEST FOR ORIGINAL Z180 USING MLT
+	LD	DE,$0506	; 5 X 6
+	MLT	DE		; DE = 30 IF Z180
+	LD	A,E		; CHECK IF MULTIPLY HAPPENED
+	CP	30
+	JR	NZ,HB_CPU1	; IT IS A Z80 IF != 30
+	INC	L		; FLAG Z80180 OR BETTER
+;
+	; TEST FOR OLDER S-CLASS
+        IN0     A,(Z180_CCR)	; SUPPOSEDLY ONLY ON S-CLASS
+        INC     A		; FF -> 0
+	JR	Z,HB_CPU1
+	INC	L		; FLAG Z8S180 REV K (SL1960) OR BETTER
+;
+	; TEST FOR NEWER S-CLASS
+        OUT0    (Z180_ASTC1L),D	; D = 0 AT THIS POINT
+        IN0     A,(Z180_ASTC1L)	; COUNTER REG
+        INC     A		; FF -> 0
+	JR	Z,HB_CPU1
+	INC	L		; FLAG Z8S180 REV N W/ ASCI BRG
+;
+#ENDIF
+;
+HB_CPU1:
+	LD	A,L
+	LD	(HB_CPUTYPE),A
+;
 ; PERFORM DYNAMIC CPU SPEED DERIVATION
 ;
 	CALL	HB_CPUSPD		; CPU SPEED DETECTION
@@ -1253,23 +1293,13 @@ PSCNX	.EQU	$ + 1
 	LD	HL,(CB_CPUKHZ)
 	CALL	PRTD3M			; PRINT AS DECIMAL WITH 3 DIGIT MANTISSA
 	PRTS("MHz$")
+;
 #IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4) | (PLATFORM == PLT_RCZ180))
-	LD	L,1			; flag Z180
-	LD	D,0
-	OUT0	(Z180_ASTC1L),D		; D = 0 at this point
-	IN0	A,(Z180_FRC)		; supposedly only on S-class
-	INC	A			; FF or 00 -> 0 or 1 (weak S-class or higher)
-	ADD	A,L
-	LD	L,A			; result to L and A
-	IN0	A,(Z180_ASTC1L)		; counter reg
-	INC	A			; FF or 00 -> 0 or 1 (super-S)
-	ADD	A,L
-	LD	L,A			; 1 means Z180 - 80180
-	LD	A,$30			; 2 means Z180 S-class, SL1960 version
-	ADD	A,L			; 3 means Z180 advanced S-class, with Baud Rate Generator
-	PRTS(" Type: $")
-	CALL	COUT			; Courtesy John Coffman MK IV UnaBIOS
-	PRTS(", IO=0x$")
+	LD	A,(HB_CPUTYPE)		; GET CPU TYPE
+	PRTS(" REV=$")
+	ADD	A,$30			; MAKE DISPLAYABLE DIGIT
+	CALL	COUT
+	PRTS(" IO=0x$")
 	LD	A,Z180_BASE
 	CALL	PRTHEXBYTE
 #ENDIF
@@ -1930,7 +1960,8 @@ SYS_GETBOOTINFO:
 ;     DE: CPU SPEED IN KHZ
 ;
 SYS_GETCPUINFO:
-	LD	H,0			; NOT YET DEFINED
+	LD	A,(HB_CPUTYPE)
+	LD	H,A
 	LD	A,(CB_CPUMHZ)
 	LD	L,A
 	LD	DE,(CB_CPUKHZ)
@@ -3593,6 +3624,8 @@ HEAPCURB	.DW	0		; MARK HEAP ADDRESS AFTER INITIALIZATION
 ;
 HB_TICKS	.FILL	4,0		; 32 BIT TICK COUNTER
 ;
+HB_CPUTYPE	.DB	0		; 0=Z80, 1=80180, 2=SL1960, 3=ASCI BRG
+;
 STR_BANNER	.DB	"RetroBrew HBIOS v", BIOSVER, ", ", TIMESTAMP, "$"
 STR_PLATFORM	.DB	PLATFORM_NAME, "$"
 STR_SWITCH	.DB	"*** Activating CRT Console ***$"