mirror of
https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 14:11:48 -06:00
UART Driver Update
- Some newer/multi-port UART chips now use MCR:3 to activate the interrupt pin(s), otherwise tri-state. This update sets MCR:3 in all cases. - Added UARTDUAL config variable that enables detection of a dual UART chip at 0x80 for MBC platform. - Fixed a typo in TastyBasic Build script.
This commit is contained in:
@@ -119,6 +119,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
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UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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;
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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;
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@@ -149,6 +149,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
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UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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;
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
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@@ -112,6 +112,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
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UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU TRUE ; UART: AUTO-DETECT DUAL UART
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;
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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;
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@@ -118,6 +118,7 @@ UARTCAS .EQU TRUE ; UART: AUTO-DETECT ECB CASSETTE UART
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UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU TRUE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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;
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ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
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@@ -120,6 +120,7 @@ UARTCAS .EQU TRUE ; UART: AUTO-DETECT ECB CASSETTE UART
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UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU TRUE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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;
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ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
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@@ -121,6 +121,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
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UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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;
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ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
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@@ -126,6 +126,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
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UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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;
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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;
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@@ -120,6 +120,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
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UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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;
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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;
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@@ -112,6 +112,7 @@ UARTCAS .EQU TRUE ; UART: AUTO-DETECT ECB CASSETTE UART
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UARTMFP .EQU TRUE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU TRUE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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;
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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;
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@@ -116,6 +116,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
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UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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;
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ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
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@@ -99,6 +99,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
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UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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;
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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;
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@@ -110,6 +110,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
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UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
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UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
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UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
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UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
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;
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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;
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@@ -58,6 +58,7 @@ UARTCBASE .EQU $80
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UARTMBASE .EQU $48
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UART4BASE .EQU $C0
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UARTRBASE .EQU $A0
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UARTDBASE .EQU $80
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;
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#IF (UARTINTS)
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;
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@@ -557,6 +558,16 @@ UART_INITDEV1A:
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LD A,(IY+5) ; GET CONFIG BYTE
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AND ~$1F ; REMOVE ENCODED BAUD RATE BITS
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OR $03 ; FORCE RTS & DTR
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;
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; SOME NEWER UARTS USE MCR:3 TO ACTIVATE THE INTERRUPT LINE.
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; ALTHOUGH OTHER UARTS USE MCR:3 TO CONTROL A GPIO LINE CALLED
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; OUT2, NO ROMWBW HARDWARE USES THIS GPIO LINE. SO, HERE, WE
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; JUST SET MCR:3 TO ACTIVATE THE INTERRUPT LINE. NOTE THAT
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; EVEN IF WE ARE NOT USING INTERRUPTS FOR THIS UART, THE
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; INTERRUPT LINE MUST STILL BE ACTIVATED SO THAT IT WILL
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; PRESENT A DEASSERTED CONDITION TO THE CPU. OTHERWISE, THE
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; INTERRUPT LINE MAY BE LEFT FLOATING WHICH IS DEFINITELY BAD.
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OR $08 ; ACTIVATE INT LINE
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;
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; THE MCR REGISTER AFE BIT WILL NORMALLY BE SET/RESET BY THE
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; VALUE OF THE CONFIG BYTE. HOWEVER, IF THE CHIP IS NOT AFC CAPABLE
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@@ -1058,6 +1069,22 @@ UART_CFG_MFP:
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.DW UARTCFG ; LINE CONFIGURATION
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.DW 0 ; SHOULD NEVER NEED INT HANDLER
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#ENDIF
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#IF (UARTDUAL)
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; DUAL UART CHANNEL A
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT)
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.DB 0 ; UART TYPE
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.DB UARTDBASE ; IO PORT BASE (RBR, THR)
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.DB UARTDBASE + UART_LSR ; LINE STATUS PORT (LSR)
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.DW UARTCFG ; LINE CONFIGURATION
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.DW 0 ; SHOULD NEVER NEED INT HANDLER
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; DUAL UART CHANNEL B
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT)
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.DB 0 ; UART TYPE
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.DB UARTDBASE+8 ; IO PORT BASE (RBR, THR)
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.DB UARTDBASE+8 + UART_LSR ; LINE STATUS PORT (LSR)
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.DW UARTCFG ; LINE CONFIGURATION
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.DW 0 ; SHOULD NEVER NEED INT HANDLER
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#ENDIF
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;
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UART_CNT .EQU ($ - UART_CFG) / 8
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;
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@@ -7,7 +7,7 @@ set PATH=%TOOLS%\tasm32;%PATH%
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set TASMTABS=%TOOLS%\tasm32
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# git@github.com:dimitrit/tastybasic.git; commit a86d7e7; (HEAD -> master, tag: v0.3.0)
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:: git@github.com:dimitrit/tastybasic.git; commit a86d7e7; (HEAD -> master, tag: v0.3.0)
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set VER=v0.3.0
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tasm -80 -g3 -fFF -dROMWBW -d"VERSION \"%VER%\"" tastybasic.asm tastybasic.bin tastybasic.bin.lst
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@@ -2,4 +2,4 @@
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#DEFINE RMN 1
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#DEFINE RUP 1
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#DEFINE RTP 0
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#DEFINE BIOSVER "3.1.1-pre.136"
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#DEFINE BIOSVER "3.1.1-pre.137"
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@@ -3,5 +3,5 @@ rmn equ 1
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rup equ 1
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rtp equ 0
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biosver macro
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db "3.1.1-pre.136"
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db "3.1.1-pre.137"
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endm
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