UART Driver Update

- Some newer/multi-port UART chips now use MCR:3 to activate the interrupt pin(s), otherwise tri-state.  This update sets MCR:3 in all cases.
- Added UARTDUAL config variable that enables detection of a dual UART chip at 0x80 for MBC platform.
- Fixed a typo in TastyBasic Build script.
This commit is contained in:
Wayne Warthen
2021-11-03 15:28:59 -07:00
parent 662b679fdc
commit d5962681f1
16 changed files with 42 additions and 3 deletions

View File

@@ -119,6 +119,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;

View File

@@ -149,6 +149,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS

View File

@@ -112,6 +112,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU TRUE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;

View File

@@ -118,6 +118,7 @@ UARTCAS .EQU TRUE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU TRUE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS

View File

@@ -120,6 +120,7 @@ UARTCAS .EQU TRUE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU TRUE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS

View File

@@ -121,6 +121,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS

View File

@@ -126,6 +126,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;

View File

@@ -120,6 +120,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;

View File

@@ -112,6 +112,7 @@ UARTCAS .EQU TRUE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU TRUE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU TRUE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;

View File

@@ -116,6 +116,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS

View File

@@ -99,6 +99,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;

View File

@@ -110,6 +110,7 @@ UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;

View File

@@ -58,6 +58,7 @@ UARTCBASE .EQU $80
UARTMBASE .EQU $48
UART4BASE .EQU $C0
UARTRBASE .EQU $A0
UARTDBASE .EQU $80
;
#IF (UARTINTS)
;
@@ -557,6 +558,16 @@ UART_INITDEV1A:
LD A,(IY+5) ; GET CONFIG BYTE
AND ~$1F ; REMOVE ENCODED BAUD RATE BITS
OR $03 ; FORCE RTS & DTR
;
; SOME NEWER UARTS USE MCR:3 TO ACTIVATE THE INTERRUPT LINE.
; ALTHOUGH OTHER UARTS USE MCR:3 TO CONTROL A GPIO LINE CALLED
; OUT2, NO ROMWBW HARDWARE USES THIS GPIO LINE. SO, HERE, WE
; JUST SET MCR:3 TO ACTIVATE THE INTERRUPT LINE. NOTE THAT
; EVEN IF WE ARE NOT USING INTERRUPTS FOR THIS UART, THE
; INTERRUPT LINE MUST STILL BE ACTIVATED SO THAT IT WILL
; PRESENT A DEASSERTED CONDITION TO THE CPU. OTHERWISE, THE
; INTERRUPT LINE MAY BE LEFT FLOATING WHICH IS DEFINITELY BAD.
OR $08 ; ACTIVATE INT LINE
;
; THE MCR REGISTER AFE BIT WILL NORMALLY BE SET/RESET BY THE
; VALUE OF THE CONFIG BYTE. HOWEVER, IF THE CHIP IS NOT AFC CAPABLE
@@ -1058,6 +1069,22 @@ UART_CFG_MFP:
.DW UARTCFG ; LINE CONFIGURATION
.DW 0 ; SHOULD NEVER NEED INT HANDLER
#ENDIF
#IF (UARTDUAL)
; DUAL UART CHANNEL A
.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT)
.DB 0 ; UART TYPE
.DB UARTDBASE ; IO PORT BASE (RBR, THR)
.DB UARTDBASE + UART_LSR ; LINE STATUS PORT (LSR)
.DW UARTCFG ; LINE CONFIGURATION
.DW 0 ; SHOULD NEVER NEED INT HANDLER
; DUAL UART CHANNEL B
.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT)
.DB 0 ; UART TYPE
.DB UARTDBASE+8 ; IO PORT BASE (RBR, THR)
.DB UARTDBASE+8 + UART_LSR ; LINE STATUS PORT (LSR)
.DW UARTCFG ; LINE CONFIGURATION
.DW 0 ; SHOULD NEVER NEED INT HANDLER
#ENDIF
;
UART_CNT .EQU ($ - UART_CFG) / 8
;

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@@ -7,7 +7,7 @@ set PATH=%TOOLS%\tasm32;%PATH%
set TASMTABS=%TOOLS%\tasm32
# git@github.com:dimitrit/tastybasic.git; commit a86d7e7; (HEAD -> master, tag: v0.3.0)
:: git@github.com:dimitrit/tastybasic.git; commit a86d7e7; (HEAD -> master, tag: v0.3.0)
set VER=v0.3.0
tasm -80 -g3 -fFF -dROMWBW -d"VERSION \"%VER%\"" tastybasic.asm tastybasic.bin tastybasic.bin.lst

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@@ -2,4 +2,4 @@
#DEFINE RMN 1
#DEFINE RUP 1
#DEFINE RTP 0
#DEFINE BIOSVER "3.1.1-pre.136"
#DEFINE BIOSVER "3.1.1-pre.137"

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@@ -3,5 +3,5 @@ rmn equ 1
rup equ 1
rtp equ 0
biosver macro
db "3.1.1-pre.136"
db "3.1.1-pre.137"
endm