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S100 FPGA Z80 Printer Driver Fixes

- Printer driver was showing port as NOT PRESENT even though it is always present.
pull/609/head v3.6.0-dev.20
Wayne Warthen 5 months ago
parent
commit
d7dc9aafa4
No known key found for this signature in database GPG Key ID: 8B34ED29C07EEB0A
  1. 44
      Source/HBIOS/espsd.asm
  2. 5
      Source/HBIOS/hbios.asm
  3. 37
      Source/HBIOS/lpt.asm
  4. 2
      Source/ver.inc
  5. 2
      Source/ver.lib

44
Source/HBIOS/espsd.asm

@ -112,14 +112,14 @@ ESPSD_STNOTRDY .EQU -4
; ;
; PER DEVICE DATA OFFSETS IN CFG BLOCK ; PER DEVICE DATA OFFSETS IN CFG BLOCK
; ;
ESPSD_DEV .EQU 0 ; OFFSET OF DEVICE NUMBER (BYTE)
ESPSD_ROLE .EQU 1 ; 0=PRIMARY, 1=SECONDARY
ESPSD_IOBASE .EQU 2 ; IO BASE ADDRESS (BYTE)
ESPSD_STAT .EQU 3 ; LAST STATUS (BYTE)
ESPSD_MEDCAP .EQU 4 ; MEDIA CAPACITY (DWORD)
ESPSD_LBA .EQU 8 ; OFFSET OF LBA (DWORD)
;
ESPSD_CFGSIZ .EQU 12 ; SIZE OF CFG TBL ENTRIES
ESPSD_DEV .EQU 0 ; OFFSET OF DEVICE NUMBER (BYTE)
ESPSD_ROLE .EQU 1 ; 0=PRIMARY, 1=SECONDARY
ESPSD_IOBASE .EQU 2 ; IO BASE ADDRESS (BYTE)
ESPSD_STAT .EQU 3 ; LAST STATUS (BYTE)
ESPSD_MEDCAP .EQU 4 ; MEDIA CAPACITY (DWORD)
ESPSD_LBA .EQU 8 ; OFFSET OF LBA (DWORD)
;
ESPSD_CFGSIZ .EQU 12 ; SIZE OF CFG TBL ENTRIES
; ;
ESPSD_CFGTBL: ESPSD_CFGTBL:
; ;
@ -205,7 +205,7 @@ ESPSD_INIT:
; ;
XOR A ; ZERO ACCUM XOR A ; ZERO ACCUM
LD (ESPSD_DEVNUM),A ; INIT DEV UNIT NUM FOR DYNAMIC ASSIGNMENT LD (ESPSD_DEVNUM),A ; INIT DEV UNIT NUM FOR DYNAMIC ASSIGNMENT
LD IY,ESPSD_CFGTBL ; POINT TO START OF CONFIG TABLE
LD IY,ESPSD_CFGTBL ; POINT TO START OF CONFIG TABLE
; ;
ESPSD_INIT1: ESPSD_INIT1:
LD A,(IY) ; LOAD FIRST BYTE TO CHECK FOR END LD A,(IY) ; LOAD FIRST BYTE TO CHECK FOR END
@ -216,14 +216,14 @@ ESPSD_INIT1:
; ;
ESPSD_INIT2: ESPSD_INIT2:
CALL NEWLINE ; FORMATTING CALL NEWLINE ; FORMATTING
PRTS("ESPSD:$") ; TAG
PRTS("ESPSD:$") ; TAG
; ;
PRTS(" IO=0x$") ; LABEL FOR IO ADDRESS PRTS(" IO=0x$") ; LABEL FOR IO ADDRESS
LD A,(IY+ESPSD_IOBASE) ; GET IO BASE ADDRES LD A,(IY+ESPSD_IOBASE) ; GET IO BASE ADDRES
CALL PRTHEXBYTE ; DISPLAY IT CALL PRTHEXBYTE ; DISPLAY IT
; ;
BIT 0,(IY+ESPSD_ROLE) ; GET ROLE BIT BIT 0,(IY+ESPSD_ROLE) ; GET ROLE BIT
JR NZ,ESPSD_INIT2A ; JUMP IF SECONDARY
JR NZ,ESPSD_INIT2A ; JUMP IF SECONDARY
PRTS(" PRIMARY$") ; SHOW PRIMATY PRTS(" PRIMARY$") ; SHOW PRIMATY
JR ESPSD_INIT2B ; JUMP AHEAD JR ESPSD_INIT2B ; JUMP AHEAD
ESPSD_INIT2A: ESPSD_INIT2A:
@ -238,7 +238,7 @@ ESPSD_INIT3:
CALL ESPSD_INIT5 ; REGISTER & INIT DEVICE CALL ESPSD_INIT5 ; REGISTER & INIT DEVICE
; ;
ESPSD_INIT4: ESPSD_INIT4:
LD DE,ESPSD_CFGSIZ ; SIZE OF CFG TABLE ENTRY
LD DE,ESPSD_CFGSIZ ; SIZE OF CFG TABLE ENTRY
ADD IY,DE ; BUMP POINTER ADD IY,DE ; BUMP POINTER
JP ESPSD_INIT1 ; AND LOOP JP ESPSD_INIT1 ; AND LOOP
; ;
@ -261,7 +261,7 @@ ESPSD_INIT5:
#ENDIF #ENDIF
RET NZ RET NZ
; ;
CALL ESPSD_PRTPREFIX ; TAG FOR ACTIVE DEVICE
CALL ESPSD_PRTPREFIX ; TAG FOR ACTIVE DEVICE
; ;
; PRINT STORAGE CAPACITY (BLOCK COUNT) ; PRINT STORAGE CAPACITY (BLOCK COUNT)
PRTS(" BLOCKS=0x$") ; PRINT FIELD LABEL PRTS(" BLOCKS=0x$") ; PRINT FIELD LABEL
@ -304,7 +304,7 @@ ESPSD_FNTBL:
ESPSD_VERIFY: ESPSD_VERIFY:
ESPSD_FORMAT: ESPSD_FORMAT:
ESPSD_DEFMED: ESPSD_DEFMED:
SYSCHKERR(ERR_NOTIMPL) ; NOT IMPLEMENTED
SYSCHKERR(ERR_NOTIMPL) ; NOT IMPLEMENTED
RET RET
; ;
; ;
@ -418,7 +418,7 @@ ESPSD_GEOM:
;;;CALL COUT ;;;CALL COUT
; FOR LBA, WE SIMULATE CHS ACCESS USING 16 HEADS AND 16 SECTORS ; FOR LBA, WE SIMULATE CHS ACCESS USING 16 HEADS AND 16 SECTORS
; RETURN HS:CC -> DE:HL, SET HIGH BIT OF D TO INDICATE LBA CAPABLE ; RETURN HS:CC -> DE:HL, SET HIGH BIT OF D TO INDICATE LBA CAPABLE
CALL ESPSD_CAP ; GET TOTAL BLOCKS IN DE:HL, BLOCK SIZE TO BC
CALL ESPSD_CAP ; GET TOTAL BLOCKS IN DE:HL, BLOCK SIZE TO BC
LD L,H ; DIVIDE BY 256 FOR # TRACKS LD L,H ; DIVIDE BY 256 FOR # TRACKS
LD H,E ; ... HIGH BYTE DISCARDED, RESULT IN HL LD H,E ; ... HIGH BYTE DISCARDED, RESULT IN HL
LD D,16 | $80 ; HEADS / CYL = 16, SET LBA CAPABILITY BIT LD D,16 | $80 ; HEADS / CYL = 16, SET LBA CAPABILITY BIT
@ -637,7 +637,7 @@ ESPSD_BLKWRITE1:
LD A,E ; RESULT TO ACCUM LD A,E ; RESULT TO ACCUM
OR A ; SET FLAGS OR A ; SET FLAGS
RET Z ; GOOD RETURN RET Z ; GOOD RETURN
LD A,ESPSD_STIOERR ; CALL THIS AN IO ERROR
LD A,ESPSD_STIOERR ; CALL THIS AN IO ERROR
OR A ; SET FLAGS OR A ; SET FLAGS
RET ; DONE RET ; DONE
; ;
@ -649,7 +649,7 @@ ESPSD_BLKWRITE1:
; ;
ESPSD_CMD: ESPSD_CMD:
PUSH DE PUSH DE
LD E,$33
LD E,$33 ; COMMAND PREFIX BYTE
CALL ESPSD_PUTBYTE CALL ESPSD_PUTBYTE
POP DE POP DE
RET NZ RET NZ
@ -659,7 +659,7 @@ ESPSD_CMD:
; ;
ESPSD_CMD_SLOW: ESPSD_CMD_SLOW:
PUSH DE PUSH DE
LD E,$33
LD E,$33 ; COMMAND PREFIX BYTE
CALL ESPSD_PUTBYTE_SLOW CALL ESPSD_PUTBYTE_SLOW
POP DE POP DE
RET NZ RET NZ
@ -699,7 +699,9 @@ ESPSD_PUTBYTE2:
; ;
ESPSD_PUTBYTE_SLOW: ESPSD_PUTBYTE_SLOW:
PUSH HL PUSH HL
LD HL,50 * CPUMHZ ; CPU SPEED SCALED TIMEOUT
;;;LD HL,50 * CPUMHZ ; CPU SPEED SCALED TIMEOUT
LD HL,100 * CPUMHZ ; CPU SPEED SCALED TIMEOUT
;;;LD HL,1000 * CPUMHZ ; CPU SPEED SCALED TIMEOUT
;;;LD HL,0 ; *DEBUG* ;;;LD HL,0 ; *DEBUG*
ESPSD_PUTBYTE_SLOW1: ESPSD_PUTBYTE_SLOW1:
PUSH HL PUSH HL
@ -751,7 +753,9 @@ ESPSD_GETBYTE2:
; ;
ESPSD_GETBYTE_SLOW: ESPSD_GETBYTE_SLOW:
PUSH HL PUSH HL
LD HL,50 * CPUMHZ ; CPU SPEED SCALED TIMEOUT
;;;LD HL,50 * CPUMHZ ; CPU SPEED SCALED TIMEOUT
LD HL,100 * CPUMHZ ; CPU SPEED SCALED TIMEOUT
;;;LD HL,1000 * CPUMHZ ; CPU SPEED SCALED TIMEOUT
;;;LD HL,0 ; *DEBUG* ;;;LD HL,0 ; *DEBUG*
ESPSD_GETBYTE_SLOW1: ESPSD_GETBYTE_SLOW1:
PUSH HL PUSH HL

5
Source/HBIOS/hbios.asm

@ -4427,10 +4427,9 @@ HB_DSKREAD:
LD A,C ; GET DISK UNIT NUMBER LD A,C ; GET DISK UNIT NUMBER
LD B,A ; PUT IN B FOR LOOP COUNTER LD B,A ; PUT IN B FOR LOOP COUNTER
INC B ; LOOP ONE EXTRA TIME TO HANDLE UNIT=0 INC B ; LOOP ONE EXTRA TIME TO HANDLE UNIT=0
XOR A ; START WITH ACCUM ZERO
SCF ; ... AND CF SET
LD A,%10000000 ; START WITH HIGH BIT SET
HB_DSKREAD0: HB_DSKREAD0:
RLA ; ROTATE BIT
RLCA ; ROTATE BIT
DJNZ HB_DSKREAD0 ; ... UNTIL IN PROPER LOCATION DJNZ HB_DSKREAD0 ; ... UNTIL IN PROPER LOCATION
LD (HB_DSKBIT),A ; SAVE IT FOR DIAGNOSTICS LD (HB_DSKBIT),A ; SAVE IT FOR DIAGNOSTICS
#ENDIF #ENDIF

37
Source/HBIOS/lpt.asm

@ -13,21 +13,21 @@
; IBM PC STANDARD PARALLEL PORT (SPP): ; IBM PC STANDARD PARALLEL PORT (SPP):
; - NHYODYNE PRINT MODULE ; - NHYODYNE PRINT MODULE
; ;
; PORT 0 (OUTPUT):
; DATA (BASE PORT + 0, OUTPUT):
; ;
; D7 D6 D5 D4 D3 D2 D1 D0 ; D7 D6 D5 D4 D3 D2 D1 D0
; +-------+-------+-------+-------+-------+-------+-------+-------+ ; +-------+-------+-------+-------+-------+-------+-------+-------+
; | PD7 | PD6 | PD5 | PD4 | PD3 | PD2 | PD1 | PD0 | ; | PD7 | PD6 | PD5 | PD4 | PD3 | PD2 | PD1 | PD0 |
; +-------+-------+-------+-------+-------+-------+-------+-------+ ; +-------+-------+-------+-------+-------+-------+-------+-------+
; ;
; PORT 1 (INPUT):
; STATUS (BASE PORT + 1, INPUT):
; ;
; D7 D6 D5 D4 D3 D2 D1 D0 ; D7 D6 D5 D4 D3 D2 D1 D0
; +-------+-------+-------+-------+-------+-------+-------+-------+ ; +-------+-------+-------+-------+-------+-------+-------+-------+
; | /BUSY | /ACK | POUT | SEL | /ERR | 0 | 0 | 0 | ; | /BUSY | /ACK | POUT | SEL | /ERR | 0 | 0 | 0 |
; +-------+-------+-------+-------+-------+-------+-------+-------+ ; +-------+-------+-------+-------+-------+-------+-------+-------+
; ;
; PORT 2 (OUTPUT):
; CONTROL (BASE PORT + 2, OUTPUT):
; ;
; D7 D6 D5 D4 D3 D2 D1 D0 ; D7 D6 D5 D4 D3 D2 D1 D0
; +-------+-------+-------+-------+-------+-------+-------+-------+ ; +-------+-------+-------+-------+-------+-------+-------+-------+
@ -39,21 +39,21 @@
; MG014 STYLE INTERFACE: ; MG014 STYLE INTERFACE:
; - RCBUS MG014 MODULE ; - RCBUS MG014 MODULE
; ;
; PORT 0 (OUTPUT):
; DATA (BASE PORT + 0, OUTPUT):
; ;
; D7 D6 D5 D4 D3 D2 D1 D0 ; D7 D6 D5 D4 D3 D2 D1 D0
; +-------+-------+-------+-------+-------+-------+-------+-------+ ; +-------+-------+-------+-------+-------+-------+-------+-------+
; | PD7 | PD6 | PD5 | PD4 | PD3 | PD2 | PD1 | PD0 | ; | PD7 | PD6 | PD5 | PD4 | PD3 | PD2 | PD1 | PD0 |
; +-------+-------+-------+-------+-------+-------+-------+-------+ ; +-------+-------+-------+-------+-------+-------+-------+-------+
; ;
; PORT 1 (INPUT):
; STATUS (BASE PORT + 1, INPUT):
; ;
; D7 D6 D5 D4 D3 D2 D1 D0 ; D7 D6 D5 D4 D3 D2 D1 D0
; +-------+-------+-------+-------+-------+-------+-------+-------+ ; +-------+-------+-------+-------+-------+-------+-------+-------+
; | | | | /ERR | SEL | POUT | BUSY | /ACK | ; | | | | /ERR | SEL | POUT | BUSY | /ACK |
; +-------+-------+-------+-------+-------+-------+-------+-------+ ; +-------+-------+-------+-------+-------+-------+-------+-------+
; ;
; PORT 2 (OUTPUT):
; CONTROL (BASE PORT + 2, OUTPUT):
; ;
; D7 D6 D5 D4 D3 D2 D1 D0 ; D7 D6 D5 D4 D3 D2 D1 D0
; +-------+-------+-------+-------+-------+-------+-------+-------+ ; +-------+-------+-------+-------+-------+-------+-------+-------+
@ -65,21 +65,21 @@
; S100 STYLE INTERFACE: ; S100 STYLE INTERFACE:
; - S100 FPGA Z80 ; - S100 FPGA Z80
; ;
; BASE I/O PORT (OUTPUT):
; DATA (BASE PORT + 0, OUTPUT):
; ;
; D7 D6 D5 D4 D3 D2 D1 D0 ; D7 D6 D5 D4 D3 D2 D1 D0
; +-------+-------+-------+-------+-------+-------+-------+-------+ ; +-------+-------+-------+-------+-------+-------+-------+-------+
; | PD7 | PD6 | PD5 | PD4 | PD3 | PD2 | PD1 | PD0 | ; | PD7 | PD6 | PD5 | PD4 | PD3 | PD2 | PD1 | PD0 |
; +-------+-------+-------+-------+-------+-------+-------+-------+ ; +-------+-------+-------+-------+-------+-------+-------+-------+
; ;
; STATUS PORT (INPUT, BASE I/O - 1):
; STATUS (BASE PORT + 0, INPUT):
; ;
; D7 D6 D5 D4 D3 D2 D1 D0 ; D7 D6 D5 D4 D3 D2 D1 D0
; +-------+-------+-------+-------+-------+-------+-------+-------+ ; +-------+-------+-------+-------+-------+-------+-------+-------+
; | | | | | | | BUSY | /ACK | ; | | | | | | | BUSY | /ACK |
; +-------+-------+-------+-------+-------+-------+-------+-------+ ; +-------+-------+-------+-------+-------+-------+-------+-------+
; ;
; CONTROL PORT (OUTPUT, BASE I/O - 1):
; CONTROL (BASE PORT - 1, OUTPUT):
; ;
; D7 D6 D5 D4 D3 D2 D1 D0 ; D7 D6 D5 D4 D3 D2 D1 D0
; +-------+-------+-------+-------+-------+-------+-------+-------+ ; +-------+-------+-------+-------+-------+-------+-------+-------+
@ -168,13 +168,18 @@ LPT_IN:
; BYTE OUTPUT ; BYTE OUTPUT
; ;
LPT_OUT: LPT_OUT:
; WAIT WHILE PRINTER IS BUSY
CALL LPT_OST ; READY TO SEND? CALL LPT_OST ; READY TO SEND?
JR Z,LPT_OUT ; LOOP IF NOT JR Z,LPT_OUT ; LOOP IF NOT
;
; SET DATA PORT BITS
LD C,(IY+3) ; PORT 0 (DATA) LD C,(IY+3) ; PORT 0 (DATA)
EZ80_IO EZ80_IO
OUT (C),E ; OUTPUT DATA TO PORT OUT (C),E ; OUTPUT DATA TO PORT
;
; SET STROBE
#IF (LPTMODE == LPTMODE_SPP) #IF (LPTMODE == LPTMODE_SPP)
LD A,%00001101 ; SELECT & STROBE, LEDS OFF
LD A,%00001101 ; SELECT & STROBE, LED OFF
#ENDIF #ENDIF
#IF (LPTMODE == LPTMODE_MG014) #IF (LPTMODE == LPTMODE_MG014)
LD A,%00000100 ; SELECT & STROBE, LED OFF LD A,%00000100 ; SELECT & STROBE, LED OFF
@ -192,6 +197,8 @@ LPT_OUT:
EZ80_IO EZ80_IO
OUT (C),A ; OUTPUT DATA TO PORT OUT (C),A ; OUTPUT DATA TO PORT
CALL DELAY CALL DELAY
;
; CLEAR STROBE
#IF (LPTMODE == LPTMODE_SPP) #IF (LPTMODE == LPTMODE_SPP)
LD A,%00001100 ; SELECT, LEDS OFF LD A,%00001100 ; SELECT, LEDS OFF
#ENDIF #ENDIF
@ -199,11 +206,12 @@ LPT_OUT:
LD A,%00000101 ; SELECT, LED OFF LD A,%00000101 ; SELECT, LED OFF
#ENDIF #ENDIF
#IF (LPTMODE == LPTMODE_S100) #IF (LPTMODE == LPTMODE_S100)
LD A,%11111111 ; STROBE
LD A,%11111111 ; CLEAR STROBE
#ENDIF #ENDIF
EZ80_IO EZ80_IO
OUT (C),A ; OUTPUT DATA TO PORT OUT (C),A ; OUTPUT DATA TO PORT
CALL DELAY CALL DELAY
;
XOR A ; SIGNAL SUCCESS XOR A ; SIGNAL SUCCESS
RET RET
; ;
@ -215,21 +223,19 @@ LPT_IST:
RET ; DONE RET ; DONE
; ;
; OUTPUT STATUS ; OUTPUT STATUS
; 0 = BUSY, 1 = READY
; ;
LPT_OST: LPT_OST:
LD C,(IY+3) ; BASE PORT LD C,(IY+3) ; BASE PORT
#IF ((LPTMODE == LPTMODE_SPP) | (LPTMODE == LPTMODE_MG014)) #IF ((LPTMODE == LPTMODE_SPP) | (LPTMODE == LPTMODE_MG014))
INC C ; SELECT STATUS PORT INC C ; SELECT STATUS PORT
#ENDIF
#IF (LPTMODE == LPTMODE_S100)
DEC C ; SELECT STATUS PORT
#ENDIF #ENDIF
EZ80_IO EZ80_IO
IN A,(C) ; GET STATUS INFO IN A,(C) ; GET STATUS INFO
#IF (LPTMODE == LPTMODE_SPP) #IF (LPTMODE == LPTMODE_SPP)
AND %10000000 ; ISOLATE /BUSY AND %10000000 ; ISOLATE /BUSY
#ENDIF #ENDIF
#IF (LPTMODE == LPTMODE_MG014)
#IF ((LPTMODE == LPTMODE_MG014) | (LPTMODE == LPTMODE_S100))
AND %00000010 ; ISOLATE BUSY AND %00000010 ; ISOLATE BUSY
XOR %00000010 ; INVERT TO READY XOR %00000010 ; INVERT TO READY
#ENDIF #ENDIF
@ -295,6 +301,7 @@ LPT_INITDEV0:
LD A,$FF ; INIT VALUE LD A,$FF ; INIT VALUE
EZ80_IO EZ80_IO
OUT (C),A ; DO IT OUT (C),A ; DO IT
XOR A ; SIGNAL SUCCESS
RET ; RETURN RET ; RETURN
#ENDIF #ENDIF
; ;

2
Source/ver.inc

@ -2,7 +2,7 @@
#DEFINE RMN 6 #DEFINE RMN 6
#DEFINE RUP 0 #DEFINE RUP 0
#DEFINE RTP 0 #DEFINE RTP 0
#DEFINE BIOSVER "3.6.0-dev.19"
#DEFINE BIOSVER "3.6.0-dev.20"
#define rmj RMJ #define rmj RMJ
#define rmn RMN #define rmn RMN
#define rup RUP #define rup RUP

2
Source/ver.lib

@ -3,5 +3,5 @@ rmn equ 6
rup equ 0 rup equ 0
rtp equ 0 rtp equ 0
biosver macro biosver macro
db "3.6.0-dev.19"
db "3.6.0-dev.20"
endm endm

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