|
|
@ -211,10 +211,10 @@ IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O |
|
|
IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER |
|
|
IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER |
|
|
IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER |
|
|
IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER |
|
|
; |
|
|
; |
|
|
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) |
|
|
|
|
|
|
|
|
PPIDEENABLE .EQU TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) |
|
|
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
|
|
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
|
|
PPIDECNT .EQU 1 ; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP |
|
|
PPIDECNT .EQU 1 ; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP |
|
|
PPIDE0BASE .EQU $60 ; PPIDE 0: PPI REGISTERS BASE ADR |
|
|
|
|
|
|
|
|
PPIDE0BASE .EQU $88 ; PPIDE 0: PPI REGISTERS BASE ADR |
|
|
PPIDE0A8BIT .EQU FALSE ; PPIDE 0A (MASTER): 8 BIT XFER |
|
|
PPIDE0A8BIT .EQU FALSE ; PPIDE 0A (MASTER): 8 BIT XFER |
|
|
PPIDE0B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER |
|
|
PPIDE0B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER |
|
|
PPIDE1BASE .EQU $20 ; PPIDE 1: PPI REGISTERS BASE ADR |
|
|
PPIDE1BASE .EQU $20 ; PPIDE 1: PPI REGISTERS BASE ADR |
|
|
|