Update flashfs.asm

Add chip erase error/timeout detection

Source/HBIOS/flashfs.asm

@@ -75,6 +75,8 @@ FF_NXT0:PUSH	BC			; WE DIDN'T MATCH SO POINT
 ;
 FF_NXT2:CALL	PRTSTR			; AFTER SEARCH DISPLAY THE RESULT
 ;
+	CALL	FF_EINIT		; ERASE TEST
+
 	XOR	A			; INIT SUCCEEDED
 	RET
 ;
@@ -114,7 +116,7 @@ FF_I_SZ	.EQU	$-FF_IDENT
 ; ERASE FLASH CHIP.
 ;======================================================================
 ;
-FF_INIT_E:
+FF_EINIT:
 	LD	(FF_STACK),SP		; SAVE STACK
 	LD	HL,(FF_STACK)
 ;
@@ -138,7 +140,7 @@ FF_INIT_E:
 	LD	HL,(FF_STACK)		; RESTORE ORIGINAL 
 	LD	SP,HL			; STACK POSITION
 ;
-	XOR	A
+	LD	A,C			; RETURN WITH STATUS IN A
 	RET
 ;
 ;======================================================================
@@ -146,6 +148,7 @@ FF_INIT_E:
 ; IT SWITCHES THE BOTTOM BANK TO ROM BANK 0 I.E. BOTTOM OF CHIP ADDRESS RANGE.
 ; RETURNS THE BOTTOM BANK TO INITIAL STATE. ERASE COMMAND IS ISSUED TO
 ; THE FLASH CHIP AND THEN TOGGLE BIT IS MONITORED FOR COMPLETION.
+; RETURN C=0 FOR SUCCESS OR C=FF FOR FAILURE.
 ;======================================================================
 ;
 FF_ERASE:
@@ -170,14 +173,27 @@ FF_ERASE:
 	LD	A,$10
 	LD	($5555),A
 ;
-	LD	HL,$5555		; WAIT FOR TOGGLE
-FF_WAIT:LD	A,(HL)			; BIT CHANGE
-	CP	(HL)
-	JR	NZ,FF_WAIT
-	LD	A,(HL)
-	LD	A,(HL)
+	LD	HL,$5555		; DO TWO SUCCESSIVE READS 
+	LD	A,(HL)			; FROM THE SAME FLASH ADDRESS. 
+FF_WT2:	LD	C,(HL)			; IF TOGGLE BIT (BIT 6) 
+	XOR	C			; IS THE SAME ON BOTH READS
+	BIT	6,A			; THEN ERASE IS COMPLETE SO EXIT.
+	JR	Z,FF_WT1		; Z TRUE IF BIT 6=0 I.E. "NO TOGGLE" WAS DETECTED. 
 ;
-	LD	A,B			; RETURN TO ORIGINAL BANK
+	LD	A,C			; OPERATION IS NOT COMPLETE. CHECK TIMEOUT BIT (BIT 5).
+	BIT	5,C			; IF NO TIMEOUT YET THEN LOOP BACK AND KEEP CHECKING TOGGLE STATUS
+	JR	Z,FF_WT2		; IF BIT 5=0 THEN RETRY; NZ TRUE IF BIT 5=1
+;
+	LD	A,(HL)			; WE GOT A TIMOUT. RECHECK TOGGLE BIT IN CASE WE DID COMPLETE 
+	XOR	(HL)			; THE OPERATION. DO TWO SUCCESSIVE READS. ARE THEY THE SAME?
+	BIT	6,A			; IF THEY ARE THEN OPERATION WAS COMPLETED					
+	JR	Z,FF_WT1		; OTHERWISE ERASE OPERATION FAILED OR TIMED OUT.
+;
+	LD	C,$FF			; SET FAIL STATUS
+	JR	FF_WT3
+;
+FF_WT1:	LD	C,0			; SET SUCCESS STATUS
+FF_WT3:	LD	A,B			; RETURN TO ORIGINAL BANK
 	CALL	HBX_BNKSEL		; WHICH IS OUR RAM BIOS COPY
 	HB_EI
 ;
@@ -185,6 +201,79 @@ FF_WAIT:LD	A,(HL)			; BIT CHANGE
 ;
 FF_E_SZ	.EQU	$-FF_ERASE
 ;
+;======================================================================
+; ERASE FLASH SECTOR.
+;======================================================================
+;
+;
+FF_SINIT:
+	LD	(FF_STACK),SP		; SAVE STACK
+	LD	HL,(FF_STACK)
+;
+	LD	BC,FF_S_SZ		; CODE SIZE REQUIRED
+	CCF				; CREATE A RELOCATABLE
+	SBC	HL,BC			; CODE BUFFER IN THE
+	LD	SP,HL			; STACK AREA
+;
+	PUSH	HL			; SAVE THE EXECUTE ADDRESS
+	EX	DE,HL			; PUT EXECUTE / START ADDRESS IN DE
+	LD	HL,FF_ERASE		; COPY OUR RELOCATABLE
+	LDIR				; CODE TO THE BUFFER
+;
+	LD	A,(HB_CURBNK)		; WE ARE STARTING IN HB_CURBNK
+	LD	B,A			; WHICH IS THE RAM COPY OF THE BIOS
+;
+;	SELECT THE CORRECT ROM BANK
+;
+	LD	A,BID_BOOT		; BID_BOOT IS ROM BANK 0
+;
+	POP	HL			; CALL OUR RELOCATABLE CODE
+	CALL	JPHL
+;
+	LD	HL,(FF_STACK)		; RESTORE ORIGINAL 
+	LD	SP,HL			; STACK POSITION
+;
+	XOR	A
+	RET
+;
+;======================================================================
+; ERASE FLASH CHIP SECTOR. THIS CODE IS RELOCATED AND EXECUTED IN THE STACK.
+; IT SWITCHES THE REQUIRED BANK TO THE BOTTOM OF CHIP ADDRESS RANGE.
+; RETURNS THE BOTTOM BANK TO INITIAL STATE. ERASE SECTOR COMMAND IS ISSUED TO
+; THE FLASH CHIP AND THEN TOGGLE BIT IS MONITORED FOR COMPLETION.
+; ON ENTRY HL CONTAINS THE SECTOR TO ERASE.
+;======================================================================
+;
+FF_SERASE:
+	HB_DI
+	CALL	HBX_BNKSEL		; SELECT ROM BANK 0
+;
+	LD	A,$AA			; SET CHIP ERASE
+	LD	($5555),A
+;
+	LD	A,$55
+	LD	($2AAA),A
+;
+	LD	A,$80
+	LD	($5555),A
+;
+	LD	A,$AA
+	LD	($5555),A
+;
+	LD	A,$55
+	LD	($2AAA),A
+;
+	LD	A,$30			; SECTOR ADDRESS
+	LD	(HL),A
+;
+	LD	A,B			; RETURN TO ORIGINAL BANK
+	CALL	HBX_BNKSEL		; WHICH IS OUR RAM BIOS COPY
+	HB_EI
+;
+	RET
+;
+FF_S_SZ	.EQU	$-FF_SERASE
+;
 ;	FLASH STYLE
 ;
 ST_NORMAL	.EQU	0