Merge trunk -> wbw

branches/wbw/Applegate/Makefile

@@ -0,0 +1,32 @@
+# Makefile 1/31/2013 dwg - 
+
+TASM := ../XSource/bin/TASM 
+TASMTABS := .
+export TASMTABS
+
+ASMOPT80 := -t$(CPU) -g3
+ASMOPT85 := -t85 -g3 
+
+ASM80 := $(TASM) $(ASMOPT80)
+ASM85 := $(TASM) $(ASMOPT85)
+ASMIMG := $(TASM) $(ASMOPT80) -b -fE5
+
+all:	zapple.bin cpm.bin bios.bin
+
+tasm80.tab:	bin/TASM80.TAB
+	cp bin/TASM80.TAB tasm80.tab
+
+tasm85.tab:	bin/TASM85.TAB
+	cp bin/TASM85.TAB tasm85.tab
+
+cpm.bin:	cpm22.asm 
+	$(ASMIMG) $< $@
+
+bios.bin:	bios.asm s100iobd.inc
+	$(ASMIMG) bios.asm $@
+
+zapple.bin:	zapple.asm zapple.z80
+	$(ASMIMG) zapple.asm $@
+
+clean:
+	rm -f *.lst *.bin

branches/wbw/Applegate/ccs2710.inc

@@ -0,0 +1,77 @@
+		.page
+;********************************************************
+; These are I/O functions for the CCS 2710 four-port
+; serial I/O board.
+;
+; Bob Applegate, 02/16/2008
+;
+SIObase		.equ	0E0H
+;
+SIODATA		.equ	SIObase
+SIOBAUDL	.equ	SIObase		;also used for baud rate
+SIOINTEN	.equ	SIObase+1
+SIOBAUDH	.equ	SIObase+1	;ditto
+SIOIDENT	.equ	SIObase+2
+SIOLCTRL	.equ	SIObase+3
+SIOMDMCT	.equ	SIObase+4
+SIOLSTAT	.equ	SIObase+5
+SIOMDMST	.equ	SIObase+6
+BAUD03		.equ	0180H	;divisor for 300 baud
+BAUD12		.equ	060H	;1200 baud
+BAUD_2400	.equ	030h	;2400 baud
+BAUD96		.equ	00CH	;9600 baud
+DATRDY		.equ	01H	;rec'd data ready
+TXMTY		.equ	20H	;transmitter holding reg empty
+HSMSK		.equ	20H
+
+BAUD_RATE	.equ	BAUD_2400
+
+;
+; This function initializes the main console port for the
+; default baud rate.
+;
+initser:	ld	a,0fH
+		out	(SIOMDMCT),a
+		ld	a,083H		;enable divisor latch access
+		out	(SIOLCTRL),a
+		ld	a,BAUD_RATE / 256	;get hi byte
+		out	(SIOBAUDH),a
+		ld	a,BAUD_RATE % 256	;get low byte
+		out	(SIOBAUDL),a
+		ld	a,03H		;8 data bits, one stop bit, no parity
+		out	(SIOLCTRL),a
+		xor	a		;clear acc
+		out	(SIOINTEN),a	;disable ints
+		out	(SIOLSTAT),a	;clear status
+		in	a,(SIODATA)	;clear out any garbage in rec'd data reg
+		ret
+;
+; TTY output of character in C.  Modifies A.
+;
+ttyout:		IN	A,(SIOLSTAT)		;was A,TTS, read status port
+		AND	TXMTY		;check buffer empty bit
+		JR	Z,ttyout		;branch if not empty
+		LD	A,C
+		OUT	(SIODATA),A		;was TTO,A, send out character
+		RET			;thassit
+;
+; Check to see if a character is ready to be read from the TTY.
+; Returns TRUE (0ffh) in A is there is a character waiting, or
+; FALSE (0) if there is nothing.
+;
+ttystat:	IN	A,(SIOLSTAT)		;was A,TTS
+		AND	DATRDY
+		LD	A,TRUE		;was FALSE
+		RET	NZ
+		CPL
+		RET
+;
+; This gets the next character from the TTY and returns it in A.
+; This will block if there is nothing waiting.
+;
+ttyin:		IN	A,(SIOLSTAT)		;read status reg
+		AND	DATRDY		;look for data ready
+		JR	Z,ttyin		;wait for char
+		IN	a,(SIODATA)		;read character
+		RET
+		.page

branches/wbw/Applegate/convert.py

@@ -0,0 +1,71 @@
+#!/usr/bin/python
+# Written by Douglas Goodall 17:25 Wed, Jan 30, 2013
+# load cpm.bin and bios.bin then jump
+
+import sys
+import os
+import serial
+
+# passing in a string  either "12" or "0x12"
+# return value is string of hex digits only (no 0x)
+def safebyte(parm):
+        xyz = parm
+        myord = ord(xyz)
+        hexdata = hex(myord)
+        newstr = hexdata
+        if (hexdata[0] == '0'):
+                if(hexdata[1] == 'x'):
+                        newstr = hexdata[2]
+                        if(len(hexdata)>3):
+                                newstr = newstr + hexdata[3]
+        return newstr
+
+# passing in a string either "1234" of  "0x1234"
+# return value is string of hex digits only (1234) (no 0x)
+def safeword(parm):
+	xyz = parm
+	myint = int(xyz)
+	hexdata = hex(myint)
+	newstr = hexdata
+	if (hexdata[0] == '0'):
+		if(hexdata[1] == 'x'):
+			newstr = hexdata[2] 
+			if(len(hexdata)>3):
+				newstr = newstr + hexdata[3]
+				if(len(hexdata)>4):
+					newstr = newstr + hexdata[4]
+					if(len(hexdata)>5):
+						newstr = newstr + hexdata[5]
+	return newstr
+
+def loadngo(filename):
+	statinfo = os.stat(filename)
+	filelen  = statinfo.st_size
+	infile = open(filename,'rb')
+	filedata = infile.read()
+	infile.close()
+	outfile = open("cpm.trans","w")
+
+#	ser = serial.Serial('/dev/cu.PL2303-0000201D', 19200, timeout=10)
+#	ser.write("\n\n")
+	outfile.write("sa400\n")
+#	print ser.read(12);
+	for x in range(1,filelen):
+        	outfile.write(safebyte(filedata[x-1]))
+        	outfile.write(" ")
+	outfile.write("\n")
+	outfile.close()
+#	print ser.read(12)
+#	ser.close()
+
+print "*******************************************************************"
+print "loadcpm.py 1/30/2013 dwg - load&go S-100 CP/M using master-yoda ROM"
+print "*******************************************************************"
+#loadngo("cpm.bin")
+ser = serial.Serial('/dev/cu.PL2303-0000201D', 19200, timeout=1)
+ser.read(128)
+ser.read(128)
+ser.write("\n")
+ser.close()
+loadngo("cpm.bin")
+

branches/wbw/Applegate/cpm22.inc

@@ -0,0 +1,39 @@
+;********************************************************
+; This file contains bits of information that are common
+; between the CCP, BDOS and BIOS.  Since the CCP and
+; BDOS are built as one unit and the BIOS as another, it
+; is handy to have common things in a common file rather
+; that constantly needing to keep things in sync between
+; two different files.
+;
+; 02/16/2013 - Bob Applegate
+
+
+;
+; This is the TOTAL RAM in the system.  Ie, starts at 64
+; but then gets decreased due to ROM monitors at top of
+; memory.  This can be set artificially low to allow
+; more room for BIOS debugging code.
+;
+; This is the amount of contiguous RAM from 0000.
+;
+RAMSIZE		EQU	48	;expressed in K
+
+;
+; Low memory locations
+;
+IOBYTE		EQU	3	;i/o definition byte.
+TDRIVE		EQU	4	;current drive name and user number.
+ENTRY		EQU	5	;entry point for the cp/m bdos.
+
+
+
+CCPSIZE		EQU	0800H	;I hate hard-coding things!
+BDOSSIZE	EQU	0E00H
+
+;
+; Where CP/M things are located
+;
+CCPBASE		equ	(RAMSIZE-7)*1024
+BDOSBASE	equ	(CCPBASE+CCPSIZE)
+BIOSBASE	equ	(BDOSBASE+BDOSSIZE)

branches/wbw/Applegate/loadcpm.py

@@ -0,0 +1,69 @@
+#!/usr/bin/python
+# Written by Douglas Goodall 17:25 Wed, Jan 30, 2013
+# load cpm.bin and bios.bin then jump
+
+import sys
+import os
+import serial
+
+# passing in a string  either "12" or "0x12"
+# return value is string of hex digits only (no 0x)
+def safebyte(parm):
+        xyz = parm
+        myord = ord(xyz)
+        hexdata = hex(myord)
+        newstr = hexdata
+        if (hexdata[0] == '0'):
+                if(hexdata[1] == 'x'):
+                        newstr = hexdata[2]
+                        if(len(hexdata)>3):
+                                newstr = newstr + hexdata[3]
+        return newstr
+
+# passing in a string either "1234" of  "0x1234"
+# return value is string of hex digits only (1234) (no 0x)
+def safeword(parm):
+	xyz = parm
+	myint = int(xyz)
+	hexdata = hex(myint)
+	newstr = hexdata
+	if (hexdata[0] == '0'):
+		if(hexdata[1] == 'x'):
+			newstr = hexdata[2] 
+			if(len(hexdata)>3):
+				newstr = newstr + hexdata[3]
+				if(len(hexdata)>4):
+					newstr = newstr + hexdata[4]
+					if(len(hexdata)>5):
+						newstr = newstr + hexdata[5]
+	return newstr
+
+def loadngo(filename):
+	statinfo = os.stat(filename)
+	filelen  = statinfo.st_size
+	infile = open(filename,'rb')
+	filedata = infile.read()
+	infile.close()
+	ser = serial.Serial('/dev/cu.PL2303-0000201D', 19200, timeout=10)
+	ser.write("\n\n")
+	ser.write("sa400\n")
+	print ser.read(12);
+	for x in range(1,filelen):
+        	ser.write(safebyte(filedata[x-1]))
+        	ser.write(" ")
+        	print ser.read(12)
+	ser.write("\n")
+	print ser.read(12)
+	ser.close()
+
+print "*******************************************************************"
+print "loadcpm.py 1/30/2013 dwg - load&go S-100 CP/M using master-yoda ROM"
+print "*******************************************************************"
+#loadngo("cpm.bin")
+ser = serial.Serial('/dev/cu.PL2303-0000201D', 19200, timeout=1)
+ser.read(128)
+ser.read(128)
+ser.write("\n")
+ser.close()
+loadngo("cpm.bin")
+

branches/wbw/Applegate/s100iobd.inc

@@ -0,0 +1,77 @@
+		.page
+;********************************************************
+; These are I/O functions for the CCS 2710 four-port
+; serial I/O board.
+;
+; Bob Applegate, 02/16/2008
+;
+SIObase		.equ	0E0H
+;
+SIODATA		.equ	SIObase
+SIOBAUDL	.equ	SIObase		;also used for baud rate
+SIOINTEN	.equ	SIObase+1
+SIOBAUDH	.equ	SIObase+1	;ditto
+SIOIDENT	.equ	SIObase+2
+SIOLCTRL	.equ	SIObase+3
+SIOMDMCT	.equ	SIObase+4
+SIOLSTAT	.equ	SIObase+5
+SIOMDMST	.equ	SIObase+6
+BAUD03		.equ	0180H	;divisor for 300 baud
+BAUD12		.equ	060H	;1200 baud
+BAUD_2400	.equ	030h	;2400 baud
+BAUD96		.equ	00CH	;9600 baud
+DATRDY		.equ	01H	;rec'd data ready
+TXMTY		.equ	20H	;transmitter holding reg empty
+HSMSK		.equ	20H
+
+BAUD_RATE	.equ	BAUD_2400
+
+;
+; This function initializes the main console port for the
+; default baud rate.
+;
+initser:	ld	a,0fH
+		out	(SIOMDMCT),a
+		ld	a,083H		;enable divisor latch access
+		out	(SIOLCTRL),a
+		ld	a,BAUD_RATE / 256	;get hi byte
+		out	(SIOBAUDH),a
+		ld	a,BAUD_RATE % 256	;get low byte
+		out	(SIOBAUDL),a
+		ld	a,03H		;8 data bits, one stop bit, no parity
+		out	(SIOLCTRL),a
+		xor	a		;clear acc
+		out	(SIOINTEN),a	;disable ints
+		out	(SIOLSTAT),a	;clear status
+		in	a,(SIODATA)	;clear out any garbage in rec'd data reg
+		ret
+;
+; TTY output of character in C.  Modifies A.
+;
+ttyout:		IN	A,(SIOLSTAT)		;was A,TTS, read status port
+		AND	TXMTY		;check buffer empty bit
+		JR	Z,ttyout		;branch if not empty
+		LD	A,C
+		OUT	(SIODATA),A		;was TTO,A, send out character
+		RET			;thassit
+;
+; Check to see if a character is ready to be read from the TTY.
+; Returns TRUE (0ffh) in A is there is a character waiting, or
+; FALSE (0) if there is nothing.
+;
+ttystat:	IN	A,(SIOLSTAT)		;was A,TTS
+		AND	DATRDY
+		LD	A,TRUE		;was FALSE
+		RET	NZ
+		CPL
+		RET
+;
+; This gets the next character from the TTY and returns it in A.
+; This will block if there is nothing waiting.
+;
+ttyin:		IN	A,(SIOLSTAT)		;read status reg
+		AND	DATRDY		;look for data ready
+		JR	Z,ttyin		;wait for char
+		IN	a,(SIODATA)		;read character
+		RET
+		.page

branches/wbw/Applegate/tasm.inc

@@ -0,0 +1,19 @@
+;
+; To make it easier to port code from other assemblers,
+; this maps some common psuedo-ops into TASM versions.
+;
+#define	EQU	.equ
+#define equ	.equ
+#define END	.end
+#define end	.end
+#define DEFB	.db
+#define DB 	.db
+#define db	.db
+#define DEFW	.dw
+#define DW	.dw
+#define dw	.dw
+#define DS	.ds
+#define ds	.ds
+#define ORG	.org
+#define org	.org
+#define TEXT	.text

branches/wbw/Applegate/tasm.tab

@@ -0,0 +1,594 @@
+"TASM Z80 Assembler.     "
+/****************************************************************************
+/* $Id: tasm80.tab 1.2 1998/02/28 14:31:22 toma Exp $
+/****************************************************************************
+/* This is the instruction set definition table 
+/*   for the Z80 version of TASM.
+/*      Thomas N. Anderson, Speech Technology Incorporated
+/*      This table authored and submitted by Carl A. Wall, VE3APY.
+/*
+/*      Class bits assigned as follows:
+/*        Bit-0 = Z80          (base instruction set)
+/*        Bit-1 = HD64180      (extended instructions)
+/*  See TASM manual for info on table structure.
+/* 
+/*INSTR ARGS OP BYTES RULE CLASS SHIFT OR */
+/*-------------------------------------------*/
+
+ADC  A,(HL)  8E   1 NOP 1
+ADC  A,(IX*) 8EDD 3 ZIX 1
+ADC  A,(IY*) 8EFD 3 ZIX 1
+ADC  A,A     8F   1 NOP 1
+ADC  A,B     88   1 NOP 1
+ADC  A,C     89   1 NOP 1
+ADC  A,D     8A   1 NOP 1
+ADC  A,E     8B   1 NOP 1
+ADC  A,H     8C   1 NOP 1
+ADC  A,L     8D   1 NOP 1
+ADC  A,*     CE   2 NOP 1
+ADC  HL,BC   4AED 2 NOP 1
+ADC  HL,DE   5AED 2 NOP 1
+ADC  HL,HL   6AED 2 NOP 1
+ADC  HL,SP   7AED 2 NOP 1
+
+ADD  A,(HL)  86   1 NOP 1
+ADD  A,(IX*) 86DD 3 ZIX 1
+ADD  A,(IY*) 86FD 3 ZIX 1
+ADD  A,A     87   1 NOP 1
+ADD  A,B     80   1 NOP 1
+ADD  A,C     81   1 NOP 1
+ADD  A,D     82   1 NOP 1
+ADD  A,E     83   1 NOP 1
+ADD  A,H     84   1 NOP 1
+ADD  A,L     85   1 NOP 1
+ADD  A,*     C6   2 NOP 1
+ADD  HL,BC   09   1 NOP 1
+ADD  HL,DE   19   1 NOP 1
+ADD  HL,HL   29   1 NOP 1
+ADD  HL,SP   39   1 NOP 1
+ADD  IX,BC   09DD 2 NOP 1
+ADD  IX,DE   19DD 2 NOP 1
+ADD  IX,IX   29DD 2 NOP 1
+ADD  IX,SP   39DD 2 NOP 1
+ADD  IY,BC   09FD 2 NOP 1
+ADD  IY,DE   19FD 2 NOP 1
+ADD  IY,IY   29FD 2 NOP 1
+ADD  IY,SP   39FD 2 NOP 1
+
+AND  (HL)    A6   1 NOP 1
+AND  (IX*)   A6DD 3 ZIX 1
+AND  (IY*)   A6FD 3 ZIX 1
+AND  A       A7   1 NOP 1
+AND  B       A0   1 NOP 1
+AND  C       A1   1 NOP 1
+AND  D       A2   1 NOP 1
+AND  E       A3   1 NOP 1
+AND  H       A4   1 NOP 1
+AND  L       A5   1 NOP 1
+AND  *       E6   2 NOP 1
+
+BIT  *,(HL)  46CB 2 ZBIT 1
+BIT  *,(IX*) CBDD 4 ZBIT 1 0 4600
+BIT  *,(IY*) CBFD 4 ZBIT 1 0 4600
+BIT  *,A     47CB 2 ZBIT 1
+BIT  *,B     40CB 2 ZBIT 1
+BIT  *,C     41CB 2 ZBIT 1
+BIT  *,D     42CB 2 ZBIT 1
+BIT  *,E     43CB 2 ZBIT 1
+BIT  *,H     44CB 2 ZBIT 1
+BIT  *,L     45CB 2 ZBIT 1
+
+CALL C,*     DC   3 NOP 1
+CALL M,*     FC   3 NOP 1
+CALL NC,*    D4   3 NOP 1
+CALL NZ,*    C4   3 NOP 1
+CALL P,*     F4   3 NOP 1
+CALL PE,*    EC   3 NOP 1
+CALL PO,*    E4   3 NOP 1
+CALL Z,*     CC   3 NOP 1
+CALL *       CD   3 NOP 1
+
+CCF  ""      3F   1 NOP 1
+
+CP   (HL)    BE   1 NOP 1
+CP   (IX*)   BEDD 3 ZIX 1
+CP   (IY*)   BEFD 3 ZIX 1
+CP   A       BF   1 NOP 1
+CP   B       B8   1 NOP 1
+CP   C       B9   1 NOP 1
+CP   D       BA   1 NOP 1
+CP   E       BB   1 NOP 1
+CP   H       BC   1 NOP 1
+CP   L       BD   1 NOP 1
+CP   *       FE   2 NOP 1
+CPD  ""      A9ED 2 NOP 1
+CPDR ""      B9ED 2 NOP 1
+CPIR ""      B1ED 2 NOP 1
+CPI  ""      A1ED 2 NOP 1
+CPL  ""      2F   1 NOP 1
+
+DAA  ""      27   1 NOP 1
+
+DEC  (HL)    35   1 NOP 1
+DEC  (IX*)   35DD 3 ZIX 1
+DEC  (IY*)   35FD 3 ZIX 1
+DEC  A       3D   1 NOP 1
+DEC  B       05   1 NOP 1
+DEC  BC      0B   1 NOP 1
+DEC  C       0D   1 NOP 1
+DEC  D       15   1 NOP 1
+DEC  DE      1B   1 NOP 1
+DEC  E       1D   1 NOP 1
+DEC  H       25   1 NOP 1
+DEC  HL      2B   1 NOP 1
+DEC  IX      2BDD 2 NOP 1
+DEC  IY      2BFD 2 NOP 1
+DEC  L       2D   1 NOP 1
+DEC  SP      3B   1 NOP 1
+DI   ""      F3   1 NOP 1
+DJNZ *       10   2 R1  1
+
+EI   ""      FB   1 NOP 1
+EX   (SP),HL E3   1 NOP 1
+EX   (SP),IX E3DD 2 NOP 1
+EX   (SP),IY E3FD 2 NOP 1
+EX   AF,AF'  08   1 NOP 1
+EX   DE,HL   EB   1 NOP 1
+EXX  ""      D9   1 NOP 1
+HALT ""      76   1 NOP 1
+
+IM   0       46ED 2 NOP 1
+IM   1       56ED 2 NOP 1
+IM   2       5EED 2 NOP 1
+
+/* Alternate form of above
+IM0          46ED 2 NOP 1
+IM1          56ED 2 NOP 1
+IM2          5EED 2 NOP 1
+
+IN   A,(C)   78ED 2 NOP 1
+IN   B,(C)   40ED 2 NOP 1
+IN   C,(C)   48ED 2 NOP 1
+IN   D,(C)   50ED 2 NOP 1
+IN   E,(C)   58ED 2 NOP 1
+IN   H,(C)   60ED 2 NOP 1
+IN   L,(C)   68ED 2 NOP 1
+
+IN   A,(*)   DB   2 NOP 1
+
+IN0   A,(*)  38ED 3 NOP 2
+IN0   B,(*)  00ED 3 NOP 2
+IN0   C,(*)  08ED 3 NOP 2
+IN0   D,(*)  10ED 3 NOP 2
+IN0   E,(*)  18ED 3 NOP 2
+IN0   H,(*)  20ED 3 NOP 2
+IN0   L,(*)  28ED 3 NOP 2
+
+INC  (HL)    34   1 NOP 1
+INC  (IX*)   34DD 3 ZIX 1
+INC  (IY*)   34FD 3 ZIX 1
+INC  A       3C   1 NOP 1
+INC  B       04   1 NOP 1
+INC  BC      03   1 NOP 1
+INC  C       0C   1 NOP 1
+INC  D       14   1 NOP 1
+INC  DE      13   1 NOP 1
+INC  E       1C   1 NOP 1
+INC  H       24   1 NOP 1
+INC  HL      23   1 NOP 1
+INC  IX      23DD 2 NOP 1
+INC  IY      23FD 2 NOP 1
+INC  L       2C   1 NOP 1
+INC  SP      33   1 NOP 1
+
+
+IND  ""      AAED 2 NOP 1
+INDR ""      BAED 2 NOP 1
+INI  ""      A2ED 2 NOP 1
+INIR ""      B2ED 2 NOP 1
+
+JP   (HL)    E9   1 NOP 1
+JP   (IX)    E9DD 2 NOP 1
+JP   (IY)    E9FD 2 NOP 1
+JP   C,*     DA   3 NOP 1
+JP   M,*     FA   3 NOP 1
+JP   NC,*    D2   3 NOP 1
+JP   NZ,*    C2   3 NOP 1
+JP   P,*     F2   3 NOP 1
+JP   PE,*    EA   3 NOP 1
+JP   PO,*    E2   3 NOP 1
+JP   Z,*     CA   3 NOP 1
+JP   *       C3   3 NOP 1
+
+JR   C,*     38   2 R1  1
+JR   NC,*    30   2 R1  1
+JR   NZ,*    20   2 R1  1
+JR   Z,*     28   2 R1  1
+JR   *       18   2 R1  1
+
+LD   (BC),A  02   1 NOP 1
+LD   (DE),A  12   1 NOP 1
+LD   (HL),A  77   1 NOP 1
+LD   (HL),B  70   1 NOP 1
+LD   (HL),C  71   1 NOP 1
+LD   (HL),D  72   1 NOP 1
+LD   (HL),E  73   1 NOP 1
+LD   (HL),H  74   1 NOP 1
+LD   (HL),L  75   1 NOP 1
+LD   (HL),*  36   2 NOP 1
+LD   (IX*),A 77DD 3 ZIX 1
+LD   (IX*),B 70DD 3 ZIX 1
+LD   (IX*),C 71DD 3 ZIX 1
+LD   (IX*),D 72DD 3 ZIX 1
+LD   (IX*),E 73DD 3 ZIX 1
+LD   (IX*),H 74DD 3 ZIX 1
+LD   (IX*),L 75DD 3 ZIX 1
+LD   (IX*),* 36DD 4 ZIX 1
+LD   (IY*),A 77FD 3 ZIX 1
+LD   (IY*),B 70FD 3 ZIX 1
+LD   (IY*),C 71FD 3 ZIX 1
+LD   (IY*),D 72FD 3 ZIX 1
+LD   (IY*),E 73FD 3 ZIX 1
+LD   (IY*),H 74FD 3 ZIX 1
+LD   (IY*),L 75FD 3 ZIX 1
+LD   (IY*),* 36FD 4 ZIX 1
+LD   (*),A   32   3 NOP 1
+LD   (*),BC  43ED 4 NOP 1
+LD   (*),DE  53ED 4 NOP 1
+LD   (*),HL  22   3 NOP 1
+LD   (*),IX  22DD 4 NOP 1
+LD   (*),IY  22FD 4 NOP 1
+LD   (*),SP  73ED 4 NOP 1
+LD   A,(BC)  0A   1 NOP 1
+LD   A,(DE)  1A   1 NOP 1
+LD   A,(HL)  7E   1 NOP 1
+LD   A,(IX*) 7EDD 3 ZIX 1
+LD   A,(IY*) 7EFD 3 ZIX 1
+LD   A,A     7F   1 NOP 1
+LD   A,B     78   1 NOP 1
+LD   A,C     79   1 NOP 1
+LD   A,D     7A   1 NOP 1
+LD   A,E     7B   1 NOP 1
+LD   A,H     7C   1 NOP 1
+LD   A,I     57ED 2 NOP 1
+LD   A,L     7D   1 NOP 1
+LD   A,R     5FED 2 NOP 1
+LD   A,(*)   3A   3 NOP 1
+LD   A,*     3E   2 NOP 1
+LD   B,(HL)  46   1 NOP 1
+LD   B,(IX*) 46DD 3 ZIX 1
+LD   B,(IY*) 46FD 3 ZIX 1
+LD   B,A     47   1 NOP 1
+LD   B,B     40   1 NOP 1
+LD   B,C     41   1 NOP 1
+LD   B,D     42   1 NOP 1
+LD   B,E     43   1 NOP 1
+LD   B,H     44   1 NOP 1
+LD   B,L     45   1 NOP 1
+LD   B,*     06   2 NOP 1
+LD   BC,(*)  4BED 4 NOP 1
+LD   BC,*    01   3 NOP 1
+LD   C,(HL)  4E   1 NOP 1
+LD   C,(IX*) 4EDD 3 ZIX 1
+LD   C,(IY*) 4EFD 3 ZIX 1
+LD   C,A     4F   1 NOP 1
+LD   C,B     48   1 NOP 1
+LD   C,C     49   1 NOP 1
+LD   C,D     4A   1 NOP 1
+LD   C,E     4B   1 NOP 1
+LD   C,H     4C   1 NOP 1
+LD   C,L     4D   1 NOP 1
+LD   C,*     0E   2 NOP 1
+LD   D,(HL)  56   1 NOP 1
+LD   D,(IX*) 56DD 3 ZIX 1
+LD   D,(IY*) 56FD 3 ZIX 1
+LD   D,A     57   1 NOP 1
+LD   D,B     50   1 NOP 1
+LD   D,C     51   1 NOP 1
+LD   D,D     52   1 NOP 1
+LD   D,E     53   1 NOP 1
+LD   D,H     54   1 NOP 1
+LD   D,L     55   1 NOP 1
+LD   D,*     16   2 NOP 1
+LD   DE,(*)  5BED 4 NOP 1
+LD   DE,*    11   3 NOP 1
+LD   E,(HL)  5E   1 NOP 1
+LD   E,(IX*) 5EDD 3 ZIX 1
+LD   E,(IY*) 5EFD 3 ZIX 1
+LD   E,A     5F   1 NOP 1
+LD   E,B     58   1 NOP 1
+LD   E,C     59   1 NOP 1
+LD   E,D     5A   1 NOP 1
+LD   E,E     5B   1 NOP 1
+LD   E,H     5C   1 NOP 1
+LD   E,L     5D   1 NOP 1
+LD   E,*     1E   2 NOP 1
+LD   H,(HL)  66   1 NOP 1
+LD   H,(IX*) 66DD 3 ZIX 1
+LD   H,(IY*) 66FD 3 ZIX 1
+LD   H,A     67   1 NOP 1
+LD   H,B     60   1 NOP 1
+LD   H,C     61   1 NOP 1
+LD   H,D     62   1 NOP 1
+LD   H,E     63   1 NOP 1
+LD   H,H     64   1 NOP 1
+LD   H,L     65   1 NOP 1
+LD   H,*     26   2 NOP 1
+LD   HL,(*)  2A   3 NOP 1
+LD   HL,*    21   3 NOP 1
+LD   I,A     47ED 2 NOP 1
+LD   IX,(*)  2ADD 4 NOP 1
+LD   IX,*    21DD 4 NOP 1
+LD   IY,(*)  2AFD 4 NOP 1
+LD   IY,*    21FD 4 NOP 1
+LD   L,(HL)  6E   1 NOP 1
+LD   L,(IX*) 6EDD 3 ZIX 1
+LD   L,(IY*) 6EFD 3 ZIX 1
+LD   L,A     6F   1 NOP 1
+LD   L,B     68   1 NOP 1
+LD   L,C     69   1 NOP 1
+LD   L,D     6A   1 NOP 1
+LD   L,E     6B   1 NOP 1
+LD   L,H     6C   1 NOP 1
+LD   L,L     6D   1 NOP 1
+LD   L,*     2E   2 NOP 1
+LD   R,A     4FED 2 NOP 1
+LD   SP,(*)  7BED 4 NOP 1
+LD   SP,HL   F9   1 NOP 1
+LD   SP,IX   F9DD 2 NOP 1
+LD   SP,IY   F9FD 2 NOP 1
+LD   SP,*    31   3 NOP 1
+LDD  ""      A8ED 2 NOP 1
+LDDR ""      B8ED 2 NOP 1
+LDI  ""      A0ED 2 NOP 1
+LDIR ""      B0ED 2 NOP 1
+NEG  ""      44ED 2 NOP 1
+NOP  ""      00   1 NOP 1
+
+MLT BC       4CED 2 NOP 2
+MLT DE       5CED 2 NOP 2
+MLT HL       6CED 2 NOP 2
+MLT SP       7CED 2 NOP 2
+
+OR   (HL)    B6   1 NOP 1
+OR   (IX*)   B6DD 3 ZIX 1
+OR   (IY*)   B6FD 3 ZIX 1
+OR   A       B7   1 NOP 1
+OR   B       B0   1 NOP 1
+OR   C       B1   1 NOP 1
+OR   D       B2   1 NOP 1
+OR   E       B3   1 NOP 1
+OR   H       B4   1 NOP 1
+OR   L       B5   1 NOP 1
+OR   *       F6   2 NOP 1
+
+OTDM ""      8BED 2 NOP 2
+OTDMR ""     9BED 2 NOP 2
+OTDR ""      BBED 2 NOP 1
+OTIM ""      83ED 2 NOP 2
+OTIMR ""     93ED 2 NOP 2
+OTIR ""      B3ED 2 NOP 1
+
+OUT  (C),A   79ED 2 NOP 1
+OUT  (C),B   41ED 2 NOP 1
+OUT  (C),C   49ED 2 NOP 1
+OUT  (C),D   51ED 2 NOP 1
+OUT  (C),E   59ED 2 NOP 1
+OUT  (C),H   61ED 2 NOP 1
+OUT  (C),L   69ED 2 NOP 1
+OUT  (*),A   D3   2 NOP 1
+
+OUT0 (*),A   39ED 3 NOP 2
+OUT0 (*),B   01ED 3 NOP 2
+OUT0 (*),C   09ED 3 NOP 2
+OUT0 (*),D   11ED 3 NOP 2
+OUT0 (*),E   19ED 3 NOP 2
+OUT0 (*),H   21ED 3 NOP 2
+OUT0 (*),L   29ED 3 NOP 2
+
+OUTD ""      ABED 2 NOP 1
+OUTI ""      A3ED 2 NOP 1
+
+POP  AF      F1   1 NOP 1
+POP  BC      C1   1 NOP 1
+POP  DE      D1   1 NOP 1
+POP  HL      E1   1 NOP 1
+POP  IX      E1DD 2 NOP 1
+POP  IY      E1FD 2 NOP 1
+
+PUSH AF      F5   1 NOP 1
+PUSH BC      C5   1 NOP 1
+PUSH DE      D5   1 NOP 1
+PUSH HL      E5   1 NOP 1
+PUSH IX      E5DD 2 NOP 1
+PUSH IY      E5FD 2 NOP 1
+
+RES  *,(HL)  86CB 2 ZBIT 1
+RES  *,(IX*) CBDD 4 ZBIT 1 0 8600
+RES  *,(IY*) CBFD 4 ZBIT 1 0 8600
+RES  *,A     87CB 2 ZBIT 1
+RES  *,B     80CB 2 ZBIT 1
+RES  *,C     81CB 2 ZBIT 1
+RES  *,D     82CB 2 ZBIT 1
+RES  *,E     83CB 2 ZBIT 1
+RES  *,H     84CB 2 ZBIT 1
+RES  *,L     85CB 2 ZBIT 1
+
+RET  ""      C9   1 NOP 1
+RET  C       D8   1 NOP 1
+RET  M       F8   1 NOP 1
+RET  NC      D0   1 NOP 1
+RET  NZ      C0   1 NOP 1
+RET  P       F0   1 NOP 1
+RET  PE      E8   1 NOP 1
+RET  PO      E0   1 NOP 1
+RET  Z       C8   1 NOP 1
+RETI ""      4DED 2 NOP 1
+RETN ""      45ED 2 NOP 1
+
+RL   (HL)    16CB 2 NOP 1
+RL   (IX*)   CBDD 4 ZIX 1 0 1600
+RL   (IY*)   CBFD 4 ZIX 1 0 1600
+RL   A       17CB 2 NOP 1
+RL   B       10CB 2 NOP 1
+RL   C       11CB 2 NOP 1
+RL   D       12CB 2 NOP 1
+RL   E       13CB 2 NOP 1
+RL   H       14CB 2 NOP 1
+RL   L       15CB 2 NOP 1
+RLA  ""      17   1 NOP 1
+
+RLC  (HL)    06CB 2 NOP 1
+RLC  (IX*)   CBDD 4 ZIX 1 0 0600
+RLC  (IY*)   CBFD 4 ZIX 1 0 0600
+RLC  A       07CB 2 NOP 1
+RLC  B       00CB 2 NOP 1
+RLC  C       01CB 2 NOP 1
+RLC  D       02CB 2 NOP 1
+RLC  E       03CB 2 NOP 1
+RLC  H       04CB 2 NOP 1
+RLC  L       05CB 2 NOP 1
+RLCA ""      07   1 NOP 1
+RLD  ""      6FED 2 NOP 1
+
+RR   (HL)    1ECB 2 NOP 1
+RR   (IX*)   CBDD 4 ZIX 1 0 1E00
+RR   (IY*)   CBFD 4 ZIX 1 0 1E00 
+RR   A       1FCB 2 NOP 1
+RR   B       18CB 2 NOP 1
+RR   C       19CB 2 NOP 1
+RR   D       1ACB 2 NOP 1
+RR   E       1BCB 2 NOP 1
+RR   H       1CCB 2 NOP 1
+RR   L       1DCB 2 NOP 1
+RRA  ""      1F   1 NOP 1
+RRC  (HL)    0ECB 2 NOP 1
+RRC  (IX*)   CBDD 4 ZIX 1 0 0E00
+RRC  (IY*)   CBFD 4 ZIX 1 0 0E00
+RRC  A       0FCB 2 NOP 1
+RRC  B       08CB 2 NOP 1
+RRC  C       09CB 2 NOP 1
+RRC  D       0ACB 2 NOP 1
+RRC  E       0BCB 2 NOP 1
+RRC  H       0CCB 2 NOP 1
+RRC  L       0DCB 2 NOP 1
+RRCA ""      0F   1 NOP 1
+RRD  ""      67ED 2 NOP 1
+
+RST  00H     C7   1 NOP 1
+RST  08H     CF   1 NOP 1
+RST  10H     D7   1 NOP 1
+RST  18H     DF   1 NOP 1
+RST  20H     E7   1 NOP 1
+RST  28H     EF   1 NOP 1
+RST  30H     F7   1 NOP 1
+RST  38H     FF   1 NOP 1
+
+/* Alternate form of above
+RST  00      C7   1 NOP 1
+RST  08      CF   1 NOP 1
+RST  10      D7   1 NOP 1
+RST  18      DF   1 NOP 1
+RST  20      E7   1 NOP 1
+RST  28      EF   1 NOP 1
+RST  30      F7   1 NOP 1
+RST  38      FF   1 NOP 1
+
+SBC  A,(HL)  9E   1 NOP 1
+SBC  A,(IX*) 9EDD 3 ZIX 1
+SBC  A,(IY*) 9EFD 3 ZIX 1
+SBC  A,A     9F   1 NOP 1
+SBC  A,B     98   1 NOP 1
+SBC  A,C     99   1 NOP 1
+SBC  A,D     9A   1 NOP 1
+SBC  A,E     9B   1 NOP 1
+SBC  A,H     9C   1 NOP 1
+SBC  A,L     9D   1 NOP 1
+SBC  HL,BC   42ED 2 NOP 1
+SBC  HL,DE   52ED 2 NOP 1
+SBC  HL,HL   62ED 2 NOP 1
+SBC  HL,SP   72ED 2 NOP 1
+SBC  A,*     DE   2 NOP 1
+SCF  ""      37   1 NOP 1
+
+SET  *,(HL)  C6CB 2 ZBIT 1
+SET  *,(IX*) CBDD 4 ZBIT 1 0 C600
+SET  *,(IY*) CBFD 4 ZBIT 1 0 C600
+SET  *,A     C7CB 2 ZBIT 1
+SET  *,B     C0CB 2 ZBIT 1
+SET  *,C     C1CB 2 ZBIT 1
+SET  *,D     C2CB 2 ZBIT 1
+SET  *,E     C3CB 2 ZBIT 1
+SET  *,H     C4CB 2 ZBIT 1
+SET  *,L     C5CB 2 ZBIT 1
+
+SLA  (HL)    26CB 2 NOP 1
+SLA  (IX*)   CBDD 4 ZIX 1 0 2600
+SLA  (IY*)   CBFD 4 ZIX 1 0 2600
+SLA  A       27CB 2 NOP 1
+SLA  B       20CB 2 NOP 1
+SLA  C       21CB 2 NOP 1
+SLA  D       22CB 2 NOP 1
+SLA  E       23CB 2 NOP 1
+SLA  H       24CB 2 NOP 1
+SLA  L       25CB 2 NOP 1
+
+SLP  ""      76ED 2 NOP 2
+
+SRA  (HL)    2ECB 2 NOP 1
+SRA  (IX*)   CBDD 4 ZIX 1 0 2E00
+SRA  (IY*)   CBFD 4 ZIX 1 0 2E00
+SRA  A       2FCB 2 NOP 1
+SRA  B       28CB 2 NOP 1
+SRA  C       29CB 2 NOP 1
+SRA  D       2ACB 2 NOP 1
+SRA  E       2BCB 2 NOP 1
+SRA  H       2CCB 2 NOP 1
+SRA  L       2DCB 2 NOP 1
+
+SRL  (HL)    3ECB 2 NOP 1
+SRL  (IX*)   CBDD 4 ZIX 1 0 3E00
+SRL  (IY*)   CBFD 4 ZIX 1 0 3E00
+SRL  A       3FCB 2 NOP 1
+SRL  B       38CB 2 NOP 1
+SRL  C       39CB 2 NOP 1
+SRL  D       3ACB 2 NOP 1
+SRL  E       3BCB 2 NOP 1
+SRL  H       3CCB 2 NOP 1
+SRL  L       3DCB 2 NOP 1
+
+SUB  (HL)    96   1 NOP 1
+SUB  (IX*)   96DD 3 ZIX 1
+SUB  (IY*)   96FD 3 ZIX 1
+SUB  A       97   1 NOP 1
+SUB  B       90   1 NOP 1
+SUB  C       91   1 NOP 1
+SUB  D       92   1 NOP 1
+SUB  E       93   1 NOP 1
+SUB  H       94   1 NOP 1
+SUB  L       95   1 NOP 1
+SUB  *       D6   2 NOP 1
+
+TST  A       3CED 2 NOP 2
+TST  B       04ED 2 NOP 2
+TST  C       0CED 2 NOP 2
+TST  D       14ED 2 NOP 2
+TST  E       1CED 2 NOP 2
+TST  H       24ED 2 NOP 2
+TST  L       2CED 2 NOP 2
+TST  (HL)    34ED 2 NOP 2
+TST  *       64ED 3 NOP 2
+
+TSTIO *      74ED 3 NOP 2
+
+XOR  (HL)    AE   1 NOP 1
+XOR  (IX*)   AEDD 3 ZIX 1
+XOR  (IY*)   AEFD 3 ZIX 1
+XOR  A       AF   1 NOP 1
+XOR  B       A8   1 NOP 1
+XOR  C       A9   1 NOP 1
+XOR  D       AA   1 NOP 1
+XOR  E       AB   1 NOP 1
+XOR  H       AC   1 NOP 1
+XOR  L       AD   1 NOP 1
+XOR  *       EE   2 NOP 1

branches/wbw/Applegate/zapple.asm

@@ -0,0 +1,80 @@
+;
+;==================================================================================================
+;   WRAPPER FOR ZAPPLE MONITOR FOR N8VEM PROJECT
+;   WAYNE WARTHEN - 2012-11-26
+;==================================================================================================
+;
+; THE FOLLOWING MACROS DO THE HEAVY LIFTING TO MAKE THE ZAPPLE SOURCE
+; COMPATIBLE WITH TASM
+;
+#DEFINE		EQU	.EQU
+#DEFINE		NAME	\;
+#DEFINE		PAGE	.PAGE
+#DEFINE		CSEG	.CSEG
+#DEFINE		DSEG	.DSEG
+#DEFINE		ORG	.ORG
+#DEFINE		END	.END
+#DEFINE		IF	.IF
+#DEFINE		ELSE	.ELSE
+#DEFINE		ENDIF	.ENDIF
+#DEFINE		DEFB	.DB
+#DEFINE		DB	.DB
+#DEFINE		DEFW	.DW
+#DEFINE		DW	.DW
+#DEFINE		.	_
+#DEFINE		TITLE	.TITLE
+#DEFINE		EXT	\;
+#DEFINE		NOT	~
+;
+#ADDINSTR	IN   A,*   DB   2 NOP 1
+#ADDINSTR	OUT  *,A   D3   2 NOP 1
+#ADDINSTR	ADD  A     87   1 NOP 1
+#ADDINSTR	ADD  D     82   1 NOP 1
+#ADDINSTR	ADD  *     C6   2 NOP 1
+#ADDINSTR	ADC  A     8F   1 NOP 1
+#ADDINSTR	ADC  *     CE   2 NOP 1
+#ADDINSTR	SBC  H     9C   1 NOP 1
+;
+;
+;
+COLOC		.EQU	0
+LNLOC		.EQU	0
+LULOC		.EQU	0
+PTPL		.EQU	0
+PULOC		.EQU	0
+CSLOC		.EQU	0
+CILOC		.EQU	0
+RPTPL		.EQU	0
+RULOC		.EQU	0
+;
+; 16C550 SERIAL LINE UART
+;
+SIO_BASE	.EQU	90H
+SIO_RBR		.EQU	SIO_BASE + 0	; DLAB=0: RCVR BUFFER REG (READ ONLY)
+SIO_THR		.EQU	SIO_BASE + 0	; DLAB=0: XMIT HOLDING REG (WRITE ONLY)
+SIO_IER		.EQU	SIO_BASE + 1	; DLAB=0: INT ENABLE REG
+SIO_IIR		.EQU	SIO_BASE + 2	; INT IDENT REGISTER (READ ONLY)
+SIO_FCR		.EQU	SIO_BASE + 2	; FIFO CONTROL REG (WRITE ONLY)
+SIO_LCR		.EQU	SIO_BASE + 3	; LINE CONTROL REG
+SIO_MCR		.EQU	SIO_BASE + 4	; MODEM CONTROL REG
+SIO_LSR		.EQU	SIO_BASE + 5	; LINE STATUS REG
+SIO_MSR		.EQU	SIO_BASE + 6	; MODEM STATUS REG
+SIO_SCR		.EQU	SIO_BASE + 7	; SCRATCH REGISTER
+SIO_DLL		.EQU	SIO_BASE + 0	; DLAB=1: DIVISOR LATCH (LS)
+SIO_DLM		.EQU	SIO_BASE + 1	; DLAB=1: DIVISOR LATCH (MS)
+;
+BAUDRATE	.EQU	38400
+UART_DIV	.EQU	(1843200 / (16 * BAUDRATE))
+;
+;
+;
+BASE		.EQU	$6000
+
+;
+; NOW INCLUDE THE MAIN SOURCE
+;
+#INCLUDE "zapple.z80"
+;
+	.FILL	$7000 - $
+;
+	.END

branches/wbw/Source/btromwbw.inc

@@ -0,0 +1,111 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; btromwbw.inc 2/17/2013 dwg - boot up CP/M, RomWBW Style   ;
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Unlike the Monahan style of booting, the RomWBW loading   ;
+; is performed by reading in the metadata sector and using  ;
+; the three words at the end of the sector to determine the ;
+; loading address and starting location.                    ;
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;-------------- BOOT UP CPM FROM HARD DISK ON S100COMPUTERS IDR BOARD ----------------
+
+;BOOT UP THE 8255/IDE Board HARD DISK/Flash Memory Card
+;NOTE CODE IS ALL HERE IN CASE A 2716 IS USED
+
+HBOOTWBW:
+        POP     HL                      ;CLEAN UP STACK
+
+        CALL    INITILIZE_IDE_BOARD     ;Initilze the 8255 and drive (again just in case)
+
+        LD      D,11100000B             ;Data for IDE SDH reg (512bytes, LBA mode,single drive)
+        LD      E,REGshd                ;00001110,(0EH) CS0,A2,A1,
+        CALL    IDEwr8D                 ;Write byte to select the MASTER device
+
+        LD      B,0FFH                  ;Delay time to allow a Hard Disk to get up to speed
+WaitInitX:
+        LD      E,REGstatus             ;Get status after initilization
+        CALL    IDErd8D                 ;Check Status (info in [D])
+        BIT     7,D
+        JR      Z,SECREADX               ;Zero, so all is OK to write to drive
+                                        ;Delay to allow drive to get up to speed
+        PUSH    BC
+        LD      BC,0FFFFH
+DXLAY2X: LD      D,2                     ;May need to adjust delay time to allow cold drive to
+DXLAY1X: DEC     D                       ;to speed
+        JR      NZ,DXLAY1X
+        DEC     BC
+        LD      A,C
+        OR      B
+        JR      NZ,DXLAY2X
+        POP     BC
+        DJNZ    WaitInitX                ;If after 0FFH, 0FEH, 0FDH... 0, then drive initilization problem
+IDErrorX:
+        LD      HL,DRIVE_NR_ERR         ;Drive not ready
+        JP      ABORT_ERR_MSG
+
+SECREADX:                                ;Note CPMLDR will ALWAYS be on TRK 0,SEC 1,Head 0
+        CALL    IDEwaitnotbusy          ;Make sure drive is ready
+        JR      C,IDErrorX               ;NC if ready
+        LD      D,1                     ;Load track 0,sec 1, head 0
+        LD      E,REGsector             ;Send info to drive
+        CALL    IDEwr8D
+
+        LD      D,0                     ;Send Low TRK#
+        LD      E,REGcyLSB
+        CALL    IDEwr8D
+
+        LD      D,0                     ;Send High TRK#
+        LD      E,REGcyMSB
+        CALL    IDEwr8D
+
+        LD      D,SEC_COUNT             ;Count of CPM sectors we wish to read
+        LD      E,REGcnt
+        CALL    IDEwr8D
+
+        LD      D,CMDread               ;Send read CMD
+        LD      E,REGCMD
+        CALL    IDEwr8D                 ;Send sec read CMD to drive.
+        CALL    IDEwdrq                 ;Wait until it's got the data
+
+        LD      HL,CPM_ADDRESS          ;DMA address where the CPMLDR resides in RAM
+        LD      B,0                     ;256X2 bytes
+        LD      C,SEC_COUNT             ;Count of sectors X 512
+MoreRD16X:
+        LD      A,REGdata               ;REG regsiter address
+        OUT     (IDECport),A
+
+        OR      IDErdline               ;08H+40H, Pulse RD line
+        OUT     (IDECport),A
+
+        IN      A,(IDEAport)            ;read the LOWER byte
+        LD      (HL),A
+        INC     HL
+        IN      A,(IDEBport)            ;read the UPPER byte
+        LD      (HL),A
+        INC     HL
+
+        LD      A,REGdata               ;Deassert RD line
+        OUT     (IDECport),A
+        DJNZ    MoreRD16X
+        DEC     C
+        JR      NZ,MoreRD16X
+
+        LD      E,REGstatus             ;Check the R/W status when done
+        CALL    IDErd8D
+        BIT     0,D
+        JR      NZ,IDEerr1X              ;Z if no errors
+        LD      HL,STARTCPM
+        LD      A,(HL)
+        CP      31H                     ;EXPECT TO HAVE 31H @80H IE. LD SP,80H
+        JP      Z,STARTCPM              ;AS THE FIRST INSTRUCTION. IF OK JP to 100H in RAM
+        JP      ERR_LD1                 ;Boot Sector Data incorrect
+
+IDEerr1X:
+        LD      HL,IDE_RW_ERROR         ;Drive R/W Error
+        JP      ABORT_ERR_MSG
+
+;;;;;;;;;;;;;;;;;;;;;;
+; eof - btromwbw.inc ;
+;;;;;;;;;;;;;;;;;;;;;;
+

branches/wbw/Tools/python/s100util.py

@@ -0,0 +1,56 @@
+#!/usr/bin/python
+import serial
+
+def memcmd():
+	ser.flushInput()
+	str = "A"
+	ser.write(str)
+	print ser.read(1024)
+
+def menucmd():
+	ser.flushInput()
+	str = "k"
+	ser.write(str)
+	print ser.read(1024)
+
+def portscmd():
+	ser.flushInput()
+	str = "R"
+	ser.write(str)
+	print ser.read(1024)
+
+def dispcmd(beg,end):
+	ser.flushInput()
+	str = "D" + repr(beg) + " " + repr(end) + " "
+	ser.write(str)
+#	print ser.read(4096)
+	print ser.read( ((end+1-beg)/16*80)+100 )
+
+def reset():
+	ser.flushInput()
+	str = "GF000 "
+	ser.write(str)
+	print ser.read(256)
+
+def getpage(startaddr):
+	ser.flushInput()
+	str = "D" + repr(startaddr) + " " + repr(startaddr+255) + " "
+	print str
+	ser.write(str)
+	print ser.read(4096)
+
+
+ser = serial.Serial('/dev/cu.PL2303-0000201D', 38400, timeout=2)
+#reset()
+#menucmd()
+#portscmd()
+#dispcmd(1000,1300)
+#getpage(256)
+#dispcmd(256,256+2)
+#reset()
+#getpage(0)
+d1 = 100
+d2 = d1 + 255
+dispcmd(d1,d2)
+
+

branches/wbw/Tools/python/sendsave.py

@@ -0,0 +1,104 @@
+#!/usr/bin/python
+
+
+# Written by Douglas Goodall 17:25 Wed, Jan 30, 2013
+
+import sys
+import os
+import serial
+
+filename = "rem.com"
+
+print "*******************************************************************"
+print "sendsave.py 1/30/2013 dwg - deliver file to cp/m using save and ddt"
+print "*******************************************************************"
+# passing in a string  either "12" or "0x12"
+# return value is string of hex digits only (no 0x)
+def safebyte(parm):
+        xyz = parm
+        myord = ord(xyz)
+        hexdata = hex(myord)
+        newstr = hexdata
+        if (hexdata[0] == '0'):
+                if(hexdata[1] == 'x'):
+                        newstr = hexdata[2]
+                        if(len(hexdata)>3):
+                                newstr = newstr + hexdata[3]
+        return newstr
+
+# passing in a string either "1234" of  "0x1234"
+# return value is string of hex digits only (1234) (no 0x)
+def safeword(parm):
+	xyz = parm
+	myint = int(xyz)
+	hexdata = hex(myint)
+	newstr = hexdata
+	if (hexdata[0] == '0'):
+		if(hexdata[1] == 'x'):
+			newstr = hexdata[2] 
+			if(len(hexdata)>3):
+				newstr = newstr + hexdata[3]
+				if(len(hexdata)>4):
+					newstr = newstr + hexdata[4]
+					if(len(hexdata)>5):
+						newstr = newstr + hexdata[5]
+	return newstr
+
+statinfo = os.stat(filename)
+filelen =  statinfo.st_size
+
+beg = 0x100
+end = beg + filelen - 1
+
+print "Target file is " + filename + " length is 0x" + hex(filelen) + "\n"
+
+infile = open(filename,'rb');
+data = infile.read()
+infile.close()
+
+ser = serial.Serial('/dev/cu.PL2303-0000201D', 19200, timeout=1)
+
+# flush input queue
+ser.read()
+
+ser.write("\n")
+print ser.read(80)
+
+ser.write("save\n")
+print ser.read(80)
+
+ser.write("ddt\n")
+print ser.read(128)
+
+ser.write("s100\n")
+print ser.read(20)
+
+for x in range(1,filelen):
+	ser.write(safebyte(data[x-1]))
+	ser.write("\n")
+	print ser.read(32)
+	
+ser.write(".\n")
+print ser.read(200)
+
+ser.write("g0\n")
+print ser.read(160)
+
+ser.write(filename)
+ser.write("\n")
+print ser.read(128)
+
+ser.write("yes\n")
+print ser.read(128)
+
+ser.write(safeword(beg))
+ser.write("\n")
+print ser.read(128)
+
+ser.write(safeword(end))
+ser.write("\n")
+print ser.read(128)
+
+ser.write("\n")
+print ser.read(128)
+

branches/wbw/XSource/Makefile

@@ -1,3 +1,5 @@
+# Makefile 1/31/2013 dwg - 
+
 # RomWBW/branches/s100/XSource/Makefile 1/19/2013 dgw - 
 #   This makefile is a preliminary build script for the new std.asm schema.
 #   It currently builds the zeta and n8_2312 platforms and work on the
@@ -113,12 +115,12 @@
 #SYS := CPM
 #ROMNAME := n8vem
 
-CONFIG := s100
+CONFIG := s100_std
 ROMSIZE := 512
 CPU := 80
 SYS := CPM
 ROMNAME := s100
-CPUROM := master-cfg
+CPUROM := master-luke
 
 ifndef ROMNAME
 ROMNAME := $(CONFIG)
@@ -177,11 +179,9 @@ endif
 # in from the Source folder. $(STDS) is the first dependency of the "all"
 # target, therefore assuring that these files are here in time for their
 # use in any assembly that includes the top level file, "std.asm".
-STDS = std-n8.inc std-n8vem.inc std-s100.inc std-s2i.inc std-zeta.inc
-
-#ifdef $(CPUROM)
+# STDS = std-n8.inc std-n8vem.inc std-s100.inc std-s2i.inc std-zeta.inc
+STDS = std-s100.inc std-n8vem.inc
 CONDIT = $(OUTDIR)/$(CPUROM).rom
-#endif
 
 all: $(STDS) tasm80.tab tasm85.tab $(OUTDIR)/$(ROMNAME).rom $(OUTDIR)/$(ROMNAME).sys $(OUTDIR)/$(ROMNAME).com $(CONDIT)
 	rm  -f *.asm
@@ -218,11 +218,12 @@ bootrom.bin : bootrom.asm std.asm build.inc ver.inc memmgr.asm config_$(CONFIG).
 bootapp.bin:	bootapp.asm std.asm build.inc ver.inc
 	$(TASM) $(ASMOPT80) $< $@
 
-#ifdef CPUROM
-$(OUTDIR)/$(CPUROM).rom:	$(CPUROM).asm std.asm build.inc config_$(CONFIG).asm 
-	cp config_$(CONFIG).asm config.asm
-	$(ASMIMG) $(CPUROM).asm $(OUTDIR)/$(CPUROM).rom
-#endif
+#$(OUTDIR)/$(CPUROM).rom:	$(CPUROM).asm std.asm build.inc config_$(CONFIG).asm 
+#	cp config_$(CONFIG).asm config.asm
+#	$(ASMIMG) $(CPUROM).asm $(OUTDIR)/$(CPUROM).rom
+
+$(OUTDIR)/$(CPUROM).rom:	$(CPUROM).asm
+	$(ASMIMG) $< $@
 
 pgzero.bin:	pgzero.asm std.asm build.inc ver.inc
 	$(TASM) $(ASMOPT80) $< $@
@@ -262,7 +263,7 @@ $(OUTDIR)/$(ROMNAME).com: bootapp.bin syscfg.bin loader.bin hbios.bin dbgmon.bin
 $(OUTDIR)/$(ROMNAME).sys: prefix.bin os.bin
 	cat prefix.bin os.bin >>$@
 
-$(OUTDIR)/$(CPUROM).bin:	$(CPUROM).asm std.asm
+$(OUTDIR)/$(CPUROM).bin:	$(CPUROM).asm std.asm btromwbw.inc
 	$(ASMIMG) $(CPUROM).asm $@ 
 
 std.asm:	$(SRC)std.asm
@@ -341,11 +342,13 @@ loader.asm:	$(SRC)loader.asm util.asm
 	cp $(SRC)loader.asm $@
 	$(CVT) $@
 
-#ifdef $(CPUROM)
 $(CPUROM).asm:	$(SRC)/$(CPUROM).asm
 	cp $< $@
 	$(CVT) $@
-#endif
+
+btromwbw.inc:	$(SRC)/btromwbw.inc
+	cp $< $@
+	$(CVT) $@
 
 memmgr.asm:	$(SRC)memmgr.asm
 	cp $< $@
@@ -406,7 +409,7 @@ sd_data.asm:	$(SRC)sd_data.asm
 # By adding all the sub-includes as dependencies for std.asm, this assures that
 # whichever one we are using will be present during the assembly of any modules
 # that include std.asm.
-std.asm:	$(SRC)std.asm std-n8.inc std-n8vem.inc std-s100.inc std-s2i.inc std-zeta.inc
+std.asm:	$(SRC)std.asm $(STDS) 
 	cp $(SRC)std.asm $@
 	$(CVT) $@