From de5f2b13088cd1348f7070ee053f91f179302ad3 Mon Sep 17 00:00:00 2001
From: Wayne Warthen <wwarthen@gmail.com>
Date: Mon, 2 Aug 2021 20:57:53 -0700
Subject: [PATCH] Update dskyng.asm

When clearing the 8259 display ram, it is necessary to wait for a status bit to clear before continuing.
---
 Source/HBIOS/dskyng.asm | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/Source/HBIOS/dskyng.asm b/Source/HBIOS/dskyng.asm
index 2e4ba36d..6ea0e9c4 100644
--- a/Source/HBIOS/dskyng.asm
+++ b/Source/HBIOS/dskyng.asm
@@ -96,9 +96,24 @@ DSKY_REINIT:
 	; FALL THRU
 ;
 DSKY_RESET:
-	; RESET DSKY
+	; RESET DSKY -- CLEAR RAM AND FIFO
 	LD	A,DSKY_CMD_CLR
 	CALL	DSKY_CMD
+;	
+	; 8259 TAKES ~160US TO CLEAR RAM DURING WHICH TIME WRITES TO
+	; DISPLAY RAM ARE INHIBITED.  HIGH BIT OF STATUS BYTE IS SET
+	; DURING THIS WINDOW.  TO PREVENT A DEADLOCK, A LOOP COUNTER
+	; IS USED TO IMPLEMENT A TIMEOUT.
+	LD	B,0			; TIMEOUT LOOP COUNTER
+DSKY_RESET1:
+	PUSH	BC			; SAVE COUNTER
+	CALL	DSKY_ST			; GET STATUS BYTE
+	POP	BC			; RECOVER COUNTER
+	BIT	7,A			; BIT 7 IS DISPLAY RAM BUSY
+	JR	Z,DSKY_RESET2		; MOVE ON IF DONE
+	DJNZ	DSKY_RESET1		; LOOP TILL TIMEOUT
+;
+DSKY_RESET2:
 	RET
 ;
 #IFDEF DSKY_KBD