diff --git a/Doc/DDTZ.doc b/Doc/DDTZ.doc deleted file mode 100644 index 46da2d3b..00000000 --- a/Doc/DDTZ.doc +++ /dev/null @@ -1,564 +0,0 @@ - - DDTZ v2.7 - by C.B. Falconer - edited by George A. Havach - -Introduction: -============ -DDTZ v2.7 is a complete replacement for DDT, Digital Research's -famous Dynamic Debugging Tool, with improved functionality, bug -extermination, and full Z80 support. In general, DDTZ is fully -compatible with the original utility, but it has extra and -extended commands and many fewer quirks. All Z80-specific -instructions can be (dis)assembled, though in Intel rather then -Zilog format. Furthermore, DDTZ will correctly trace ('T' and 'U' -commands) both 8080 and Z80 instructions, depending on which CPU -is operating. On startup, the program announces which CPU it is -running on. - -DDTZ v2.7 now handles the 64180 added opcodes. It does NOT test -for a 64180 CPU, since this cannot be done without executing -illegal Z80 instructions, which in turn will crash some -simulators. However v2.7 does not execute any 64180 instructions -internally, only in the subject program. - -This issue supplies the "M" version assembled, to avoid errors -when switching between MSDOS and CPM systems. The command table -is updated accordingly. Most CPM users are also MSDOS users, but -not vice-versa. - -The program is invoked by typing - - ddtz -or - ddtz [d:]filespec - -In the second form, DDTZ will load the specified file into -memory starting at 0100H, unless it's a .HEX file that sets its -own load address. Besides reporting the NEXT free address and -the PC (program counter) after a successful load, DDTZ also shows -the number of memory pages needed for a SAVE. Instead of having -to write all this down, just use the 'X' command at any time to -redisplay these three values for the current application. - -NOTE: loading more code above the NEXT pointer revises these - values. - -As in DDT, when a program is loaded above the area holding the -'A' and 'U' (and now 'W') command code, these commands are -disabled, and the extra memory is released to the user. Thus, -DDTZ can occupy as little as 3K total memory space. Unlike DDT, -however, DDTZ will not overwrite itself or the system on program -loads (except .HEX files). - -At initialization, the stack pointer (SP) points to a return to -DDTZ, just like for the CCP. Thus, programs that normally return -to the CCP will be returned to DDTZ. The 'B' command -reinitializes this condition. - - -The intercept vector copies the BDOS version number, etc., so -an object program does not know that DDTZ is running (except -for BIOS-BDOS vector size). Thus, programs that check the version -number should execute correctly under DDTZ. - -All input parameters can now be entered in any of three formats: - - (1) hexadecimal (as in DDT), - (2) decimal, by adding a leading '#' character, - (3) ASCII, by enclosing between either single or double - quotes; either one or two characters are allowed. - -Leading blanks in command lines and parameters are absorbed. -Either a comma or a (single) space is a valid delimiter. -Either uppercase or lowercase input is accepted. - -The default command (for anything not otherwise recognizable) -is 'H'. This allows convenient calculation, along with the other -features described below. So, to convert a number, just enter -it! - -As in DDT, the prompt character is '-', and the only error -message is the query ('?'), which generally kicks you back to -command mode. - -New Commands (Over DDT): -======================= - -NOTE: letters in parenthesis, e.g. "(U)", show the equivalent - command for DDTZM version (compatible with MSDOS debug). - - @ Sets or shows (with no parameter) the internally stored - "base" value. Also used with the 'S' and 'D' commands as - an optional parameter (though without the '@') to display - memory from an arbitrary base marker (offset). When set to - zero (the default), it does not affect any screen displays. - - B B)egin: resets the USER stack pointer to its initial value, - such that any program that exits by an RET will return to - DDTZ. DDTZ provides a default stack space of - approximately 24 bytes for user programs. - - C C)ompare first_address,last_address,against_address: shows - all the byte differences between two memory areas, in the - format - - XXXX aa YYYY bb - - where XXXX and YYYY are the comparative memory addresses, - and aa and bb are the corresponding byte values. Can be - used to verify the identity of two files by first - loading them into different memory areas with the 'R' - command (see below). - - - W Write: stores the modified memory area to disk under the - (K) filename specified by the 'I' command, overwriting the - original file from which it was loaded (the user is queried - before doing so). By default, the image of memory from - 0100H through the "NEXT" value -1 is saved. "K first_addr, - last_address" overrides this and allows writing ANY memory - area to a file. Almost a necessity for CPM 3.0 (no SAVE!). - K)eep on DDTZ - - X eXamine: redisplays the "NEXT PC SAVE" report at any time. - (Q) Q)uery size on DDTZ. - - S S)earch first_address, last_addr, value: searches the - (W) specified memory area for the value (a 16-bit word, not a - byte) and shows the locations of all such. Very useful for - finding CALL's or JMP's to a particular address, etc. - W)here on DDTZ - - Y Y)our_option parm1,parm2,address: executes an arbitrary - routine at the specified address, with the BC and DE - registers set to parm1 and parm2, respectively. - - Z Displays (but does not alter) the Z80's alternate register - set, including the index registers (disabled if running on - an 8080). On Z80's, automatically included as the last - part of the display by the 'X' command. - - -Based (Offset) Displays: -======================= - -The 'D' and 'E' commands can use a stored base value (offset), -as set by the '@' command. The current @ value may be -overridden for a single execution of these commands by adding the -base as an extra parameter in the command line. The effect is -to add this value to the first/last address and display -accordingly. The address listing on the left becomes XXXX:YYYY, -where XXXX is the offset address and YYYY is the actual memory -address being displayed. For example, if you have a data area -located at 42B7H and wish to preserve easy access, just enter -"@42b7". Now, "d0,3f" will dump memory starting at 4237H. - - -Further Changes from DDT: -======================== - - A A)ssemble now accepts the full Z80 as well as 8080 - instruction set, although it expects them in Intel rather - than Zilog format (see notes below under the 'L' - command). When in doubt, see the mnemnonic list below. - - D D)isplay or D)ump will accept an optional third parameter - to set the base value for a single execution only. Format - has been cleaned up. - - H H)ex_arithmetic on two values also shows their - difference in decimal. With only one value, converts to - hexadecimal, decimal, and ASCII (low-order byte only). - - - N N)ame now allows drive specification (d:...) and sets up - (I) the complete command line, including both FCB's (at - addresses 005CH and 006CH). The tail (stored at 0081H up) - is NOT upshifted. - I)nput on DDTZ - - U U)nassemble now displays the raw hexcode, especially handy - (L) when examining non-code areas. Intel (8080 style) mnemonics - are used, so some disassembled instructions may look - strange. E.g., the Z80's 'IN B,(C)' and 'OUT (C),B' become - 'INP B' and 'OUTP B', respectively; 'LD (nnnn),BC' becomes - 'SBCD nnnn', 'ADD IX, BC' becomes 'DADX B', and 'JP (IX)' - becomes 'PCIX'. - L)ist on DDTZ - - L L)oad now permits loading a file into memory with an - (R) offset, which is added to the default load address of - 0100H. When reading in a .HEX file with a preset bias, - the 'R' command will not transfer control to an invalid - execution point. Another execution of the 'R' command will - reread the input file, e.g.: - - n blah - l - ...modify the code and generally mess about... - l - - The original file is reloaded, and the modifications are - removed. - R)ead on DDTZ - - E E)nter, like D)isplay, now accepts an optional second - (S) parameter to set the base value for a single execution - only. - S)ubstitute or S)et on DDTZ - - T T)rap/trace on termination now shows the complete CPU - state. Traps and traces no longer lock up when a user RST - 7 instruction is executed. Tracing of BDOS/BIOS calls is - heavily trun cated, avoiding clutter and preventing system - crashes. - -NOTE: Most of the UNDOCUMENTED Z80 op-codes are handled. Others - can crash the system. - - R R)egisters also shows what two-byte values the HL and SP - (X) registers are actually pointing to. On Z80's, displays the - alternate register set. - eX)amine on DDTZ - -NOTE: Any use of the 'W' or 'L' command resets the system DMA - transfer address to the standard default value of 0080H. - - -; This is the output of DDTZ when disassembling OPTYPE.TRY -NOP LDA 06A4 MOV M,H -LXI B,06A4 DCX SP MOV M,L -STAX B INR A HLT -INX B DCR A MOV M,A -INR B MVI A,20 MOV A,B -DCR B CMC MOV A,C -MVI B,20 MOV B,B MOV A,D -RLC MOV B,C MOV A,E -EXAF MOV B,D MOV A,H -DAD B MOV B,E MOV A,L -LDAX B MOV B,H MOV A,M -DCX B MOV B,L MOV A,A -INR C MOV B,M ADD B -DCR C MOV B,A ADD C -MVI C,20 MOV C,B ADD D -RRC MOV C,C ADD E -DJNZ 0134 MOV C,D ADD H -LXI D,06A4 MOV C,E ADD L -STAX D MOV C,H ADD M -INX D MOV C,L ADD A -INR D MOV C,M ADC B -DCR D MOV C,A ADC C -MVI D,20 MOV D,B ADC D -RAL MOV D,C ADC E -JR 0134 MOV D,D ADC H -DAD D MOV D,E ADC L -LDAX D MOV D,H ADC M -DCX D MOV D,L ADC A -INR E MOV D,M SUB B -DCR E MOV D,A SUB C -MVI E,20 MOV E,B SUB D -RAR MOV E,C SUB E -JRNZ 0134 MOV E,D SUB H -LXI H,06A4 MOV E,E SUB L -SHLD 06A4 MOV E,H SUB M -INX H MOV E,L SUB A -INR H MOV E,M SBB B -DCR H MOV E,A SBB C -MVI H,20 MOV H,B SBB D -DAA MOV H,C SBB E -JRZ 0134 MOV H,D SBB H -DAD H MOV H,E SBB L -LHLD 06A4 MOV H,H SBB M -DCX H MOV H,L SBB A -INR L MOV H,M ANA B -DCR L MOV H,A ANA C -MVI L,20 MOV L,B ANA D -CMA MOV L,C ANA E -JRNC 0134 MOV L,D ANA H -LXI SP,06A4 MOV L,E ANA L -STA 06A4 MOV L,H ANA M -INX SP MOV L,L ANA A -INR M MOV L,M XRA B -DCR M MOV L,A XRA C -MVI M,20 MOV M,B XRA D -STC MOV M,C XRA E -JRC 0134 MOV M,D XRA H -DAD SP MOV M,E XRA L - - -XRA M JPE 06A4 SLAR M -XRA A XCHG SLAR A -ORA B CPE 06A4 SRAR B -ORA C XRI 20 SRAR C -ORA D RST 5 SRAR D -ORA E RP SRAR E -ORA H POP PSW SRAR H -ORA L JP 06A4 SRAR L -ORA M DI SRAR M -ORA A CP 06A4 SRAR A -CMP B PUSH PSW SLLR B -CMP C ORI 20 SLLR C -CMP D RST 6 SLLR D -CMP E RM SLLR E -CMP H SPHL SLLR H -CMP L JM 06A4 SLLR L -CMP M EI SLLR M -CMP A CM 06A4 SLLR A -RNZ CPI 20 SRLR B -POP B RST 7 SRLR C -JNZ 06A4 RLCR B SRLR D -JMP 06A4 RLCR C SRLR E -CNZ 06A4 RLCR D SRLR H -PUSH B RLCR E SRLR L -ADI 20 RLCR H SRLR M -RST 0 RLCR L SRLR A -RZ RLCR M BIT 0,B -RET RLCR A BIT 0,C -JZ 06A4 RRCR B BIT 0,D -CZ 06A4 RRCR C BIT 0,E -CALL 06A4 RRCR D BIT 0,H -ACI 20 RRCR E BIT 0,L -RST 1 RRCR H BIT 0,M -RNC RRCR L BIT 0,A -POP D RRCR M BIT 1,B -JNC 06A4 RRCR A BIT 1,C -OUT 20 RALR B BIT 1,D -CNC 06A4 RALR C BIT 1,E -PUSH D RALR D BIT 1,H -SUI 20 RALR E BIT 1,L -RST 2 RALR H BIT 1,M -RC RALR L BIT 1,A -EXX RALR M BIT 2,B -JC 06A4 RALR A BIT 2,C -IN 20 RARR B BIT 2,D -CC 06A4 RARR C BIT 2,E -SBI 20 RARR D BIT 2,H -RST 3 RARR E BIT 2,L -RPO RARR H BIT 2,M -POP H RARR L BIT 2,A -JPO 06A4 RARR M BIT 3,B -XTHL RARR A BIT 3,C -CPO 06A4 SLAR B BIT 3,D -PUSH H SLAR C BIT 3,E -ANI 20 SLAR D BIT 3,H -RST 4 SLAR E BIT 3,L -RPE SLAR H BIT 3,M -PCHL SLAR L BIT 3,A - - -BIT 4,B RES 3,D SET 2,H -BIT 4,C RES 3,E SET 2,L -BIT 4,D RES 3,H SET 2,M -BIT 4,E RES 3,L SET 2,A -BIT 4,H RES 3,M SET 3,B -BIT 4,L RES 3,A SET 3,C -BIT 4,M RES 4,B SET 3,D -BIT 4,A RES 4,C SET 3,E -BIT 5,B RES 4,D SET 3,H -BIT 5,C RES 4,E SET 3,L -BIT 5,D RES 4,H SET 3,M -BIT 5,E RES 4,L SET 3,A -BIT 5,H RES 4,M SET 4,B -BIT 5,L RES 4,A SET 4,C -BIT 5,M RES 5,B SET 4,D -BIT 5,A RES 5,C SET 4,E -BIT 6,B RES 5,D SET 4,H -BIT 6,C RES 5,E SET 4,L -BIT 6,D RES 5,H SET 4,M -BIT 6,E RES 5,L SET 4,A -BIT 6,H RES 5,M SET 5,B -BIT 6,L RES 5,A SET 5,C -BIT 6,M RES 6,B SET 5,D -BIT 6,A RES 6,C SET 5,E -BIT 7,B RES 6,D SET 5,H -BIT 7,C RES 6,E SET 5,L -BIT 7,D RES 6,H SET 5,M -BIT 7,E RES 6,L SET 5,A -BIT 7,H RES 6,M SET 6,B -BIT 7,L RES 6,A SET 6,C -BIT 7,M RES 7,B SET 6,D -BIT 7,A RES 7,C SET 6,E -RES 0,B RES 7,D SET 6,H -RES 0,C RES 7,E SET 6,L -RES 0,D RES 7,H SET 6,M -RES 0,E RES 7,L SET 6,A -RES 0,H RES 7,M SET 7,B -RES 0,L RES 7,A SET 7,C -RES 0,M SET 0,B SET 7,D -RES 0,A SET 0,C SET 7,E -RES 1,B SET 0,D SET 7,H -RES 1,C SET 0,E SET 7,L -RES 1,D SET 0,H SET 7,M -RES 1,E SET 0,L SET 7,A -RES 1,H SET 0,M DADX B -RES 1,L SET 0,A DADX D -RES 1,M SET 1,B LXI X,06A4 -RES 1,A SET 1,C SIXD 06A4 -RES 2,B SET 1,D INX X -RES 2,C SET 1,E DADX X -RES 2,D SET 1,H LIXD 06A4 -RES 2,E SET 1,L DCX X -RES 2,H SET 1,M INR [X+05] -RES 2,L SET 1,A DCR [X+05] -RES 2,M SET 2,B MVI [X+05],20 -RES 2,A SET 2,C DADX SP -RES 3,B SET 2,D MOV B,[X+05] -RES 3,C SET 2,E MOV C,[X+05] - - -MOV D,[X+05] DSBC B DADY B -MOV E,[X+05] SBCD 06A4 DADY D -MOV H,[X+05] NEG LXI Y,06A4 -MOV L,[X+05] RETN SIYD 06A4 -MOV [X+05],B IM0 INX Y -MOV [X+05],C LDIA DADY Y -MOV [X+05],D INP C LIYD 06A4 -MOV [X+05],E OUTP C DCX Y -MOV [X+05],H DADC B INR [Y+05] -MOV [X+05],L LBCD 06A4 DCR [Y+05] -MOV [X+05],A RETI MVI [Y+05],2 -MOV A,[X+05] LDRA DADY SP -ADD [X+05] INP D MOV B,[Y+05] -ADC [X+05] OUTP D MOV C,[Y+05] -SUB [X+05] DSBC D MOV D,[Y+05] -SBB [X+05] SDED 06A4 MOV E,[Y+05] -ANA [X+05] IM1 MOV H,[Y+05] -XRA [X+05] LDAI MOV L,[Y+05] -ORA [X+05] INP E MOV [Y+05],B -CMP [X+05] OUTP E MOV [Y+05],C -POP X DADC D MOV [Y+05],D -XTIX LDED 06A4 MOV [Y+05],E -PUSH X IM2 MOV [Y+05],H -PCIX LDAR MOV [Y+05],L -SPIX INP H MOV [Y+05],A -RLCR [X+05] OUTP H MOV A,[Y+05] -RRCR [X+05] DSBC H ADD [Y+05] -RALR [X+05] shld 06A4 ADC [Y+05] -RARR [X+05] RRD SUB [Y+05] -SLAR [X+05] INP L SBB [Y+05] -SRAR [X+05] OUTP L ANA [Y+05] -SRLR [X+05] DADC H XRA [Y+05] -BIT 0,[X+05] lhld 06A4 ORA [Y+05] -BIT 1,[X+05] RLD CMP [Y+05] -BIT 2,[X+05] INP M POP Y -BIT 3,[X+05] OUTP M XTIY -BIT 4,[X+05] DSBC SP PUSH Y -BIT 5,[X+05] SSPD 06A4 PCIY -BIT 6,[X+05] INP A SPIY -BIT 7,[X+05] OUTP A RLCR [Y+05] -RES 0,[X+05] DADC SP RRCR [Y+05] -RES 1,[X+05] LSPD 06A4 RALR [Y+05] -RES 2,[X+05] LDI RARR [Y+05] -RES 3,[X+05] CCI SLAR [Y+05] -RES 4,[X+05] INI SRAR [Y+05] -RES 5,[X+05] OTI SRLR [Y+05] -RES 6,[X+05] LDD BIT 0,[Y+05] -RES 7,[X+05] CCD BIT 1,[Y+05] -SET 0,[X+05] IND BIT 2,[Y+05] -SET 1,[X+05] OTD BIT 3,[Y+05] -SET 2,[X+05] LDIR BIT 4,[Y+05] -SET 3,[X+05] CCIR BIT 5,[Y+05] -SET 4,[X+05] INIR BIT 6,[Y+05] -SET 5,[X+05] OTIR BIT 7,[Y+05] -SET 6,[X+05] LDDR RES 0,[Y+05] -SET 7,[X+05] CCDR RES 1,[Y+05] -INP B INDR RES 2,[Y+05] -OUTP B OTDR RES 3,[Y+05] - - -RES 4,[Y+05] SET 0,[Y+05] SET 4,[Y+05] -RES 5,[Y+05] SET 1,[Y+05] SET 5,[Y+05] -RES 6,[Y+05] SET 2,[Y+05] SET 6,[Y+05] -RES 7,[Y+05] SET 3,[Y+05] SET 7,[Y+05] - -; These are the result of disassembling 64180OPS.TRY -; These opcodes are available ONLY on the 64180 CPU -; DDTZ will both assemble and disassemble these. -IN0 B,20 TST E MLT B -OUT0 20,B IN0 H,20 MLT D -TST B OUT0 20,H TSTI 20 -IN0 C,20 TST H MLT H -OUT0 20,C IN0 L,20 TSIO 20 -TST C OUT0 20,L SLP -IN0 D,20 TST L MLT SP -OUT0 20,D TST M OTIM -TST D IN0 A,20 OTDM -IN0 E,20 OUT0 20,A OIMR -OUT0 20,E TST A ODMR - -; The following are UNDOCUMENTED z80 opcodes from XTDOPS.TRY. -; DDTZ will disassemble these, but will not assemble them. -; They use xh/xl (or yh/yl) as separate byte registers. -; Use these at your own risk. -INRX H ACXR H MOVY H,B -DCRX H ACXR L MOVY H,C -MVIX H,20 SUXR H MOVY H,D -INRX L SUXR L MOVY H,E -DCRX L SBXR H MOVY H,A -MVIX L,20 SBXR L MOVY L,B -MOVX B,H NDXR H MOVY L,C -MOVX B,L NDXR L MOVY L,D -MOVX C,H XRXR H MOVY L,E -MOVX C,L XRXR L MOVY L,A -MOVX D,H ORXR H MOVY A,H -MOVX D,L ORXR L MOVY A,L -MOVX E,H CPXR H ADYR H -MOVX E,L CPXR L ADYR L -MOVX H,B INRY H ACYR H -MOVX H,C DCRY H ACYR L -MOVX H,D MVIY H,20 SUYR H -MOVX H,E INRY L SUYR L -MOVX H,A DCRY L SBYR H -MOVX L,B MVIY L,20 SBYR L -MOVX L,C MOVY B,H NDYR H -MOVX L,D MOVY B,L NDYR L -MOVX L,E MOVY C,H XRYR H -MOVX L,A MOVY C,L XRYR L -MOVX A,H MOVY D,H ORYR H -MOVX A,L MOVY D,L ORYR L -ADXR H MOVY E,H CPYR H -ADXR L MOVY E,L CPYR L - - -Command Summary: -=============== - -DDTZM command DDTZ command -============= ============ -@ (base) -A)ssemble first_address A -B)egin {i.e., initialize stack and return} B -C)ompare first_address,last_address,against_address C -D)ump first_address[,last_address[,base]] D -E)nter_in_memory first_address[,base] S)ubstitute -F)ill first_address,last_address,value F -G)o_to [address][,trap1[,trap2]] G -H)ex_arithmetic value1(,value2) H -L)oad_file (offset) R)ead -M)ove first_address,last_address,destination M -N)nput FCBs_command_line I)nput -Q)uit (not avail) -R)egister examine/change [register|flag] X)amine -S)earch first_address,last_address,word W)hereis -T)race_execution [count] T - Untrace_execution [count] (i.e. do count instr) U)ntrace -U)nassemble_code first_address[,last_address] L)ist code -W)rite [first_address,last_address] K)eep -X)amine {i.e. display memory parameters for application} Q)uery -Y)our_option BC:=parm1,DE:=parm2,call_address Y -Z)80_register_display Z - - -If you find this program useful, contributions will be gratefully -accepted and will encourage further development and release of -useful CPM programs. My practice is to include source. - -C.B. Falconer -680 Hartford Turnpike, -Hamden, Conn. 06517 (203) 281-1438 - -DDTZ and its associated documentation and other files are -copyright (c) 1980-1988 by C.B. Falconer. They may be freely -copied and used for non-commercial purposes ONLY. -ôÙ \ No newline at end of file diff --git a/Doc/FDU.txt b/Doc/FDU.txt deleted file mode 100644 index 38adda12..00000000 --- a/Doc/FDU.txt +++ /dev/null @@ -1,535 +0,0 @@ -================================================================ -Floppy Disk Utility (FDU) v5.3 for RetroBrew Computers -Disk IO / Zeta / Dual-IDE / N8 / RC2014 / SmallZ80 / Dyno -================================================================ - -Updated January 5, 2020 -by Wayne Warthen (wwarthen@gmail.com) - -Application to test the hardware functionality of the Floppy -Disk Controller (FDC) on the ECB DISK I/O, DISK I/O V3, ZETA -SBC, Dual IDE w/ Floppy, or N8 board. - -The intent is to provide a testbed that allows direct testing -of all possible media types and modes of access. The -application supports read, write, and format by sector, track, -and disk as well as a random read/write test. - -The application supports access modes of polling, interrupt, -INT/WAIT, and DRQ/WAIT. At present, it supports 3.5" media at -DD (720KB) and HD (1.44MB) capacities. It also now supports -5.25" media (720KB and 1.2MB) and 8" media (1.11MB) as well. -Additional media will be added when I have time and access to -required hardware. Not all modes are supported on all -platforms and some modes are experimental in all cases. - -In many ways this application is merely reinventing the wheel -and performs functionality similar to existing applications, -but I have not seen any other applications for RetroBrew -Computers hardware that provide this range of functionality. - -While the application is now almost entirely new code, I would -like to acknowledge that much was derived from the previous -work of Andrew Lynch and Dan Werner. I also want to credit -Sergio Gimenez with testing the 5.25" drive support and Jim -Harre with testing the 8" drive support. Support for Zeta 2 -comes from Segey Kiselev. Thanks! - -General Usage -------------- - -In general, usage is self explanatory. At invocation, you -must select the floppy disk controller (FDC) that you are -using. Subsequently, the main menu allows you to set the -unit, media, and mode to test. These settings MUST match your -situation. Read, write, format, and verify functions are -provided. A sub-menu will allow you to choose sector, track, -disk, or random tests. - -The verify function requires a little explanation. It will -take the contents of the current in-memory disk buffer, save -it, and compare it to the selected sectors. So, you must -ensure that the sectors to be verified already have been -written with the same pattern as the buffer contains. I -typically init the buffer to a pattern, write the pattern to -the entire disk, then verify the entire disk. - -Another submenu is provided for FDC commands. This sub-menu -allows you to send low-level commands directly to FDC. You -*must* know what you are doing to use this sub-menu. For -example, in order to read a sector using this sub-menu, you -will need to perform specify, seek, sense int, and read -commands specifying correct values (nothing is value checked -in this menu). - -Required Hardware/BIOS ----------------------- - -Of course, the starting point is to have a supported hardware -configuration. The following Z80 / Z180 based CPU boards are -supported: - - - SBC V1/2 - - Zeta - - Zeta 2 - - N8 - - Mark IV - - RC2014 - - SmallZ80 - - Dyno - - MBC - -You must be using either a RomWBW or UBA based OS version. - -You must have one of the following floppy disk controllers: - - - Disk IO ECB Board FDC - - Disk IO 3 ECB Board FDC - - Dual-IDE ECB Board FDC - - Zeta SBC onboard FDC - - Zeta 2 SBC onboard FDC - - N8 SBC onboard FDC - - RC2014 Scott Baker SMC-based Floppy Module - - RC2014 Scott Baker WDC-based Floppy Module - - SmallZ80 FDC - - Dyno FDC - - MBC FDC - -Finally, you will need a floppy drive connected via an -appropriate cable: - -Disk IO - no twist in cable, drive unit 0/1 must be selected by jumper on drive -DISK IO 3, Zeta, Zeta 2, RC2014, Dyno - cable with twist, unit 0 after twist, unit 1 before twist -DIDE, N8, Mark IV, SmallZ80 - cable with twist, unit 0 before twist, unit 1 after twist - -Note that FDU does not utilize your systems ROM or OS to -access the floppy system. FDU interacts directly with -hardware. Upon exit, you may need to reset your OS to get the -floppy system back into a state that is expected. - -The Disk I/O should be jumpered as follows: - -J1: depends on use of interrupt modes (see interrupt modes below) -J2: pins 1-2, & 3-4 jumpered -J3: hardware dependent timing for DMA mode (see DMA modes below) -J4: pins 2-3 jumpered -J5: off -J6: pins 2-3 jumpered -J7: pins 2-3 jumpered -J8: off -J9: off -J10: off -J11: off -J12: off - -Note that J1 can be left on even when not using interrupt -modes. As long as the BIOS is OK with it, that is fine. Note -also that J3 is only relevant for DMA modes, but also can be -left in place when using other modes. - -The Disk I/O 3 board should be jumpered at the default settings: - -JP2: 3-4 -JP3: 1-2 for int mode support, otherwise no jumper -JP4: 1-2, 3-4 -JP5: 1-2 -JP6: 1-2 -JP7: 1-2, 3-4 - -Zeta & Zeta 2 do not have any relevant jumper settings. The -hardwired I/O ranges are assumed in the code. - -The Dual-IDE board should be jumpered as follows: - -K3 (DT/R or /RD): /RD -P5 (bd ID): 1-2, 3-4 (for $20-$3F port range) - -There are no specific N8 jumper settings, but the default -I/O range starting at $80 is assumed in the published code. - -The RC2014 Scott Baker SMC-based floppy module should be jumpered -for I/O base address 0x50 (SV1: 11-12), JP1 (TS) shorted, -JP2 (/FAULT) shorted, JP3 (MINI): 2-3, JP4 (/DC/RDY): 2-3. - -The RC2014 Scott Baker WDC-based floppy module should be jumpered -for I/O base address 0x50 (SV1: 11-12), JP1 (/DACK): 1-2, -JP2 (TC): 2-3. - -The RC2014 FDC by Alan Cox (Etched Pixels) needs to be strapped -for base I/O address 0x48. - -SmallZ80 does not have any relevant jumper settings. The -hardwired I/O ranges are assumed in the code. - -Dyno does not have any relevant jumper settings. The -hardwired I/O ranges are assumed in the code. - -The MBC FDC is expected to be strapped to use neither INT nor NMI. It -is also not expected to use DMA. - -Modes of Operation ------------------- - -You can select the following test modes. Please refer to the -chart that follows to determine which modes should work with -combinations of Z80 CPU speed and media format. - -WARNING: In general, only the polling mode is considered fully -reliable. The other modes are basically experimental and -should only be used if you know exactly what you are doing. - -Polling: Traditional polled input/output. Works well and very -reliable with robust timeouts and good error recovery. Also, -the slowest performance which precludes it from being used -with 1.44MB floppy on a 4MHz Z80. This is definitely the mode -you want to get working before any others. It does not require -J1 (interrupt enable) on DISK I/O and does not care about the -setting of J3. - -Interrupt: Relies on FDC interrupts to determine when a byte -is ready to be read/written. It does *not* implement a -timeout during disk operations. For example, if there is no -disk in the drive, this mode will just hang until a disk is -inserted. This mode *requires* that the host has interrupts -active using interrupt mode 1 (IM1) and interrupts attached to -the FDC controller. The BIOS must be configured to handle -these interrupts safely. - -Fast Interrupt: Same as above, but sacrifices additional -reliability for faster operation. This mode will allow a -1.44MB floppy to work with a 4MHz Z80 CPU. However, if any -errors occur (even a transient read error which is not -unusual), this mode will hang. The same FDC interrupt -requirements as above are required. - -INT/WAIT: Same as Fast Interrupt, but uses CPU wait instead of -actual interrupt. This mode is exclusive to the original Disk -IO board. It is subject to all the same issues as Fast -Interrupt, but does not need J1 shorted. J3 is irrelevant. - -DRQ/WAIT: Uses pseudo DMA to handle input/output. Does not -require that interrupts (J1) be enabled on the DISK I/O. -However, it is subject to all of the same reliability issues -as "Fast Interrupt". This mode is exclusive to the original -Disk IO board. At present, the mode is *not* implemented! - -The chart below attempts to describe the combinations that -work for me. By far, the most reliable mode is Polling, but -it requires 8MHz CPU for HD disks. - -DRQ/WAIT --------------------------------+ -INT/WAIT -----------------------------+ | -Fast Interrupt --------------------+ | | -Interrupt ----------------------+ | | | -Polling ---------------------+ | | | | - | | | | | -CPU Speed --------------+ | | | | | - | | | | | | - | | | | | | - -3.5" DD (720K) ------ 4MHz Y Y Y Y X - 8MHz+ Y Y Y Y X - -3.5" HD (1.44M) ----- 4MHz N N Y Y X - 8MHz+ Y Y Y Y X - -5.25" DD (360K) ----- 4MHz Y Y Y Y X - 8MHz+ Y Y Y Y X - -5.25" HD (1.2M) ----- 4MHz N N Y Y X - 8MHz+ Y Y Y Y X - -8" DD (1.11M) ------- 4MHz N N Y Y X - 8MHz+ Y Y Y Y X - -Y = Yes, works -N = No, does not work -X = Experimental, probably won't work - -Tracing -------- - -Command/result activity to/from the FDC will be written out if -the trace setting is changed from '00' to '01' in setup. -Additionally, if a command failure is detected on any command, -that specific comand and results are written regardless of the -trace setting. - -The format of the line written is: -: --> [] - -For example, this is the output of a normal read operation: -READ: 46 01 00 00 01 02 09 1B FF --> 01 00 00 00 00 02 02 [OK] - -Please refer to the i8272 data sheet for information on the -command and result bytes. - -Note that the sense interrupt command can return a non-OK -result. This is completely normal in some cases. It is -necessary to "poll" the drive for seek status using sense -interrupt. If there is nothing to report, then the result -will be INVALID COMMAND. Additionally, during a recalibrate -operation, it may be necessary to issue the command twice -because the command will only step the drive 77 times looking -for track 0, but the head may be up to 80 tracks away. In -this case, the first recalibrate fails, but the second should -succeed. Here is what this would look like if trace is turned -on: - -RECALIBRATE: 07 01 --> [OK] -SENSE INTERRUPT: 08 --> 80 [INVALID COMMAND] - ... - ... - ... -SENSE INTERRUPT: 08 --> 80 [INVALID COMMAND] -SENSE INTERRUPT: 08 --> 71 00 [ABNORMAL TERMINATION] -RECALIBRATE: 07 01 --> [OK] -SENSE INTERRUPT: 08 --> 21 00 [OK] - -Another example is when the FDC has just been reset. In this -case, you will see up to 4 disk change errors. Again these -are not a real problem and to be expected. - -When tracing is turned off, the application tries to be -intelligent about error reporting. The specific errors from -sense interrupt documented above will be suppressed because -they are not a real problem. All other errors will be -displayed. - -Error Handling --------------- - -There is no automated error retry logic. This is very -intentional since the point is to expose the controller and -drive activity. Any error detected will result in a prompt to -abort, retry, or continue. Note that some number of errors is -considered normal for this technology. An occasional error -would not necessarily be considered a problem. - -CPU Speed ---------- - -Starting with v5.0, the application adjusts it's timing loops -to the actual system CPU speed by querying the BIOS for the -current CPU speed. - -Interleave ----------- - -The format command now allows the specification of a sector -interleave. It is almost always the case that the optimal -interleave will be 2 (meaning 2:1). - -360K Media ----------- - -The 360K media definition should work well for true 360K -drives. However, it will generally not work with 1.2M -drives. This is because these drives spin at 360RPM instead -of the 300RPM speed of true 360K drives. Additionally, 1.2M -drives are 80 tracks and 360K drives are 40 tracks and, so -far, there is no mechanism in FD to "double step" as a way to -use 40 track media in 80 track drives. - -With this said, it is possible to configure some 1.2M 5.25" -drives to automatically spin down to 300RPM based on a density -select signal (DENSEL). This signal is asserted by FD for -360K media, so IF you have configured your drive to react to -this signal correctly, you will be able to use the 360K media -defintion. Most 1.2M 5.25" drives are NOT configured this way -by default. TEAC drives are generally easy to modify and have -been tested by the author and do work in this manner. Note -that this does not address the issue of double stepping above; -you will just be using the first 40 of 80 tracks. - -Support -------- - -I am happy to answer questions as fast and well as I am able. -Best contact is wwarthen@gmail.com or post something on the -RetroBrew Computers Forum -https://www.retrobrewcomputers.org/forum/. - -Changes -------- - -WW 8/12/2011 - -Removed call to pulse TC in the FDC initialization after -determining that it periodically caused the FDC to write bad -sectors. I am mystified by this, but definitely found it to -be true. Will revisit at some point -- probably a timing -issue between puslsing TC and whatever happens next. - -Non-DMA mode was being set incorrectly for FAST-DMA mode. It -was set for non-DMA even though we were doing DMA. It is -interesting that it worked fine anyway. Fixed it anyway. - -DIO_SETMEDIA was not clearing DCD_DSKRDY as it should. Fixed. - -WW 8/26/2011: v1.1 - -Added support for Zeta. Note that INT/WAIT and DRQ/WAIT are -not available on Zeta. Note that Zeta provides the ability to -perform a reset of the FDC independent of a full CPU reset. -This is VERY useful and the FDC is reset anytime a drive reset -is required. - -Added INT/WAIT support. - -WW 8/28/2011: V1.2 - -All changes in this version are Zeta specific. Fixed FDC -reset logic and motor status display for Zeta (code from -Sergey). - -Modified Zeta disk change display to include it in the command -output line. This makes more sense because a command must be -issued to select the desired drive first. You can use the -SENSE INT command id you want to check the disk change value -at any time. It will also be displayed with any other command -output display. - -WW 9/1/2011: V1.3 - -Added CPUFREQ configuration setting to tune delays based on -cpu speed. The build app is set for 8MHz which also seems to -work well for 4MHz CPU's. Faster CPU speeds will probably -require tuning this setting. - -WW 9/5/2011: V1.4 - -Changed the polling execution routines to utilize CPUFREQ -variable to optimize timeout counter. Most importantly, this -should allow the use of faster CPUs (like 20MHz). - -WW 9/19/2011: V1.5 - -Zeta changes only. Added a call to FDC RESET after any -command failure. This solves an issue where the drive remains -selected if a command error occurs. Also added FDC RESET to -FDC CONTROL menu. - -WW 10/7/2011: V2.0 - -Added support for DIDE. Only supports polling IO and it does -not appear any other modes are possible given the hardware -constraints. - -WW 10/13/2011: V2.1 - -Modified to support N8. N8 is essentially identical to Dual -IDE. The only real change is the IO addresses. In theory, I -should be able to support true DMA on N8 and will work on that. - -WW 10/20/2011: v2.2 - -I had some problems with the results being read were sometimes -missing a byte. Fixed this by taking a more strict approach -to watching the MSR for the exact bits that are expected. - -WW 10/22/2011: V2.3 - -After spending a few days trying to track down an intermittent -data corruption issue with my Dual IDE board, I added a verify -function. This helped me isolate the problem very nicely -(turned out to be interference from the bus monitor). - -WW 11/25/2011: V2.4 - -Preliminary support for DISKIO V3. Basically just assumed -that it operates just like the Zeta. Needs to be verified -with real hardware as soon as I can. - -WW 1/9/2012: V2.5 - -Modified program termination to use CP/M reset call so that a -warm start is done and all drives are logged out. This is -important because media may have been formatted during the -program execution. - -WW 2/6/2012: v2.6 - -Added support for 5.25" drives as tested by Sergio. - -WW 4/5/2012: v2.7 - -Added support for 8" drives as tested by Jim Harre. - -WW 4/6/2012: v2.7a - -Fixed issue with media selection menu to remove duplicate -entries. - -WW 4/8/2012: v2.7b - -Corrected the handling of the density select signal. - -WW 5/22/2012: v2.8 - -Added new media definitions (5.25", 320K). - -WW 6/1/2012: v2.9 - -Added interleave capability on format. - -WW 6/5/2012: v3.0 - -Documentation cleanup. - -WW 7/1/2012: v3.1 - -Modified head load time (HLT) for 8" media based on YD-180 -spec. Now set to 50ms. - -WW 6/17/2013: v3.2 - -Cleaned up SRT, HLT, and HUT values. - -SK 2/10/2015: v3.3 - -Added Zeta SBC v2 support (Sergey Kiselev) - -WW 3/25/2015: v4.0 - -Renamed from FDTST --> FD - -WW 9/2/2017: v5.0 - -Renamed from FD to FDU. -Added runtime selection of FDC hardware. -Added runtime timing adjustment. - -WW 12/16/2017: v5.1 - -Improved polling version of read/write to fix occasional overrun errors. - -WW 1/8/2018: v5.2 - -Added support for RC2014 hardware: - - Scott Baker SMC 9266 FDC module - - Scott Baker WDC 37C65 FDC module - -WW 9/5/2018: v5.3 - - Removed use of pulsing TC to end R/W operations after one sector and - instead set EOT = R (sector number) so that after desired sector is - read, R/W stops with end of cylinder error which is a documented - method for controling number of sectors R/W. This specific termination - condition is no longer considered an error, but a successful end of - operation. - - Added support for SmallZ80 - -WW 1/5/2020: v5.4 - - Added support for Dyno (based on work by Steve Garcia) - -WW 4/29/2020: v5.5 - - Added support for Etched Pixels FDC - -WW 12/12/2020: v5.6 - - Updated SmallZ80 support for new I/O map - -WW 3/24/2021: v5.7 - - Added support for a few single-sided formats - -WW 7/26/2021: v5.8 - - Added support for MBC FDC diff --git a/Doc/ROM Applications.pdf b/Doc/ROM Applications.pdf new file mode 100644 index 00000000..eb2867cb Binary files /dev/null and b/Doc/ROM Applications.pdf differ diff --git a/Doc/RomWBW Applications.pdf b/Doc/RomWBW Applications.pdf index 1c37b778..508c7329 100644 Binary files a/Doc/RomWBW Applications.pdf and b/Doc/RomWBW Applications.pdf differ diff --git a/Doc/RomWBW Architecture.pdf b/Doc/RomWBW Architecture.pdf index f06566e2..654bd207 100644 Binary files a/Doc/RomWBW Architecture.pdf and b/Doc/RomWBW Architecture.pdf differ diff --git a/Doc/RomWBW Disk Catalog.pdf b/Doc/RomWBW Disk Catalog.pdf index 10ade027..4c2421d1 100644 Binary files a/Doc/RomWBW Disk Catalog.pdf and b/Doc/RomWBW Disk Catalog.pdf differ diff --git a/Doc/RomWBW Getting Started.pdf b/Doc/RomWBW Getting Started.pdf index 2cc81562..2a242989 100644 Binary files a/Doc/RomWBW Getting Started.pdf and b/Doc/RomWBW Getting Started.pdf differ diff --git a/Source/Doc/ROM Applications.md b/Source/Doc/ROM_Applications.md similarity index 83% rename from Source/Doc/ROM Applications.md rename to Source/Doc/ROM_Applications.md index e01f9b2a..3a260183 100644 --- a/Source/Doc/ROM Applications.md +++ b/Source/Doc/ROM_Applications.md @@ -1,5 +1,6 @@ !include(Common.inc) !def(document)(ROM Applications) +!def(author)(Phillip Summers) --- title: !product !document author: !author (mailto:!authmail) @@ -37,7 +38,7 @@ programming languages. `\clearpage`{=latex} -#ROMWBW Monitor +# ROMWBW Monitor The Monitor program is a low level utility that can be used for testing and programming. It allows programs to be entered, @@ -48,30 +49,32 @@ It's key advantage is that is available at boot up. A quick guide to using the Monitor program follows: -##? - Displays a summary of available commands. - -`Monitor Commands (all values in hex):` -`B - Boot system` -`D xxxx yyyy - Dump memory from xxxx to yyyy` -`F xxxx yyyy zz - Fill memory from xxxx to yyyy with zz` -`H - Halt system` -`I xxxx - Input from port xxxx` -`K - Keyboard echo` -`L - Load Intel hex data` -`M xxxx yyyy zzzz - Move memory block xxxx-yyyy to zzzz` -`O xxxx yy - Output value yy to port xxxx` -`P xxxx - Program RAM at address xxxx` -`R xxxx - Run code at address xxxx` -`S xx - Set bank to xx` -`X - Exit monitor` - -##Cold Boot +## ? - Displays a summary of available commands. + +``` +Monitor Commands (all values in hex):` +B - Boot system` +D xxxx yyyy - Dump memory from xxxx to yyyy` +F xxxx yyyy zz - Fill memory from xxxx to yyyy with zz` +H - Halt system` +I xxxx - Input from port xxxx` +K - Keyboard echo` +L - Load Intel hex data` +M xxxx yyyy zzzz - Move memory block xxxx-yyyy to zzzz` +O xxxx yy - Output value yy to port xxxx` +P xxxx - Program RAM at address xxxx` +R xxxx - Run code at address xxxx` +S xx - Set bank to xx` +X - Exit monitor` +``` + +## Cold Boot B - Performs a cold boot of the ROMWBW system. A complete reinitialization of the system is performed and the system returns to the Boot Loader prompt. -##Dump Memory +## Dump Memory D xxxx yyyy - Dump memory from hex location xxxx to yyyy on the screen as lines of 16 hexadecimal bytes with their @@ -80,8 +83,9 @@ printed). A good tool to see where code is located, check for version id, obtain details for chip configurations and execution paths. -Examples: D 100 1FF +Examples: `D 100 1FF` +``` 0100: 10 0B 01 5A 33 45 4E 56 01 00 00 2A 06 00 F9 11 ...Z3ENV...*..ù. 0110: DE 38 37 ED 52 4D 44 0B 6B 62 13 36 00 ED B0 21 Þ87íRMD.kb.6.í°! 0120: 7D 32 E5 21 80 00 4E 23 06 00 09 36 00 21 81 00 }2Ã¥!..N#...6.!.. @@ -98,8 +102,9 @@ Examples: D 100 1FF 01D0: C9 3E FF 32 3C 00 3A 5D 00 FE 20 28 14 D6 30 32 É>ÿ2<.:].þ (.Ö02 01E0: AB 01 32 AD 01 3A 5E 00 FE 20 28 05 D6 30 32 AC «.2­.:^.þ (.Ö02¬ 01F0: 01 C5 01 F0 F8 CF E5 26 00 0E 0A CD 39 02 7D 3C .Ã….ðøÃÃ¥&...Ã9.}< +``` -##Fill Memory +## Fill Memory F xxxx yyyy zz - Fill memory from hex xxxx to yyyy with a single value of zz over the full range. The Dump command @@ -159,7 +164,7 @@ allow you to program a hexidecimal into memory starting at location xxxx. Press 'Enter' on a blank line to return to the Monitor prompt. -##NOTES: +## NOTES: The Monitor allows access to all memory locations. ROM and Flash memory cannot be written to. Memory outside the normal @@ -172,14 +177,14 @@ to manipulate the Real Time Clock non-volatile Memory. Use the C or Z option from the Boot Loader to load CP/M and then run RTC to see the options list. -#FORTH +# FORTH -#BASIC +# BASIC -#TastyBASIC +# TastyBASIC -#Play a Game +# Play a Game -#Network Boot +# Network Boot -#ZModem Flash Update \ No newline at end of file +# ZModem Flash Update \ No newline at end of file diff --git a/Source/HBIOS/dsrtc.asm b/Source/HBIOS/dsrtc.asm index 89a42b19..ded6c797 100644 --- a/Source/HBIOS/dsrtc.asm +++ b/Source/HBIOS/dsrtc.asm @@ -63,25 +63,31 @@ ; ; CONSTANTS ; -; RTC SBC SBC-004 MFPIC N8 N8-CSIO MK4 SC130 SC131 SC126 -; ----- ------- ------- ------- ------- ------- ------- ------- ------- ------- -; D7 WR RTC_OUT RTC_OUT -- RTC_OUT RTC_OUT RTC_OUT -- -- RTC_OUT, I2C_SDA -; D6 WR RTC_CLK RTC_CLK -- RTC_CLK RTC_CLK RTC_CLK -- -- RTC_CLK -; D5 WR /RTC_WE /RTC_WE -- /RTC_WE /RTC_WE /RTC_WE -- -- /RTC_WE -; D4 WR RTC_CE RTC_CE -- RTC_CE RTC_CE RTC_CE -- -- RTC_CE -; D3 WR NC SPK /RTC_CE NC NC NC -- -- /SPI_CS2 -; D2 WR NC CLKHI RTC_CLK SPI_CS SPI_CS NC /SPI_CS1/SPI_CS1/SPI_CS1 -; D1 WR -- -- RTC_WE SPI_CLK NC NC -- -- FS -; D0 WR -- -- RTC_OUT SPI_DI NC NC -- -- I2C_SCL -; -; D7 RD -- -- -- -- -- -- -- -- I2C_SDA -; D6 RD CFG CFG -- SPI_DO CFG -- -- -- -- -; D5 RD -- -- -- -- -- -- -- -- -- -; D4 RD -- -- -- -- -- -- -- -- -- -; D3 RD -- -- -- -- -- -- -- -- -- -; D2 RD -- -- -- -- -- -- -- -- -- -; D1 RD ---- -- -- -- -- -- -- -- -- -; D0 RD RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN -- -- RTC_IN +; RTC LATCH WRITE +; --------------- +; +; BIT SBC SBC-004 MFPIC N8 N8-CSIO MK4 SC130 SC131 SC126 MBC +; ----- ------- ------- ------- ------- ------- ------- ------- ------- --------------- ------- +; D7 RTC_OUT RTC_OUT -- RTC_OUT RTC_OUT RTC_OUT -- -- RTC_OUT,I2C_SDA RTC_OUT +; D6 RTC_CLK RTC_CLK -- RTC_CLK RTC_CLK RTC_CLK -- -- RTC_CLK RTC_CLK +; D5 /RTC_WE /RTC_WE -- /RTC_WE /RTC_WE /RTC_WE -- -- /RTC_WE /RTC_WE +; D4 RTC_CE RTC_CE -- RTC_CE RTC_CE RTC_CE -- -- RTC_CE RTC_CE +; D3 NC CLKSEL /RTC_CE NC NC NC -- -- /SPI_CS2 CLKSEL +; D2 NC SPK RTC_CLK SPI_CS SPI_CS NC /SPI_CS1/SPI_CS1/SPI_CS1 SPK +; D1 -- -- RTC_WE SPI_CLK NC NC -- -- FS LED1 +; D0 -- -- RTC_OUT SPI_DI NC NC -- -- I2C_SCL LED0 +; +; RTC LATCH READ +; -------------- +; +; D7 -- -- -- -- -- -- -- -- I2C_SDA -- +; D6 CFG CFG -- SPI_DO CFG -- -- -- -- CFG +; D5 -- -- -- -- -- -- -- -- -- -- +; D4 -- -- -- -- -- -- -- -- -- -- +; D3 -- -- -- -- -- -- -- -- -- -- +; D2 -- -- -- -- -- -- -- -- -- -- +; D1 ---- -- -- -- -- -- -- -- -- CLKSEL +; D0 RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN -- -- RTC_IN RTC_IN ; #IF (DSRTCMODE == DSRTCMODE_STD) ;