Merge pull request #252 from b1ackmai1er/dev

Dev directory + Speed switching for MBC + ECB

Source/Apps/Build.cmd

@@ -33,6 +33,7 @@ pushd FAT && call Build || exit /b & popd
 pushd Test && call Build || exit /b & popd
 pushd ZMP && call Build || exit /b & popd
 pushd ZMD && call Build || exit /b & popd
+pushd Dev && call Build || exit /b & popd
 
 copy *.com %APPBIN%\ || exit /b
 

Source/Apps/Clean.cmd

@@ -14,3 +14,4 @@ pushd FAT && call Clean || exit /b 1 & popd
 pushd Test && call Clean || exit /b 1 & popd
 pushd ZMP && call Clean || exit /b 1 & popd
 pushd ZMD && call Clean || exit /b 1 & popd
+pushd Dev && call Clean || exit /b 1 & popd

Source/Apps/Dev/Build.cmd

@@ -0,0 +1,14 @@
+@echo off
+setlocal
+
+set TOOLS=../../../Tools
+set PATH=%TOOLS%\tasm32;%PATH%
+set TASMTABS=%TOOLS%\tasm32
+
+echo Building Dev...
+tasm -t80 -g3 -fFF dev.asm dev.com %dev.lst || exit /b
+
+copy /Y dev.com ..\..\..\Binary\Apps\ || exit /b
+rem copy /Y *.ovr ..\..\..\Binary\Apps\ || exit /b
+rem copy /Y *.hlp ..\..\..\Binary\Apps\ || exit /b
+rem copy /Y *.doc ..\..\..\Binary\Apps\ || exit /b

Source/Apps/Dev/Clean.cmd

@@ -0,0 +1,7 @@
+@echo off
+setlocal
+
+if exist dev.com del dev.com
+if exist *.hex del *.hex
+if exist *.lst del *.lst
+if exist *.zip del *.zip

Source/Apps/Dev/Makefile

@@ -0,0 +1,10 @@
+OBJECTS = dev.com
+DOCS = dev.txt
+DEST = ../../../Binary/Apps
+DOCDEST = ../../../Binary/Apps
+TOOLS = ../../../Tools
+include $(TOOLS)/Makefile.inc
+
+%.com: USETASM=1
+
+

Source/Apps/Dev/dev.asm

@@ -0,0 +1,32 @@
+;===============================================================================
+; Dev - Developement Stub
+;===============================================================================
+;
+; AUTHOR: 
+;
+; Usage:
+;
+;_______________________________________________________________________________
+;
+; Change Log:
+;
+;_______________________________________________________________________________
+;
+; ToDo:
+;
+;_______________________________________________________________________________
+;
+;===============================================================================
+; Definitions
+;===============================================================================
+;
+;
+;===============================================================================
+; Code Section
+;===============================================================================
+;
+;
+	.org	$100
+	ret
+	.end
+

Source/Apps/Dev/dev.txt

@@ -0,0 +1 @@
+THE DEV DIRECTORY IS A SKELETON DIRECTORY TO AID SETTING UP A BUILD PROCESS FOR A NEW PROGRAM

Source/Apps/Makefile

@@ -1,7 +1,7 @@
 OBJECTS = sysgen.com survey.com \
 	syscopy.com assign.com format.com talk.com mode.com rtc.com \
 	timer.com rtchb.com
-SUBDIRS = XM FDU FAT Tune Test ZMP ZMD
+SUBDIRS = XM FDU FAT Tune Test ZMP ZMD Dev
 DEST = ../../Binary/Apps
 TOOLS =../../Tools
 

Source/HBIOS/Config/MBC_std.asm

@@ -34,4 +34,4 @@ FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
 DSKYENABLE	.SET	FALSE		; ENABLES DSKY
-DSKYMODE	.SET	DSKYMODE_NG	; DSKY VERTSION: DSKYMODE_[V1|NG]
+DSKYMODE	.SET	DSKYMODE_NG	; DSKY VERSION: DSKYMODE_[V1|NG]

Source/HBIOS/cfg_dyno.asm

@@ -23,6 +23,8 @@ TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 ;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)

Source/HBIOS/cfg_ezz80.asm

@@ -23,6 +23,8 @@ TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 ;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	10000000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)

Source/HBIOS/cfg_master.asm

@@ -20,6 +20,8 @@ TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 ;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)

Source/HBIOS/cfg_mbc.asm

@@ -23,6 +23,8 @@ TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 ;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)

Source/HBIOS/cfg_mk4.asm

@@ -23,6 +23,8 @@ TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 ;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)

Source/HBIOS/cfg_n8.asm

@@ -23,6 +23,8 @@ TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 ;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)

Source/HBIOS/cfg_rcz180.asm

@@ -23,6 +23,8 @@ TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 ;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)

Source/HBIOS/cfg_rcz280.asm

@@ -23,6 +23,8 @@ TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 ;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	24000000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)

Source/HBIOS/cfg_rcz80.asm

@@ -23,6 +23,8 @@ TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 ;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	7372800		; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	1		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)

Source/HBIOS/cfg_sbc.asm

@@ -23,6 +23,8 @@ TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 ;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)

Source/HBIOS/cfg_scz180.asm

@@ -23,6 +23,8 @@ TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 ;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)

Source/HBIOS/cfg_una.asm

@@ -18,6 +18,8 @@ BIOS		.EQU	BIOS_UNA	; HARDWARE BIOS: BIOS_[WBW|UNA]
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 ;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 ;

Source/HBIOS/cfg_zeta.asm

@@ -23,6 +23,8 @@ TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 ;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	20000000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)

Source/HBIOS/cfg_zeta2.asm

@@ -23,6 +23,8 @@ TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
 ;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	20000000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)

Source/HBIOS/dma.asm

@@ -25,15 +25,32 @@ DMA_RESET			.equ	$c3
 DMA_FBACK			.equ	TRUE	; ALLOW FALLBACK TO SOFTWARE
 DMA_USEHS			.equ	TRUE	; USE CLOCK DIVIDER
 ;
-#IF (DMAMODE=DMAMODE_MBC)
-DMA_RDY				.EQU	%00000000
-DMA_FORCE			.EQU	1
-;DMA_USEHS			.SET	FALSE
-#ENDIF
-#IF (DMAMODE=DMAMODE_ECB)
 DMA_RDY				.EQU	%00001000
 DMA_FORCE			.EQU	0
-DMA_USEHS			.SET	TRUE
+
+#IF (DMA_USEHS & (DMAMODE=DMAMODE_MBC))
+#IF (CPUSPDDEF=SPD_HIGH)
+#DEFINE DMAIOSLO LD A,(HB_RTCVAL) \ AND %11110111 \ OUT (RTCIO),A 
+#DEFINE DMAIONOR PUSH AF \ LD A,(HB_RTCVAL) \ OR %00001000 \ OUT (RTCIO),A \ POP AF
+#ELSE
+#DEFINE DMAIOSLO \;
+#DEFINE DMAIONOR \;
+#ENDIF
+#ENDIF
+;
+#IF (DMA_USEHS & (DMAMODE=DMAMODE_ECB))
+#IF (CPUSPDDEF=SPD_HIGH)
+#DEFINE DMAIOSLO LD A,(HB_RTCVAL) \ OR  %00001000 \ OUT (RTCIO),A 
+#DEFINE DMAIONOR PUSH AF \ LD A,(HB_RTCVAL) \ AND %11110111 \ OUT (RTCIO),A \ POP AF
+#ELSE
+#DEFINE DMAIOSLO \;
+#DEFINE DMAIONOR \;
+#ENDIF
+#ENDIF
+
+#IF (!DMA_USEHS)
+#DEFINE DMAIOSLO \;
+#DEFINE DMAIONOR \;
 #ENDIF
 ;
 ;==================================================================================================
@@ -49,11 +66,7 @@ DMA_INIT:
 	LD	A,DMA_FORCE
 	out	(DMABASE+1),a		; force ready off
 ;
-#IF (DMA_USEHS)
-	ld	a,(HB_RTCVAL)
-	or	%00001000		; half
-	out	(RTCIO),a		; clock
-#ENDIF
+	DMAIOSLO
 ;
 	call	DMAProbe		; do we have a dma?
 	jr	nz,DMA_NOTFOUND
@@ -68,13 +81,8 @@ DMA_INIT:
 	xor	a			; set status
 ;
 DMA_EXIT:
-#IF (DMA_USEHS)
-	push	af
-	ld	a,(HB_RTCVAL)
-	and	%11110111		; full
-	out	(RTCIO),a		; clock
-	pop	af
-#ENDIF
+	DMAIONOR
+
 	ret
 ;
 DMA_NOTFOUND:
@@ -163,11 +171,8 @@ DMALDIR:
 	ld	b,DMACopy_Len		; dma command
 	ld	c,DMABASE		; block
 ;
-#IF (DMA_USEHS)
-	ld	a,(HB_RTCVAL)
-	or	%00001000		; half
-	out	(RTCIO),a		; clock
-#ENDIF
+	DMAIOSLO
+;
 	di
 	otir				; load and execute dma
 	ei
@@ -177,13 +182,9 @@ DMALDIR:
 	in	a,(DMABASE)		; set non-zero
 	and	%00111011		; if failed
 	sub	%00011011
-#IF (DMA_USEHS)
-	push	af
-	ld	a,(HB_RTCVAL)
-	and	%11110111		; full
-	out	(RTCIO),a		; clock
-	pop	af
-#ENDIF
+
+	DMAIONOR
+
 	ret
 ;
 DMACopy 	;.db	DMA_DISABLE	; R6-Command Disable DMA
@@ -216,11 +217,8 @@ DMAOTIR:
 	ld	b,DMAOut_Len		; dma command
 	ld	c,DMABASE		; block
 ;
-#IF (DMA_USEHS)
-	ld	a,(HB_RTCVAL)
-	or	%00001000		; half
-	out	(RTCIO),a		; clock
-#ENDIF
+	DMAIOSLO
+
 	di
 	otir				; load and execute dma
 	ei
@@ -231,13 +229,8 @@ DMAOTIR:
 	and	%00111011		; if failed
 	sub	%00011011
 ;
-#IF (DMA_USEHS)
-	push	af
-	ld	a,(HB_RTCVAL)
-	and	%11110111		; full
-	out	(RTCIO),a		; clock
-	pop	af
-#ENDIF
+	DMAIONOR
+
 	ret
 ;
 DMAOutCode  	;.db	DMA_DISABLE	; R6-Command Disable DMA
@@ -275,11 +268,8 @@ DMAINIR:
 	ld	b,DMAIn_Len		; dma command
 	ld	c,DMABASE		; block
 ;
-#IF (DMA_USEHS)
-	ld	a,(HB_RTCVAL)
-	or	%00001000		; half
-	out	(RTCIO),a		; clock
-#ENDIF
+	DMAIOSLO
+;
 	di
 	otir				; load and execute dma
 	ei
@@ -290,13 +280,8 @@ DMAINIR:
 	and	%00111011		; if failed
 	sub	%00011011
 ;
-#IF (DMA_USEHS)
-	push	af
-	ld	a,(HB_RTCVAL)
-	and	%11110111		; full
-	out	(RTCIO),a		; clock
-	pop	af
-#ENDIF
+	DMAIONOR
+;
 	ret
 ;
 DMAInCode 	;.db	DMA_DISABLE	; R6-Command Disable DMA

Source/HBIOS/hbios.asm

@@ -187,6 +187,22 @@ RTCDEF		.EQU	0		; ALLOWS DRIVERS TO SET BITS
 RTCDEF		.SET	RTCDEF | %00000001	; SC128 I2C SCL BIT
 #ENDIF
 ;
+#IF (!(CPUSPDCAP==SPD_FIXED) & (PLATFORM==PLT_MBC))
+#IF (CPUSPDDEF==SPD_HIGH)
+RTCDEF		.SET	RTCDEF | %00001000	; DEFAULT SPEED HIGH
+#ELSE
+RTCDEF		.SET	RTCDEF | %00000000	; DEFAULT SPEED LOW
+#ENDIF
+#ENDIF
+;
+#IF (!(CPUSPDCAP==SPD_FIXED) & (PLATFORM==PLT_SBC))
+#IF (CPUSPDDEF==SPD_HIGH)
+RTCDEF		.SET	RTCDEF | %00000000	; DEFAULT SPEED HIGH
+#ELSE
+RTCDEF		.SET	RTCDEF | %00001000	; DEFAULT SPEED LOW
+#ENDIF
+#ENDIF
+;
 ;
 ;
 #IFNDEF	APPBOOT
@@ -1068,6 +1084,11 @@ Z280_BOOTERR	.TEXT	"\r\n\r\n*** Application mode boot not supported under Z280 n
 ;
 	DI				; NO INTERRUPTS
 	IM	1			; INTERRUPT MODE 1
+
+#IF ((PLATFORM=PLT_MBC) | (PLATFORM=PLT_SBC))
+	LD	A,(HB_RTCVAL)		; SET DEFAULT
+	OUT	(RTCIO),A		; SPEED
+#ENDIF
 ;
 #IF (DIAGENABLE)
 	LD	A,%00000001
@@ -1078,7 +1099,8 @@ Z280_BOOTERR	.TEXT	"\r\n\r\n*** Application mode boot not supported under Z280 n
 	XOR	A			; LED IS INVERTED, TURN IT ON
   #ENDIF
   #IF (LEDMODE == LEDMODE_RTC)
-	LD	A,%00000001		; LED 0
+	LD	A,(HB_RTCVAL)
+	OR	%00000001		; LED 0
 	LD	(HB_RTCVAL),A		; SAVE TO SHADOW REGISTER
   #ENDIF
 	OUT	(LEDPORT),A
@@ -2327,14 +2349,6 @@ HB_WDZ:
 	PRTX(STR_BANNER)
 #ENDIF
 ;
-; EXPERIMENTAL!!!
-; ENGAGE TURBO...
-;
-;	LD	A,(HB_RTCVAL)
-;	SET	3,A
-;	OUT	(RTCIO),A
-;	LD	(HB_RTCVAL),A
-;
 INITSYS3:
 	CALL	PRTSUM			; PRINT UNIT/DEVICE SUMMARY TABLE
 ;

Source/HBIOS/hbios.inc

@@ -190,7 +190,7 @@ RTCDEV_DS	.EQU	$00		; DS1302
 RTCDEV_BQ	.EQU	$10		; BQ4845P
 RTCDEV_SIMH	.EQU	$20		; SIMH
 RTCDEV_INT	.EQU	$30		; PERIODIC INT TIMER
-RTCDEV_DS7	.EQU	$40		; DS1302 (I2C)
+RTCDEV_DS7	.EQU	$40		; DS1307 (I2C)
 RTCDEV_RP5	.EQU	$50		; RP5C01
 ;
 ; VIDEO DEVICE IDS

Source/HBIOS/sn76489.asm

@@ -93,7 +93,7 @@ SN7_VOLUME_OFF:
 
 #IFDEF SBCV2004
 	LD	A,(HB_RTCVAL)
-	OR	%11110111		; SBC-V2-004+ CHANGE TO
+	AND	%11110111		; SBC-V2-004+ CHANGE TO
 	OUT	(RTCIO),A		; NORMAL CLOCK SPEED
 #ENDIF
 

Source/HBIOS/std.asm

@@ -384,6 +384,17 @@ WDOG_NONE	.EQU	0		; NONE
 WDOG_EZZ80	.EQU	1		; EASY Z80 WATCHDOG
 WDOG_SKZ	.EQU	2		; SK Z80 CPU W/ 512K
 ;
+; SYSTEM SPEED CAPABILITIES
+;
+SPD_FIXED	.EQU	0		; PLATFORM SPEED FIXED AND CANNOT CHANGE SPEEDS
+SPD_HILO	.EQU	1		; PLATFORM CAN CHANGE BETWEEN TWO SPEEDS
+;
+; SYSTEM SPEED CHARACTERISTICS
+;
+SPD_UNSUP	.EQU	0		; PLATFORM CAN CHANGE SPEEDS BUT IS UNSUPPORTED
+SPD_HIGH	.EQU	1		; PLATFORM CAN CHANGE SPEED, STARTS HIGH
+SPD_LOW		.EQU	2		; PLATFORM CAN CHANGE SPEED, STARTS LOW
+;
 #INCLUDE "build.inc"		; INCLUDE USER CONFIG, ADD VARIANT, TIMESTAMP, & ROMSIZE
 ;
 #IF (BIOS == BIOS_WBW)

Source/HBIOS/uart.asm

@@ -81,7 +81,7 @@ UART_PREINIT:
 ; INIT UART4 BOARD CONFIG REGISTER (NO HARM IF IT IS NOT THERE)
 ;
 	LD	A,$80			; SELECT 7.3728MHZ OSC & LOCK CONFIG REGISTER
-	OUT	($CF),A			; DO IT
+	OUT	(UART4BASE+$0F),A	; DO IT
 ;
 ; SETUP THE DISPATCH TABLE ENTRIES
 ;
@@ -518,7 +518,7 @@ UART_INITDEV1:
 	; FOR 750+, WE ENABLE THE 64-BYTE FIFO
 	; DLAB MUST STILL BE ON FOR ACCESS TO BIT 5
 	; WE DO *NOT* ENABLE ANY OTHER FCR BITS HERE
-	; BEACAUSE IT WILL SCREW UP THE 2552!!!
+	; BECAUSE IT WILL SCREW UP THE 2552!!!
 	LD	A,%00100000
 	UART_OUTP(UART_FCR)		; DO IT
 ;

Source/HBIOS/updater.asm

@@ -1467,7 +1467,7 @@ BAUDTBL:.DB	"75$"			; 0    0
 ;======================================================================
 ;
 CLKTBL:	.DB	6		; 1   4800
-	.DB	7		; 2   9600
+	.DB	6		; 2   4800
 	.DB	7		; 3   9600
 	.DB	8		; 4  19200
 	.DB	8		; 5  19200

Source/HBIOS/usrrom.asm

@@ -44,7 +44,7 @@ COUT:	PUSH	AF
 	PUSH	DE
 	PUSH	HL
 	LD	B,01H
-	LD	C,0
+	LD	C,80H
 	LD	E,A
 	RST	08
 	POP	HL
@@ -59,7 +59,7 @@ CIN:	PUSH	BC
 	PUSH	DE
 	PUSH	HL
 	LD	B,00H
-	LD	C,00H
+	LD	C,80H
 	RST	08
 	LD	A,E
 	POP	HL