diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt index de383635..9e7e50bd 100644 --- a/Doc/ChangeLog.txt +++ b/Doc/ChangeLog.txt @@ -38,6 +38,8 @@ Version 3.6 - JMD: Added VGMINFO application - WBW: Created SCSI Driver derived from code from Jay Cotton - WBW: Add official RC2014 platform (derived from RCZ80) +- D?N: Added improved TMS Driver hardware/configuration detection and reporting +- WBW: Removed driver module INIT lists, replaced with init phase system Version 3.5.1 ------------- diff --git a/Source/HBIOS/acia.asm b/Source/HBIOS/acia.asm index df2f2516..79fba5c5 100644 --- a/Source/HBIOS/acia.asm +++ b/Source/HBIOS/acia.asm @@ -56,6 +56,24 @@ ACIA_ACIA .EQU 1 ; ACIA_RTSON .EQU %10111111 ; BIT MASK TO ASSERT RTS ACIA_RTSOFF .EQU %01000000 ; BIT MASK TO DEASSERT RTS +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_ACIA .EQU $ +; + .DW SIZ_ACIA ; MODULE SIZE + .DW ACIA_INITPHASE ; ADR OF INIT PHASE HANDLER +; +ACIA_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,ACIA_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,ACIA_INIT ; DO INIT + RET ; DONE + ; ; ; @@ -743,3 +761,14 @@ ACIA1_CFG: #ENDIF ; ACIA_CFGCNT .EQU ($ - ACIA_CFG) / ACIA_CFGSIZ +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_ACIA .EQU $ +SIZ_ACIA .EQU END_ACIA - ORG_ACIA +; + MEMECHO "ACIA occupies " + MEMECHO SIZ_ACIA + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/asci.asm b/Source/HBIOS/asci.asm index 9bd45926..1fe6a56d 100644 --- a/Source/HBIOS/asci.asm +++ b/Source/HBIOS/asci.asm @@ -90,6 +90,23 @@ ASCI1_IVT .EQU IVT(INT_SER1) ; #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_ASCI .EQU $ +; + .DW SIZ_ASCI ; MODULE SIZE + .DW ASCI_INITPHASE ; ADR OF INIT PHASE HANDLER +; +ASCI_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,ASCI_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,ASCI_INIT ; DO INIT + RET ; DONE +; ; ; ASCI_PREINIT: @@ -899,3 +916,14 @@ ASCI1_CFG: #ENDIF ; ASCI_CFGCNT .EQU ($ - ASCI_CFG) / ASCI_CFGSIZ +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_ASCI .EQU $ +SIZ_ASCI .EQU END_ASCI - ORG_ASCI +; + MEMECHO "ASCI occupies " + MEMECHO SIZ_ASCI + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ay38910.asm b/Source/HBIOS/ay38910.asm index 3459a8fc..820e104f 100644 --- a/Source/HBIOS/ay38910.asm +++ b/Source/HBIOS/ay38910.asm @@ -122,6 +122,23 @@ AY_R3CHBP .EQU $03 AY_R7ENAB .EQU $07 AY_R8AVOL .EQU $08 ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_AY .EQU $ +; + .DW SIZ_AY ; MODULE SIZE + .DW AY_INITPHASE ; ADR OF INIT PHASE HANDLER +; +AY_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,AY38910_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,AY38910_INIT ; DO INIT + RET ; DONE +; ;====================================================================== ; ; DRIVER FUNCTION TABLE AND INSTANCE DATA @@ -647,3 +664,14 @@ AY3NOTETBL: .DW AY_RATIO / 5579 ; .DW AY_RATIO / 5661 ; .DW AY_RATIO / 5743 ; +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_AY .EQU $ +SIZ_AY .EQU END_AY - ORG_AY +; + MEMECHO "AY occupies " + MEMECHO SIZ_AY + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/bqrtc.asm b/Source/HBIOS/bqrtc.asm index 233faeab..482a9e79 100644 --- a/Source/HBIOS/bqrtc.asm +++ b/Source/HBIOS/bqrtc.asm @@ -94,6 +94,23 @@ BQRTC_BUFSIZE .EQU 6 ; 6 BYTE BUFFER (YYMMDDHHMMSS) DEVECHO "BQRTC: IO=" DEVECHO BQRTC_BASE DEVECHO "\n" +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_BQRTC .EQU $ +; + .DW SIZ_BQRTC ; MODULE SIZE + .DW BQRTC_INITPHASE ; ADR OF INIT PHASE HANDLER +; +BQRTC_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,BQRTC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,BQRTC_INIT ; DO INIT + RET ; DONE ; RTC Device Initialization Entry @@ -395,3 +412,14 @@ BQRTC_BUF_DAY: .DB 0 ; Day BQRTC_BUF_HOUR: .DB 0 ; Hour BQRTC_BUF_MIN: .DB 0 ; Minute BQRTC_BUF_SEC: .DB 0 ; Second +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_BQRTC .EQU $ +SIZ_BQRTC .EQU END_BQRTC - ORG_BQRTC +; + MEMECHO "BQRTC occupies " + MEMECHO SIZ_BQRTC + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ch.asm b/Source/HBIOS/ch.asm index b7f52caa..fb0557ea 100644 --- a/Source/HBIOS/ch.asm +++ b/Source/HBIOS/ch.asm @@ -79,6 +79,23 @@ CHSD_CFG0 .EQU 0 ; DUMMY ENTRY CHSD_CFG1 .EQU 0 ; DUMMY ENTRY #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_CH .EQU $ +; + .DW SIZ_CH ; MODULE SIZE + .DW CH_INITPHASE ; ADR OF INIT PHASE HANDLER +; +CH_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,CH_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,CH_INIT ; DO INIT + RET ; DONE +; ; CH DEVICE CONFIGURATION ; CH_CFGSIZ .EQU 9 ; SIZE OF CFG TBL ENTRIES @@ -470,3 +487,14 @@ CH_STR_376 .TEXT "CH376$" #INCLUDE "chsd.asm" #ENDIF ; +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_CH .EQU $ +SIZ_CH .EQU END_CH - ORG_CH +; + MEMECHO "CH occupies " + MEMECHO SIZ_CH + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ch376.asm b/Source/HBIOS/ch376.asm index d9abbe6f..7ce0cec2 100644 --- a/Source/HBIOS/ch376.asm +++ b/Source/HBIOS/ch376.asm @@ -3,6 +3,23 @@ ; CH376 NATIVE USB DRIVER ;================================================================================================== ; +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_CHNATIVE .EQU $ +; + .DW SIZ_CHNATIVE ; MODULE SIZE + .DW CHNATIVE_INITPHASE ; ADR OF INIT PHASE HANDLER +; +CHNATIVE_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,CHNATIVE_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,CHNATIVE_INIT ; DO INIT + RET ; DONE #DEFINE DEFM .DB #DEFINE DEFB .DB @@ -63,3 +80,14 @@ _delay_medium .EQU LDELAY CHNATIVE_INIT .EQU _chnative_init CHNATIVE_INITF .EQU _chnative_init_force +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_CHNATIVE .EQU $ +SIZ_CHNATIVE .EQU END_CHNATIVE - ORG_CHNATIVE +; + MEMECHO "CHNATIVE occupies " + MEMECHO SIZ_CHNATIVE + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ch376kyb.asm b/Source/HBIOS/ch376kyb.asm index bf552ea7..bfa78772 100644 --- a/Source/HBIOS/ch376kyb.asm +++ b/Source/HBIOS/ch376kyb.asm @@ -5,6 +5,23 @@ ; ; This driver is designed to work within the TMS video driver for a CRT solution. +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_CHUKB .EQU $ +; + .DW SIZ_CHUKB ; MODULE SIZE + .DW CHUKB_INITPHASE ; ADR OF INIT PHASE HANDLER +; +CHUKB_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,CHUKB_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,CHUKB_INIT ; DO INIT + RET ; DONE #IF (!CHNATIVEENABLE) .ECHO "*** TMSMODE: TMSMODE_MSXUKY REQUIRES CHNATIVEENABLE***\n" @@ -149,3 +166,14 @@ UKY_READ: LD E, L XOR A RET +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_CHUKB .EQU $ +SIZ_CHUKB .EQU END_CHUKB - ORG_CHUKB +; + MEMECHO "CHUKB occupies " + MEMECHO SIZ_CHUKB + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ch376scsi.asm b/Source/HBIOS/ch376scsi.asm index cd5aa873..f522bec1 100644 --- a/Source/HBIOS/ch376scsi.asm +++ b/Source/HBIOS/ch376scsi.asm @@ -3,6 +3,23 @@ ; CH376 NATIVE MASS STORAGE DRIVER ;================================================================================================== ; +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_CHSCSI .EQU $ +; + .DW SIZ_CHSCSI ; MODULE SIZE + .DW CHSCSI_INITPHASE ; ADR OF INIT PHASE HANDLER +; +CHSCSI_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,CHSCSI_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,CHSCSI_INIT ; DO INIT + RET ; DONE #include "./ch376-native/scsi-drv.s" @@ -316,3 +333,14 @@ CH_SCSI_GEOM: LD D,16 | $80 ; HEADS / CYL = 16, SET LBA CAPABILITY BIT LD E,16 ; SECTORS / TRACK = 16 RET ; DONE, A STILL HAS CHUSB_CAP STATUS +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_CHSCSI .EQU $ +SIZ_CHSCSI .EQU END_CHSCSI - ORG_CHSCSI +; + MEMECHO "CHSCSI occupies " + MEMECHO SIZ_CHSCSI + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ch376ufi.asm b/Source/HBIOS/ch376ufi.asm index 5c005930..31927075 100644 --- a/Source/HBIOS/ch376ufi.asm +++ b/Source/HBIOS/ch376ufi.asm @@ -4,6 +4,25 @@ ;================================================================================================== ; +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_CHUFI .EQU $ +; + .DW SIZ_CHUFI ; MODULE SIZE + .DW CHUFI_INITPHASE ; ADR OF INIT PHASE HANDLER +; +CHUFI_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,CHUFI_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,CHUFI_INIT ; DO INIT + RET ; DONE + + #include "./ch376-native/ufi-drv.s" _ufi_seek .EQU _usb_scsi_seek @@ -321,3 +340,14 @@ CH_UFI_GEOM: LD A, $FF OR A RET +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_CHUFI .EQU $ +SIZ_CHUFI .EQU END_CHUFI - ORG_CHUFI +; + MEMECHO "CHUFI occupies " + MEMECHO SIZ_CHUFI + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ctc.asm b/Source/HBIOS/ctc.asm index 2fd205ea..4ab05eb1 100644 --- a/Source/HBIOS/ctc.asm +++ b/Source/HBIOS/ctc.asm @@ -150,6 +150,23 @@ CTCTIVT .EQU INT_CTC0A + CTCTIMCH ; DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_CTC .EQU $ +; + .DW SIZ_CTC ; MODULE SIZE + .DW CTC_INITPHASE ; ADR OF INIT PHASE HANDLER +; +CTC_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,CTC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,CTC_INIT ; DO INIT + RET ; DONE +; ;================================================================================================== ; CTC PRE-INITIALIZATION ; @@ -303,3 +320,14 @@ CTC_NO: ; CTC DRIVER DATA STORAGE ; CTC_EXIST .DB $FF ; SET TO ZERO IF EXISTS +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_CTC .EQU $ +SIZ_CTC .EQU END_CTC - ORG_CTC +; + MEMECHO "CTC occupies " + MEMECHO SIZ_CTC + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/cvdu.asm b/Source/HBIOS/cvdu.asm index b432515f..8dbbcea1 100644 --- a/Source/HBIOS/cvdu.asm +++ b/Source/HBIOS/cvdu.asm @@ -62,6 +62,23 @@ CVDU_FONTID .EQU FONTID_8X16 TERMENABLE .SET TRUE ; INCLUDE TERMINAL PSEUDODEVICE DRIVER KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_CVDU .EQU $ +; + .DW SIZ_CVDU ; MODULE SIZE + .DW CVDU_INITPHASE ; ADR OF INIT PHASE HANDLER +; +CVDU_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,CVDU_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,CVDU_INIT ; DO INIT + RET ; DONE +; ;====================================================================== ; CVDU DRIVER - INITIALIZATION ;====================================================================== @@ -987,3 +1004,14 @@ CVDU_IDAT: .DB KBDMODE_PS2 ; PS/2 8242 KEYBOARD CONTROLLER .DB CVDU_KBDST .DB CVDU_KBDDATA +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_CVDU .EQU $ +SIZ_CVDU .EQU END_CVDU - ORG_CVDU +; + MEMECHO "CVDU occupies " + MEMECHO SIZ_CVDU + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/dlpser.asm b/Source/HBIOS/dlpser.asm index d0ac85cc..e8c9ddc2 100644 --- a/Source/HBIOS/dlpser.asm +++ b/Source/HBIOS/dlpser.asm @@ -24,6 +24,25 @@ DLPSERCFG .EQU SER_9600_8N1 ; DLPSER: SERIAL LINE CONFIG ; DLPSER_PPICTL .EQU $AB DLPSER_PPICFG .EQU %10011000 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_DLPSER .EQU $ +; + .DW SIZ_DLPSER ; MODULE SIZE + .DW DLPSER_INITPHASE ; ADR OF INIT PHASE HANDLER +; +DLPSER_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,DLPSER_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,DLPSER_INIT ; DO INIT + RET ; DONE + + ; DLPSER_PREINIT: ; @@ -273,3 +292,14 @@ DLPSER1_CFG: ; WORKING VARIABLES ; DLPSER_DEV .DB 0 ; DEVICE NUM USED DURING INIT +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_DLPSER .EQU $ +SIZ_DLPSER .EQU END_DLPSER - ORG_DLPSER +; + MEMECHO "DLPSER occupies " + MEMECHO SIZ_DLPSER + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/dma.asm b/Source/HBIOS/dma.asm index 05ac7a03..07ced49c 100644 --- a/Source/HBIOS/dma.asm +++ b/Source/HBIOS/dma.asm @@ -23,7 +23,7 @@ DMA_CTL .EQU DMABASE + 3 DMA_USEHALF .EQU FALSE DEVECHO "DUO" #ENDIF -;S +; DEVECHO ", IO=" DEVECHO DMA_IO DEVECHO "\n" @@ -70,6 +70,23 @@ DMA_FORCE .EQU 0 #DEFINE DMAIOFULL \; #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_DMA .EQU $ +; + .DW SIZ_DMA ; MODULE SIZE + .DW DMA_INITPHASE ; ADR OF INIT PHASE HANDLER +; +DMA_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,DMA_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,DMA_INIT ; DO INIT + RET ; DONE +; ;================================================================================================== ; DMA INITIALIZATION CODE ;================================================================================================== @@ -360,3 +377,14 @@ DMARegDump: call NEWLINE ret #ENDIF +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_DMA .EQU $ +SIZ_DMA .EQU END_DMA - ORG_DMA +; + MEMECHO "DMA occupies " + MEMECHO SIZ_DMA + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ds12rtc.asm b/Source/HBIOS/ds12rtc.asm index 7fa4e297..6644fd0e 100644 --- a/Source/HBIOS/ds12rtc.asm +++ b/Source/HBIOS/ds12rtc.asm @@ -60,6 +60,23 @@ DS12RTC_NVSIZE .EQU $30 DEVECHO DS12RTC_BASE DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_DS12RTC .EQU $ +; + .DW SIZ_DS12RTC ; MODULE SIZE + .DW DS12RTC_INITPHASE ; ADR OF INIT PHASE HANDLER +; +DS12RTC_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,DS12RTC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,DS12RTC_INIT ; DO INIT + RET ; DONE +; ; RTC DEVICE PRE-INITIALIZATION ENTRY ; DS12RTC_PREINIT: @@ -408,3 +425,14 @@ DS12RTC_UIP: ; DS12RTC_TIMBUF .FILL 6,0 ; 6 BYTES FOR GETTIM, YYMMDDHHMMSS DS12RTC_TIMDEF .DB $00,$01,$01,$00,$00,$00 ; DEFAULT DATE/TIME +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_DS12RTC .EQU $ +SIZ_DS12RTC .EQU END_DS12RTC - ORG_DS12RTC +; + MEMECHO "DS12RTC occupies " + MEMECHO SIZ_DS12RTC + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ds1501rtc.asm b/Source/HBIOS/ds1501rtc.asm index fb50f4ec..7e7a9d88 100644 --- a/Source/HBIOS/ds1501rtc.asm +++ b/Source/HBIOS/ds1501rtc.asm @@ -117,16 +117,35 @@ DS1501RTC_BUFSIZE .EQU 6 ; 6 BYTE BUFFER (YYMMDDHHMMSS) DEVECHO DS1501NVM_BASE DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_DS1501RTC .EQU $ +; + .DW SIZ_DS1501RTC ; MODULE SIZE + .DW DS1501RTC_INITPHASE ; ADR OF INIT PHASE HANDLER +; +DS1501RTC_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,DS1501RTC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,DS1501RTC_INIT ; DO INIT + RET ; DONE +; ; RTC Device Initialization Entry ; DS1501RTC_INIT: CALL NEWLINE ; Formatting - PRTS("DS1501RTC: IO=0x$") + PRTS("DS1501RTC: $") + PRTS("IO=0x$") LD A, DS1501RTC_BASE CALL PRTHEXBYTE ; CALL NEWLINE ; Formatting - PRTS("DS1501NVM: IO=0x$") + PRTS("DS1501NVM: $") + PRTS("IO=0x$") LD A, DS1501NVM_BASE CALL PRTHEXBYTE ; @@ -491,3 +510,14 @@ DS1501RTC_BUF_DAY: .DB 0 ; Day DS1501RTC_BUF_HOUR: .DB 0 ; Hour DS1501RTC_BUF_MIN: .DB 0 ; Minute DS1501RTC_BUF_SEC: .DB 0 ; Second +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_DS1501RTC .EQU $ +SIZ_DS1501RTC .EQU END_DS1501RTC - ORG_DS1501RTC +; + MEMECHO "DS1501RTC occupies " + MEMECHO SIZ_DS1501RTC + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ds5rtc.asm b/Source/HBIOS/ds5rtc.asm index 61209709..f8d0fd2d 100644 --- a/Source/HBIOS/ds5rtc.asm +++ b/Source/HBIOS/ds5rtc.asm @@ -116,6 +116,23 @@ DS5RTC_BUFSIZE .EQU 6 ; 6 BYTE BUFFER (YYMMDDHHMMSS) DEVECHO DS5RTC_BASE DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_DS5RTC .EQU $ +; + .DW SIZ_DS5RTC ; MODULE SIZE + .DW DS5RTC_INITPHASE ; ADR OF INIT PHASE HANDLER +; +DS5RTC_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,DS5RTC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,DS5RTC_INIT ; DO INIT + RET ; DONE +; ; RTC DEVICE INITIALIZATION ENTRY ; DS5RTC_INIT: @@ -564,3 +581,14 @@ DS5RTC_TIMBUF .FILL 6,0 ; 6 BYTES FOR GETTIM DS5RTC_TIMDEF: ; DEFAULT TIME VALUE TO INIT CLOCK .DB $00,$01,$01 ; 2000-01-01 .DB $00,$00,$00 ; 00:00:00 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_DS5RTC .EQU $ +SIZ_DS5RTC .EQU END_DS5RTC - ORG_DS5RTC +; + MEMECHO "DS5RTC occupies " + MEMECHO SIZ_DS5RTC + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ds7rtc.asm b/Source/HBIOS/ds7rtc.asm index aadc740b..20c6677a 100644 --- a/Source/HBIOS/ds7rtc.asm +++ b/Source/HBIOS/ds7rtc.asm @@ -25,6 +25,23 @@ DS7_CTL .EQU (DS7_OUT | DS7_SQWE | DS7_RATE) ; DEVECHO "DS1307: ENABLED\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_DS7 .EQU $ +; + .DW SIZ_DS7 ; MODULE SIZE + .DW DS7_INITPHASE ; ADR OF INIT PHASE HANDLER +; +DS7_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,DS7RTC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,DS7RTC_INIT ; DO INIT + RET ; DONE +; ;----------------------------------------------------------------------------- ; DS1307 INITIALIZATION ; @@ -447,3 +464,14 @@ DS7_BCD:PUSH HL DS7_BUF: .FILL 8,0 ; BUFFER FOR TIME, DATE AND CONTROL ;DS7_COLD .DB $80,$00,$00,$01,$01,$01,$00 ; COLD START RTC SETTINGS ; +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_DS7 .EQU $ +SIZ_DS7 .EQU END_DS7 - ORG_DS7 +; + MEMECHO "DS7 occupies " + MEMECHO SIZ_DS7 + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/dsrtc.asm b/Source/HBIOS/dsrtc.asm index 81015be0..ab3db523 100644 --- a/Source/HBIOS/dsrtc.asm +++ b/Source/HBIOS/dsrtc.asm @@ -162,6 +162,23 @@ DS2d8k .EQU %10101011 ; 2 DIODES 8K RESISTOR ; DSRTC_BUFSIZ .EQU 7 ; 7 BYTE BUFFER (YYMMDDHHMMSSWW) ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_DSRTC .EQU $ +; + .DW SIZ_DSRTC ; MODULE SIZE + .DW DSRTC_INITPHASE ; ADR OF INIT PHASE HANDLER +; +DSRTC_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,DSRTC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,DSRTC_INIT ; DO INIT + RET ; DONE +; ; RTC DEVICE PRE-INITIALIZATION ENTRY ; DSRTC_PREINIT: @@ -765,3 +782,14 @@ DSRTC_TIMBUF .FILL 6,0 ; 6 BYTES FOR GETTIM DSRTC_TIMDEF: ; DEFAULT TIME VALUE TO INIT CLOCK .DB $00,$01,$01 ; 2000-01-01 .DB $00,$00,$00 ; 00:00:00 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_DSRTC .EQU $ +SIZ_DSRTC .EQU END_DSRTC - ORG_DSRTC +; + MEMECHO "DSRTC occupies " + MEMECHO SIZ_DSRTC + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/duart.asm b/Source/HBIOS/duart.asm index c6ab5fc8..cc870b87 100644 --- a/Source/HBIOS/duart.asm +++ b/Source/HBIOS/duart.asm @@ -169,6 +169,23 @@ DUART_MR2_STOP2 .EQU %00001111 ; 2 STOP BITS (2.5 IF 5 BITS/CHAR) #DEFINE DUART_INP(RID) CALL DUART_INP_IMP \ .DB RID #DEFINE DUART_OUTP(RID) CALL DUART_OUTP_IMP \ .DB RID ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_DUART .EQU $ +; + .DW SIZ_DUART ; MODULE SIZE + .DW DUART_INITPHASE ; ADR OF INIT PHASE HANDLER +; +DUART_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,DUART_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,DUART_INIT ; DO INIT + RET ; DONE +; ; ; DUART_PREINIT: @@ -879,3 +896,14 @@ DUART1B_CFG: #ENDIF ; DUART_CFGCNT .EQU ($ - DUART_CFG) / DUART_CFGSIZ +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_DUART .EQU $ +SIZ_DUART .EQU END_DUART - ORG_DUART +; + MEMECHO "DUART occupies " + MEMECHO SIZ_DUART + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ef.asm b/Source/HBIOS/ef.asm index 63ba2bf4..14971a88 100644 --- a/Source/HBIOS/ef.asm +++ b/Source/HBIOS/ef.asm @@ -158,6 +158,23 @@ EF_SCREENSIZE .EQU EF_DROWS * EF_DLINES DEVECHO EF_BASE DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_EF .EQU $ +; + .DW SIZ_EF ; MODULE SIZE + .DW EF_INITPHASE ; ADR OF INIT PHASE HANDLER +; +EF_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,EF_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,EF_INIT ; DO INIT + RET ; DONE +; ;====================================================================== ; VDU DRIVER - INITIALIZATION ;====================================================================== @@ -1087,3 +1104,14 @@ EF_BUF: #IF (EF_SIZE = V40X24) .FILL 2*EF_DLINES*EF_DROWS ;512,0 #ENDIF +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_EF .EQU $ +SIZ_EF .EQU END_EF - ORG_EF +; + MEMECHO "EF occupies " + MEMECHO SIZ_EF + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/esp.asm b/Source/HBIOS/esp.asm index e8820e1d..60371887 100644 --- a/Source/HBIOS/esp.asm +++ b/Source/HBIOS/esp.asm @@ -58,6 +58,23 @@ ESP_CFG_BSYMSK .EQU 4 ; ESP BUSY MASK DEVECHO ESP_IOBASE DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_ESP .EQU $ +; + .DW SIZ_ESP ; MODULE SIZE + .DW ESP_INITPHASE ; ADR OF INIT PHASE HANDLER +; +ESP_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,ESP_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,ESP_INIT ; DO INIT + RET ; DONE +; ; GLOBAL ESP INITIALIZATION ; ESP_INIT: @@ -708,3 +725,14 @@ ESPSER1_CFG: ; ; ESPSER_DEVCNT .DB 0 ; ESPSER DEVICES COUNT +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_ESP .EQU $ +SIZ_ESP .EQU END_ESP - ORG_ESP +; + MEMECHO "ESP occupies " + MEMECHO SIZ_ESP + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/espsd.asm b/Source/HBIOS/espsd.asm index 3772f970..76b1c939 100644 --- a/Source/HBIOS/espsd.asm +++ b/Source/HBIOS/espsd.asm @@ -123,6 +123,23 @@ ESPSD_IOBASE .EQU 2 ; IO BASE ADDRESS (BYTE) ESPSD_STAT .EQU 3 ; LAST STATUS (BYTE) ESPSD_MEDCAP .EQU 4 ; MEDIA CAPACITY (DWORD) ESPSD_LBA .EQU 8 ; OFFSET OF LBA (DWORD) +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_ESPSD .EQU $ +; + .DW SIZ_ESPSD ; MODULE SIZE + .DW ESPSD_INITPHASE ; ADR OF INIT PHASE HANDLER +; +ESPSD_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,ESPSD_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,ESPSD_INIT ; DO INIT + RET ; DONE ; ESPSD_CFGSIZ .EQU 12 ; SIZE OF CFG TBL ENTRIES ; @@ -1030,3 +1047,14 @@ ESPSD_CMDVAL .DB 0 ; PENDING COMMAND FOR IO FUCNTIONS ESPSD_DSKBUF .DW 0 ; ACTIVE DISK BUFFER ; ESPSD_DEVNUM .DB 0 ; TEMP DEVICE NUM USED DURING INIT +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_ESPSD .EQU $ +SIZ_ESPSD .EQU END_ESPSD - ORG_ESPSD +; + MEMECHO "ESPSD occupies " + MEMECHO SIZ_ESPSD + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ez80cpudrv.asm b/Source/HBIOS/ez80cpu.asm similarity index 84% rename from Source/HBIOS/ez80cpudrv.asm rename to Source/HBIOS/ez80cpu.asm index 813869c4..e17ece9a 100644 --- a/Source/HBIOS/ez80cpudrv.asm +++ b/Source/HBIOS/ez80cpu.asm @@ -25,6 +25,24 @@ ; 4. Set Timer Tick Frequency ; +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_EZ80CPU .EQU $ +; + .DW SIZ_EZ80CPU ; MODULE SIZE + .DW EZ80CPU_INITPHASE ; ADR OF INIT PHASE HANDLER +; +EZ80CPU_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,EZ80_PREINIT ; DO PREINIT + ;CP HB_PHASE_INIT ; INIT PHASE? + ;JP Z,EZ80_INIT ; DO INIT + RET ; DONE + EZ80_PREINIT: EZ80_TMR_INT_DISABLE() @@ -330,3 +348,15 @@ _EZ80_EXTN_IY_TO_MB_IY: .DB $5B, $FD, $77, $02 ; LD.LIL (IY+2), A .DB $49, $FD, $E1 ; POP.L IY RET + +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_EZ80CPU .EQU $ +SIZ_EZ80CPU .EQU END_EZ80CPU - ORG_EZ80CPU +; + MEMECHO "EZ80CPU occupies " + MEMECHO SIZ_EZ80CPU + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ez80rtc.asm b/Source/HBIOS/ez80rtc.asm index 483739e1..85db3b80 100644 --- a/Source/HBIOS/ez80rtc.asm +++ b/Source/HBIOS/ez80rtc.asm @@ -7,6 +7,24 @@ EZ80RTC_BUFSIZ .EQU 6 ; SIX BYTE BUFFER (YYMMDDHHMMSS) ; ; RTC DEVICE INITIALIZATION ENTRY +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_EZ80RTC .EQU $ +; + .DW SIZ_EZ80RTC ; MODULE SIZE + .DW EZ80RTC_INITPHASE ; ADR OF INIT PHASE HANDLER +; +EZ80RTC_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,EZ80RTC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,EZ80RTC_INIT ; DO INIT + RET ; DONE + EZ80RTC_INIT: ; display driver install message ; delegate init function to firmware @@ -171,3 +189,14 @@ EZ80RTC_DT .DB 01 EZ80RTC_HH .DB 00 EZ80RTC_MM .DB 00 EZ80RTC_SS .DB 00 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_EZ80RTC .EQU $ +SIZ_EZ80RTC .EQU END_EZ80RTC - ORG_EZ80RTC +; + MEMECHO "EZ80RTC occupies " + MEMECHO SIZ_EZ80RTC + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ez80systmr.asm b/Source/HBIOS/ez80tmr.asm similarity index 65% rename from Source/HBIOS/ez80systmr.asm rename to Source/HBIOS/ez80tmr.asm index 7663a13d..f4abb3aa 100644 --- a/Source/HBIOS/ez80systmr.asm +++ b/Source/HBIOS/ez80tmr.asm @@ -11,6 +11,24 @@ ; HBIOS System calls SYS_GETTIMER, SYS_GETSECS, SYS_SETTIMER, SYS_SETSECS are implemented within HBIOS ; +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_EZ80TMR .EQU $ +; + .DW SIZ_EZ80TMR ; MODULE SIZE + .DW EZ80TMR_INITPHASE ; ADR OF INIT PHASE HANDLER +; +EZ80TMR_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,EZ80_TMR_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,EZ80_TMR_INIT ; DO INIT + RET ; DONE + #IF (EZ80TIMER == EZ80TMR_INT) EZ80_TMR_INIT: CALL NEWLINE ; FORMATTING @@ -86,3 +104,14 @@ SYS_SETSECS: EZ80_TMR_INIT: RET #ENDIF +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_EZ80TMR .EQU $ +SIZ_EZ80TMR .EQU END_EZ80TMR - ORG_EZ80TMR +; + MEMECHO "EZ80TMR occupies " + MEMECHO SIZ_EZ80TMR + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ez80uart.asm b/Source/HBIOS/ez80uart.asm index 2bc68322..0e9ae4d5 100644 --- a/Source/HBIOS/ez80uart.asm +++ b/Source/HBIOS/ez80uart.asm @@ -34,6 +34,24 @@ UART0_RBR .EQU $C0 LSR_THRE .EQU $20 LSR_DR .EQU $01 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_EZ80UART .EQU $ +; + .DW SIZ_EZ80UART ; MODULE SIZE + .DW EZ80UART_INITPHASE ; ADR OF INIT PHASE HANDLER +; +EZ80UART_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,EZUART_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,EZUART_INIT ; DO INIT + RET ; DONE + EZUART_PREINIT: LD BC, EZUART_FNTBL LD DE, EZUART_CFG @@ -322,3 +340,14 @@ EZUART_FNTBL: #IF (($ - EZUART_FNTBL) != (CIO_FNCNT * 2)) .ECHO "*** INVALID EZUART FUNCTION TABLE ***\n" #ENDIF +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_EZ80UART .EQU $ +SIZ_EZ80UART .EQU END_EZ80UART - ORG_EZ80UART +; + MEMECHO "EZ80UART occupies " + MEMECHO SIZ_EZ80UART + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/fd.asm b/Source/HBIOS/fd.asm index c94aa41a..b2083345 100644 --- a/Source/HBIOS/fd.asm +++ b/Source/HBIOS/fd.asm @@ -124,6 +124,23 @@ FRC_TOGETRES .EQU -13H ; ED FRC_TOEXEC .EQU -14H ; EC FRC_TOSEEKWT .EQU -15H ; EB ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_FD .EQU $ +; + .DW SIZ_FD ; MODULE SIZE + .DW FD_INITPHASE ; ADR OF INIT PHASE HANDLER +; +FD_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,FD_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,FD_INIT ; DO INIT + RET ; DONE +; ; FD DEVICE CONFIGURATION ; FD_DEVCNT .EQU FDCNT ; 2 DEVICES SUPPORTED @@ -2224,3 +2241,14 @@ FD_DSKBUF .DW 0 FD_CURGEOM .EQU $ ; TWO BYTES BELOW FD_CURSPT .DB 0 ; CURRENT SECTORS PER TRACK FD_CURHDS .DB 0 ; CURRENT HEADS +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_FD .EQU $ +SIZ_FD .EQU END_FD - ORG_FD +; + MEMECHO "FD occupies " + MEMECHO SIZ_FD + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/gdc.asm b/Source/HBIOS/gdc.asm index 3ded2170..e02a77e9 100644 --- a/Source/HBIOS/gdc.asm +++ b/Source/HBIOS/gdc.asm @@ -67,6 +67,23 @@ GDC_COLS .EQU 80 TERMENABLE .SET TRUE ; INCLUDE TERMINAL PSEUDODEVICE DRIVER KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_GDC .EQU $ +; + .DW SIZ_GDC ; MODULE SIZE + .DW GDC_INITPHASE ; ADR OF INIT PHASE HANDLER +; +GDC_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,GDC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,GDC_INIT ; DO INIT + RET ; DONE +; ;====================================================================== ; GDC DRIVER - INITIALIZATION ;====================================================================== @@ -355,3 +372,14 @@ GDC_IDAT: .DB KBDMODE_PS2 ; PS/2 8242 KEYBOARD CONTROLLER .DB GDC_KBDST .DB GDC_KBDDATA +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_GDC .EQU $ +SIZ_GDC .EQU END_GDC - ORG_GDC +; + MEMECHO "GDC occupies " + MEMECHO SIZ_GDC + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/gm7303.asm b/Source/HBIOS/gm7303.asm index 732926c0..72e48249 100644 --- a/Source/HBIOS/gm7303.asm +++ b/Source/HBIOS/gm7303.asm @@ -58,6 +58,23 @@ GM7303_FUNC_DDADR .EQU $80 ; SET DDRAM ADDRESS DEVECHO GM7303BASE DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_GM7303 .EQU $ +; + .DW SIZ_GM7303 ; MODULE SIZE + .DW GM7303_INITPHASE ; ADR OF INIT PHASE HANDLER +; +GM7303_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,GM7303_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,GM7303_INIT ; DO INIT + RET ; DONE +; ; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION ; GM7303_PREINIT: @@ -639,3 +656,14 @@ GM7303_MSG_LDR_LOAD .DB "Load...",0 GM7303_MSG_LDR_GO .DB "Go...",0 GM7303_MSG_MON_RDY .DB "-CPU UP-",0 GM7303_MSG_MON_BOOT .DB "Boot!",0 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_GM7303 .EQU $ +SIZ_GM7303 .EQU END_GM7303 - ORG_GM7303 +; + MEMECHO "GM7303 occupies " + MEMECHO SIZ_GM7303 + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/h8p.asm b/Source/HBIOS/h8p.asm index 0996b5b3..a8c16ac8 100644 --- a/Source/HBIOS/h8p.asm +++ b/Source/HBIOS/h8p.asm @@ -39,6 +39,23 @@ H8FPIO .EQU $F0 DEVECHO H8FPIO DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_H8P .EQU $ +; + .DW SIZ_H8P ; MODULE SIZE + .DW H8P_INITPHASE ; ADR OF INIT PHASE HANDLER +; +H8P_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,H8P_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,H8P_INIT ; DO INIT + RET ; DONE +; ;__H8P_PREINIT_______________________________________________________________________________________ ; ; CONFIGURE AND RESET PANEL @@ -972,3 +989,14 @@ H8P_UPTIME: .DW 0 H8P_UPTDIG: .DB 0,0,0,0,0,0,0,0,0 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_H8P .EQU $ +SIZ_H8P .EQU END_H8P - ORG_H8P +; + MEMECHO "H8P occupies " + MEMECHO SIZ_H8P + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index 59d6bb34..44321c0c 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -1630,6 +1630,8 @@ BOOTWAIT: ; THE NORMAL DIAG() OR FPLEDS() MACROS WHICH DEPEND UPON A STACK. ; SO, JUST HACK THE VALUES IN PLACE. ; +; FPLEDS(DIAG_02) +; #IF (FPLED_ENABLE) #IF (FPLED_INV) LD A,~DIAG_01 @@ -1639,10 +1641,10 @@ BOOTWAIT: ; EZ80_IO() OUT (FPLED_IO),A - #ENDIF ; - +; DIAG(1) +; #IF (LEDENABLE) #IF ((LEDMODE == LEDMODE_STD) | (LEDMODE == LEDMODE_SC)) XOR A ; LED IS INVERTED, TURN IT ON @@ -2497,73 +2499,153 @@ HB_CPU1: LD A,L LD (HB_CPUTYPE),A ; -;-------------------------------------------------------------------------------------------------- -; EARLY DRIVER INITIALIZATION -;-------------------------------------------------------------------------------------------------- +; PRE-INIT OSCILLATOR SPEED AND SPEED COMPENSATED DELAY FROM CONFIG ; -; SOME DRIVERS NEED TO BE CALLED AS EARLY AS WE CAN ONCE AN OPERATING -; ENVIRONMENT IS ESTABLISHED. -; -#IF (CPUFAM == CPU_EZ80) - ; THIS WILL RE-ASSIGN HB_CPUTYPE - CALL EZ80_PREINIT -#ENDIF -#IF (SN76489ENABLE) - ; SN76489 CHIP GENERATES UGLY NOISE AFTER HARDWARE RESET. - ; WE CALL THIS DRIVER'S PREINIT ASAP TO SHUT OFF THE NOISE. - CALL SN76489_PREINIT -#ENDIF -#IF (DSRTCENABLE) - ; THE DSRTC NEEDS TO BE INITIALIZED IN ORDER TO PERFORM THE - ; CPU SPEED DETECTION BELOW. - CALL DSRTC_PREINIT + LD A,CPUMHZ ; CPU SPD IN MHZ + LD (CB_CPUMHZ),A ; INIT HB_CPUMHZ +#IF (CPUFAM != CPU_EZ80) + CALL DELAY_INIT ; ... AND SPEED COMPENSATED DELAY #ENDIF + LD HL,CPUOSC / 1000 ; OSC SPD IN KHZ + LD (HB_CPUOSC),HL ; INIT HB_CPUOSC DEFAULT +;;;; +;;;;-------------------------------------------------------------------------------------------------- +;;;; EARLY DRIVER INITIALIZATION +;;;;-------------------------------------------------------------------------------------------------- +;;;; +;;;; SOME DRIVERS NEED TO BE CALLED AS EARLY AS WE CAN ONCE AN OPERATING +;;;; ENVIRONMENT IS ESTABLISHED. +;;;; +;;;#IF (CPUFAM == CPU_EZ80) +;;; ; THIS WILL RE-ASSIGN HB_CPUTYPE +;;; CALL EZ80_PREINIT +;;;#ENDIF +;;;#IF (SN76489ENABLE) +;;; ; SN76489 CHIP GENERATES UGLY NOISE AFTER HARDWARE RESET. +;;; ; WE CALL THIS DRIVER'S PREINIT ASAP TO SHUT OFF THE NOISE. +;;; CALL SN76489_PREINIT +;;;#ENDIF +;;;#IF (DSRTCENABLE) +;;; ; THE DSRTC NEEDS TO BE INITIALIZED IN ORDER TO PERFORM THE +;;; ; CPU SPEED DETECTION BELOW. +;;; CALL DSRTC_PREINIT +;;;#ENDIF +;;;; +;;;;-------------------------------------------------------------------------------------------------- +;;;; DSKY INITIALIZATION AND ANNOUNCEMENT +;;;;-------------------------------------------------------------------------------------------------- +;;;; +;;;#IF (ICMENABLE) +;;; CALL ICM_PREINIT +;;;#ENDIF +;;;#IF (PKDENABLE) +;;; CALL PKD_PREINIT +;;;#ENDIF +;;;#IF (LCDENABLE) +;;; CALL LCD_PREINIT +;;;#ENDIF +;;;#IF (H8PENABLE) +;;; CALL H8P_PREINIT +;;;#ENDIF +;;;#IF (GM7303ENABLE) +;;; CALL GM7303_PREINIT +;;;#ENDIF +; + FPLEDS(DIAG_05) + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + ; ;-------------------------------------------------------------------------------------------------- -; DSKY INITIALIZATION AND ANNOUNCEMENT +; PRE-CONSOLE INITIALIZATION ;-------------------------------------------------------------------------------------------------- ; -;;;#IF (DSKYENABLE) -#IF (ICMENABLE) - CALL ICM_PREINIT -#ENDIF -#IF (PKDENABLE) - CALL PKD_PREINIT -#ENDIF -; - ;;;; ANNOUNCE OURSELVES ON DSKY - ;;;LD HL,MSG_HBVER + 5 - ;;;LD A,(DSKY_HEXMAP + RMJ) - ;;;OR $80 - ;;;LD (HL),A - ;;;INC HL - ;;;LD A,(DSKY_HEXMAP + RMN) - ;;;OR $80 - ;;;LD (HL),A - ;;;INC HL - ;;;LD A,(DSKY_HEXMAP + RUP) - ;;;LD (HL),A - ;;;LD HL,MSG_HBVER - ;;;LD B,BF_DSKYSHOWSEG - ;;;CALL DSKY_DISPATCH -;;;#ENDIF -#IF (LCDENABLE) - CALL LCD_PREINIT -#ENDIF -#IF (H8PENABLE) - CALL H8P_PREINIT -#ENDIF -#IF (GM7303ENABLE) - CALL GM7303_PREINIT +#IF (WBWDEBUG == USEMIO) ; BUFFER OUTPUT UNTIL + CALL MIO_INIT ; WE GET TO BOOT MESSAGE #ENDIF ; - FPLEDS(DIAG_05) +#IF FALSE ; -; INIT OSCILLATOR SPEED FROM CONFIG +; TEST DEBUG *************************************************************************************** ; -#IF (CPUFAM != CPU_EZ80) - LD HL,CPUOSC / 1000 ; OSC SPD IN KHZ - LD (HB_CPUOSC),HL ; INIT HB_CPUOSC DEFAULT + CALL NEWLINE + CALL REGDMP +; +; TEST DEBUG *************************************************************************************** +; +#ENDIF +;;;; +;;;; PLATFORM SPECIFIC CODE FOR DETECTING RECOVERY MODE SWITCH +;;;; +;;;#IF (BT_REC_TYPE != BT_REC_NONE) +;;; #IF (BT_REC_TYPE == BT_REC_FORCE) +;;; LD A,1 ; SET FOR RECOVERY MODE +;;; LD (HB_BOOT_REC),A ; SAVE FOR LATER +;;; #ENDIF +;;; #IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_MBC)) +;;; #IF (BT_REC_TYPE == BT_REC_SBCB0) +;;; LD A,%00100000 ; DISABLE RTC AND +;;; OUT (RTCIO),A ; DRQ DRIVER READ +;;; IN A,(RTCIO) ; BIT 0 (DRQ). +;;; CPL ; PULLED HIGH +;;; AND 1 ; IS RECOVERY MODE +;;; LD (HB_BOOT_REC),A ; SAVE FOR LATER +;;; #ENDIF +;;; #IF (BT_REC_TYPE == BT_REC_SBC1B) +;;; IN A,(RTCIO) ; RTC PORT, BIT 6 HAS THE +;;; BIT 6,A ; STATE OF CONFIG JUMPER +;;; LD A,1 ; JUMPER INSTALLED +;;; JR Z,SAVE_REC_M ; IS RECOVERY MODE +;;; LD A,0 +;;;SAVE_REC_M: +;;; LD (HB_BOOT_REC),A ; SAVE FOR LATER +;;; #ENDIF +;;; #IF (BT_REC_TYPE == BT_REC_SBCRI) +;;; IN A,($68 + 6) ; UART_MSR MODEM +;;; BIT 6,A ; STATUS REGISTER +;;; LD A,0 ; BIT 6 +;;; JR Z,SAVE_REC_M ; IS RECOVERY MODE +;;; LD A,1 +;;;SAVE_REC_M: +;;; LD (HB_BOOT_REC),A ; SAVE FOR LATER +;;; #ENDIF +;;; #ENDIF +;;; #IF ((PLATFORM == PLT_DUO) +;;; #IF (BT_REC_TYPE == BT_REC_DUORI) +;;; IN A,($78 + 6) ; UART_MSR MODEM +;;; BIT 6,A ; STATUS REGISTER +;;; LD A,0 ; BIT 6 +;;; JR Z,SAVE_REC_M ; IS RECOVERY MODE +;;; LD A,1 +;;;SAVE_REC_M: +;;; LD (HB_BOOT_REC),A ; SAVE FOR LATER +;;; #ENDIF +;;; #ENDIF +;;;#ENDIF +;;;; +;;; LD DE,HB_PCINITTBL ; POINT TO PRECONSOLE INIT TABLE +;;; LD B,HB_PCINITTBLLEN ; NUMBER OF ENTRIES +;;;; +;;;#IF (BT_REC_TYPE != BT_REC_NONE) +;;; LD A,(HB_BOOT_REC) ; IF WE ARE IN RECOVERY MODE +;;; OR A ; POINT TO THE RECOVER MODE +;;; JR Z,NOT_REC_M0 ; INITIALIZATION TABLE +;;; LD B,HB_PCINITRLEN +;;; LD DE,HB_PCINIT_REC +;;;NOT_REC_M0: +;;;; +;;;#ENDIF +;;;; +;;; ; CYCLE THROUGH THE INITIALIZATION TABLE CALLING THE PRE-INIT +;;; ; ENTRY POINT OF ALL DRIVERS. +;;; CALL CALLLIST ; PROCESS THE PRE-INIT CALL TABLE +; + ; SET INIT PHASE TO PREINIT AND CALL ALL MODULES + LD A,HB_PHASE_PREINIT ; PHASE = PREINIT + LD (HB_CURPHASE),A ; SAVE IT + CALL MODINIT ; WALK THE MODULE LIST, A=PHASE +; +; MEASURE RUNNING CPU SPEED DYNAMICALLY IF POSSIBLE ; ; ATTEMPT DYNAMIC CPU SPEED DERIVATION ; NOTE THAT FOR PLATFORMS WITH SOFTWARE SELECTABLE CPU SPEED, @@ -2573,8 +2655,6 @@ HB_CPU1: ; CALL HB_CPUSPD ; DYNAMIC CPU SPEED DETECTION JR NZ,HB_CPU2 ; SKIP AHEAD IF FAILED -; - ; RECORD THE UPDATED CPU OSCILLATOR SPEED ; #IF ((CPUFAM == CPU_Z180) | (CPUSPDCAP == SPD_HILO) | (PLATFORM=PLT_HEATH)) ; SPEED MEASURED WILL BE HALF OSCILLATOR SPEED @@ -2585,10 +2665,10 @@ HB_CPU1: RL H #ENDIF ; + ; RECORD THE UPDATED CPU OSCILLATOR SPEED LD (HB_CPUOSC),HL ; RECORD MEASURED SPEED ; HB_CPU2: -#ENDIF ; ;-------------------------------------------------------------------------------------------------- ; FINALIZE OPERATING CPU SPEED @@ -2752,7 +2832,7 @@ HB_CPU3: #ENDIF ; ;-------------------------------------------------------------------------------------------------- -; INITIALIZE SPEED-COMPENSATED DELAY FUNCTIONS +; FINALIZE SPEED-COMPENSATED DELAY FUNCTIONS ;-------------------------------------------------------------------------------------------------- ; ;;; LOCATION OF THIS CODE??? @@ -2778,18 +2858,18 @@ HB_CPU3: #ENDIF ; #ENDIF -; -#IF (KIOENABLE) - CALL KIO_PREINIT -#ENDIF -; -#IF (CTCENABLE) - CALL CTC_PREINIT -#ENDIF -; -#IF (PLATFORM == PLT_NABU) - CALL NABU_PREINIT -#ENDIF +;;;; +;;;#IF (KIOENABLE) +;;; CALL KIO_PREINIT +;;;#ENDIF +;;;; +;;;#IF (CTCENABLE) +;;; CALL CTC_PREINIT +;;;#ENDIF +;;;; +;;;#IF (PLATFORM == PLT_NABU) +;;; CALL NABU_PREINIT +;;;#ENDIF ; #IF (CPUFAM == CPU_Z180) ; @@ -2879,90 +2959,6 @@ Z280_TC .EQU CPUOSC / 4 / 50 / 2 ; TIME CONSTANT ; FPLEDS(DIAG_06) ; -;-------------------------------------------------------------------------------------------------- -; PRE-CONSOLE INITIALIZATION -;-------------------------------------------------------------------------------------------------- -; -#IF (WBWDEBUG == USEMIO) ; BUFFER OUTPUT UNTIL - CALL MIO_INIT ; WE GET TO BOOT MESSAGE -#ENDIF -; -#IF FALSE -; -; TEST DEBUG *************************************************************************************** -; - CALL NEWLINE - CALL REGDMP -; -; TEST DEBUG *************************************************************************************** -; -#ENDIF -; -; PLATFORM SPECIFIC CODE FOR DETECTING RECOVERY MODE SWITCH -; -#IF (BT_REC_TYPE != BT_REC_NONE) - #IF (BT_REC_TYPE == BT_REC_FORCE) - LD A,1 ; SET FOR RECOVERY MODE - LD (HB_BOOT_REC),A ; SAVE FOR LATER - #ENDIF - #IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_MBC)) - #IF (BT_REC_TYPE == BT_REC_SBCB0) - LD A,%00100000 ; DISABLE RTC AND - OUT (RTCIO),A ; DRQ DRIVER READ - IN A,(RTCIO) ; BIT 0 (DRQ). - CPL ; PULLED HIGH - AND 1 ; IS RECOVERY MODE - LD (HB_BOOT_REC),A ; SAVE FOR LATER - #ENDIF - #IF (BT_REC_TYPE == BT_REC_SBC1B) - IN A,(RTCIO) ; RTC PORT, BIT 6 HAS THE - BIT 6,A ; STATE OF CONFIG JUMPER - LD A,1 ; JUMPER INSTALLED - JR Z,SAVE_REC_M ; IS RECOVERY MODE - LD A,0 -SAVE_REC_M: - LD (HB_BOOT_REC),A ; SAVE FOR LATER - #ENDIF - #IF (BT_REC_TYPE == BT_REC_SBCRI) - IN A,($68 + 6) ; UART_MSR MODEM - BIT 6,A ; STATUS REGISTER - LD A,0 ; BIT 6 - JR Z,SAVE_REC_M ; IS RECOVERY MODE - LD A,1 -SAVE_REC_M: - LD (HB_BOOT_REC),A ; SAVE FOR LATER - #ENDIF - #ENDIF - #IF ((PLATFORM == PLT_DUO) - #IF (BT_REC_TYPE == BT_REC_DUORI) - IN A,($78 + 6) ; UART_MSR MODEM - BIT 6,A ; STATUS REGISTER - LD A,0 ; BIT 6 - JR Z,SAVE_REC_M ; IS RECOVERY MODE - LD A,1 -SAVE_REC_M: - LD (HB_BOOT_REC),A ; SAVE FOR LATER - #ENDIF - #ENDIF -#ENDIF -; - LD DE,HB_PCINITTBL ; POINT TO PRECONSOLE INIT TABLE - LD B,HB_PCINITTBLLEN ; NUMBER OF ENTRIES -; -#IF (BT_REC_TYPE != BT_REC_NONE) - LD A,(HB_BOOT_REC) ; IF WE ARE IN RECOVERY MODE - OR A ; POINT TO THE RECOVER MODE - JR Z,NOT_REC_M0 ; INITIALIZATION TABLE - LD B,HB_PCINITRLEN - LD DE,HB_PCINIT_REC -NOT_REC_M0: -; -#ENDIF -; - ; CYCLE THROUGH THE INITIALIZATION TABLE CALLING THE PRE-INIT - ; ENTRY POINT OF ALL DRIVERS. - CALL CALLLIST ; PROCESS THE PRE-INIT CALL TABLE -; #IF FALSE ; ; TEST DEBUG *************************************************************************************** @@ -3684,20 +3680,25 @@ HB_ROMCKZ: ; CALL NEWLINE -#IF (BT_REC_TYPE != BT_REC_NONE) - LD A,(HB_BOOT_REC) ; IF WE ARE IN RECOVERY MODE - OR A ; POINT TO THE RECOVER MODE - JR Z,NOT_REC_M1 ; INITIALIZATION TABLE - LD B,HB_INITRLEN - LD DE,HB_INIT_REC - JR IS_REC_M1 -#ENDIF - -NOT_REC_M1: - LD B,HB_INITTBLLEN - LD DE,HB_INITTBL -IS_REC_M1: - CALL CALLLIST +;;;#IF (BT_REC_TYPE != BT_REC_NONE) +;;; LD A,(HB_BOOT_REC) ; IF WE ARE IN RECOVERY MODE +;;; OR A ; POINT TO THE RECOVER MODE +;;; JR Z,NOT_REC_M1 ; INITIALIZATION TABLE +;;; LD B,HB_INITRLEN +;;; LD DE,HB_INIT_REC +;;; JR IS_REC_M1 +;;;#ENDIF +;;; +;;;NOT_REC_M1: +;;; LD B,HB_INITTBLLEN +;;; LD DE,HB_INITTBL +;;;IS_REC_M1: +;;; CALL CALLLIST ; PROCESS THE INIT CALL TABLE +; + ; SET INIT PHASE TO INIT AND CALL ALL MODULES + LD A,HB_PHASE_INIT ; PHASE = INIT + LD (HB_CURPHASE),A ; SAVE IT + CALL MODINIT ; WALK THE MODULE LIST, A=PHASE ; ;-------------------------------------------------------------------------------------------------- ; NV-SWITCH INITIALISATION @@ -3824,20 +3825,6 @@ HB_CRTACT: ; --1 FORCE PROPELLER CONSOLE (SCON) ; 110 NORMAL USB SERIAL BOOT ; - ;;;; WE ASSUME THAT THE ONBOARD VGA (TVGA) IS ALWAYS DETECTED AND - ;;;; WILL BE THE CURRENT CRTDEV. SCON IS ASSUMED TO BE THE - ;;;; DEVICE AT CRTDEV + 1. THESE ARE REASONABLE ASSUMPTIONS - ;;;; UNLESS THE DRIVER DETECTION OR DRIVER ORDER IS CHANGED. - ;;;IN A,($36) ; GET IO BYTE - ;;;AND %00000110 ; ISOLATE BITS - ;;;JR Z,HB_CRTACT ; FORCE ONBOARD CRT - ;;;IN A,($36) ; GET IO BYTE - ;;;AND %00000001 ; ISOLATE BIT - ;;;JR Z,INITSYS3 ; NORMAL USB SERIAL BOOT - ;;;LD A,(CB_CRTDEV) ; GET CRT DEV - ;;;INC A ; SWITCH FROM TVGA -> SCON - ;;;LD (CB_CRTDEV),A ; SAVE IT AND DO CONSOLE SWITCH - ; IF ONBOARD VGA/PS2 KBD IS REQUESTED, SETUP FOR CONSOLE SWITCH IN A,($36) ; GET IO BYTE AND %00000110 ; ISOLATE BITS @@ -4123,388 +4110,384 @@ INITSYS4: LD IX,0 ; ENTER AT ADDRESS 0 CALL HBX_BNKCALL ; GO THERE JR $ ; HALT WE SHOULD NEVER COME BACK! +;;;; +;;;;-------------------------------------------------------------------------------------------------- +;;;; TABLE OF RECOVERY MODE INITIALIZATION ENTRY POINTS +;;;;-------------------------------------------------------------------------------------------------- +;;;; +;;;; USE "CALLDUMMY" IF NO ENTRY REQUIRED +;;;; +;;;#IF (BT_REC_TYPE != BT_REC_NONE) +;;;; +;;;HB_PCINIT_REC: +;;;; +;;; #IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_MBC) | (PLATFORM == PLT_DUO)) +;;; .DW UART_PREINIT +;;;; .DW CALLDUMMY +;;; #ENDIF +;;;; +;;;HB_PCINITRLEN .EQU (($ - HB_PCINIT_REC) / 2) +;;;; +;;;HB_INIT_REC: +;;;; +;;; #IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_MBC) | (PLATFORM == PLT_DUO)) +;;; .DW UART_INIT +;;; .DW MD_INIT +;;; .DW PPIDE_INIT +;;; #ENDIF +;;;; +;;;HB_INITRLEN .EQU (($ - HB_INIT_REC) / 2) +;;;; +;;;#ENDIF +;;;; +;;;;-------------------------------------------------------------------------------------------------- +;;;; TABLE OF PRE-CONSOLE INITIALIZATION ENTRY POINTS +;;;;-------------------------------------------------------------------------------------------------- +;;;; +;;;HB_PCINITTBL: +;;;; +;;;#IF (ASCIENABLE) +;;; .DW ASCI_PREINIT +;;;#ENDIF +;;;#IF (Z2UENABLE) +;;; .DW Z2U_PREINIT +;;;#ENDIF +;;;#IF (TSERENABLE) +;;; .DW TSER_PREINIT +;;;#ENDIF +;;;#IF (UARTENABLE) +;;; .DW UART_PREINIT +;;;#ENDIF +;;;#IF (DUARTENABLE) +;;; .DW DUART_PREINIT +;;;#ENDIF +;;;#IF (SIOENABLE) +;;; .DW SIO_PREINIT +;;;#ENDIF +;;;#IF (SCCENABLE) +;;; .DW SCC_PREINIT +;;;#ENDIF +;;;#IF (EZ80UARTENABLE) +;;; .DW EZUART_PREINIT +;;;#ENDIF +;;;#IF (ACIAENABLE) +;;; .DW ACIA_PREINIT +;;;#ENDIF +;;;#IF (SSERENABLE) +;;; .DW SSER_PREINIT +;;;#ENDIF +;;;#IF (DLPSERENABLE) +;;; .DW DLPSER_PREINIT +;;;#ENDIF +;;;#IF (UFENABLE) +;;; .DW UF_PREINIT +;;;#ENDIF +;;;#IF (CVDUENABLE) +;;; .DW CVDU_PREINIT +;;;#ENDIF +;;;#IF (VGAENABLE) +;;; .DW VGA_PREINIT +;;;#ENDIF +;;;#IF (GDCENABLE) +;;; .DW GDC_PREINIT +;;;#ENDIF +;;;#IF (TMSENABLE) +;;; .DW TMS_PREINIT +;;;#ENDIF +;;;#IF (SCONENABLE) +;;; .DW SCON_PREINIT +;;;#ENDIF +;;; .DW TERM_PREINIT ; ALWAYS DO THIS ONE +;;;#IF (PIOENABLE) +;;; .DW PIO_PREINIT +;;;#ENDIF +;;;#IF (PIO_4P | PIO_ZP) +;;; .DW PIO_PREINIT +;;;#ENDIF +;;;#IF (XOSENABLE) +;;; .DW XOS_PREINIT +;;;#ENDIF +;;;; +;;;HB_PCINITTBLLEN .EQU (($ - HB_PCINITTBL) / 2) +;;;; +;;;;================================================================================================== +;;;; TABLE OF INITIALIZATION ENTRY POINTS +;;;;================================================================================================== +;;;; +;;;HB_INITTBL: +;;;; +;;;#IF (CHNATIVEENABLE) +;;; ; NEED TO ENUMERATE USB DEVICES EARLY, SO THAT ACTUAL DRIVERS +;;; ; WILL BE ABLE TO FIND THEM. +;;; #IF (CHNATIVEFORCE) +;;; .DW CHNATIVE_INITF +;;; #ELSE +;;; .DW CHNATIVE_INIT +;;; #ENDIF +;;;#ENDIF +;;;#IF (KIOENABLE) +;;; .DW KIO_INIT +;;;#ENDIF +;;;#IF (CTCENABLE) +;;; .DW CTC_INIT +;;;#ENDIF +;;;#IF (PCFENABLE) +;;; .DW PCF_INIT +;;;#ENDIF +;;;#IF (ICMENABLE) +;;; .DW ICM_INIT +;;;#ENDIF +;;;#IF (PKDENABLE) +;;; .DW PKD_INIT +;;;#ENDIF +;;;#IF (LCDENABLE) +;;; .DW LCD_INIT +;;;#ENDIF +;;;#IF (H8PENABLE) +;;; .DW H8P_INIT +;;;#ENDIF +;;;#IF (GM7303ENABLE) +;;; .DW GM7303_INIT +;;;#ENDIF +;;;#IF (PLATFORM == PLT_NABU) +;;; .DW NABU_INIT +;;;#ENDIF +;;;#IF (AY38910ENABLE) +;;; .DW AY38910_INIT ; AUDIBLE INDICATOR OF BOOT START +;;;#ENDIF +;;;#IF (SN76489ENABLE) +;;; .DW SN76489_INIT +;;;#ENDIF +;;;#IF (YM2612ENABLE) +;;; .DW YM2612_INIT +;;;#ENDIF +;;;#IF (SPKENABLE) +;;; .DW SP_INIT ; AUDIBLE INDICATOR OF BOOT START +;;;#ENDIF +;;;#IF (ASCIENABLE) +;;; .DW ASCI_INIT +;;;#ENDIF +;;;#IF (Z2UENABLE) +;;; .DW Z2U_INIT +;;;#ENDIF +;;;#IF (TSERENABLE) +;;; .DW TSER_INIT +;;;#ENDIF +;;;#IF (UARTENABLE) +;;; .DW UART_INIT +;;;#ENDIF +;;;#IF (DUARTENABLE) +;;; .DW DUART_INIT +;;;#ENDIF +;;;#IF (SIOENABLE) +;;; .DW SIO_INIT +;;;#ENDIF +;;;#IF (SCCENABLE) +;;; .DW SCC_INIT +;;;#ENDIF +;;;#IF (EZ80UARTENABLE) +;;; .DW EZUART_INIT +;;;#ENDIF +;;;#IF (ACIAENABLE) +;;; .DW ACIA_INIT +;;;#ENDIF +;;;#IF (SSERENABLE) +;;; .DW SSER_INIT +;;;#ENDIF +;;;#IF (DLPSERENABLE) +;;; .DW DLPSER_INIT +;;;#ENDIF +;;;#IF (UFENABLE) +;;; .DW UF_INIT +;;;#ENDIF +;;;#IF (DSRTCENABLE) +;;; .DW DSRTC_INIT +;;;#ENDIF +;;;#IF (DS1501RTCENABLE) +;;; .DW DS1501RTC_INIT +;;;#ENDIF +;;;#IF (BQRTCENABLE) +;;; .DW BQRTC_INIT +;;;#ENDIF +;;;#IF (SIMRTCENABLE) +;;; .DW SIMRTC_INIT +;;;#ENDIF +;;;#IF (DS7RTCENABLE) +;;; .DW DS7RTC_INIT +;;;#ENDIF +;;;#IF (DS5RTCENABLE) +;;; .DW DS5RTC_INIT +;;;#ENDIF +;;;#IF (RP5RTCENABLE) +;;; .DW RP5RTC_INIT +;;;#ENDIF +;;;#IF (EZ80RTCENABLE) +;;; .DW EZ80RTC_INIT +;;;#ENDIF +;;;#IF (PCRTCENABLE) +;;; .DW PCRTC_INIT +;;;#ENDIF +;;;#IF (MMRTCENABLE) +;;; .DW MMRTC_INIT +;;;#ENDIF +;;;#IF (DS12RTCENABLE) +;;; .DW DS12RTC_INIT +;;;#ENDIF +;;;#IF (INTRTCENABLE) +;;; .DW INTRTC_INIT +;;;#ENDIF +;;;#IF (CPUFAM == CPU_EZ80) +;;; ; INITALISE ONE OF THE SUPPORTED SYSTEM TIMER TICKS DRIVERS +;;; .DW EZ80_TMR_INIT +;;;#ENDIF +;;;#IF (M6242RTCENABLE) +;;; .DW M6242RTC_INIT +;;;#ENDIF +;;;#IF (VDUENABLE) +;;; .DW VDU_INIT +;;;#ENDIF +;;;#IF (CVDUENABLE) +;;; .DW CVDU_INIT +;;;#ENDIF +;;;#IF (VGAENABLE) +;;; .DW VGA_INIT +;;;#ENDIF +;;;#IF (GDCENABLE) +;;; .DW GDC_INIT +;;;#ENDIF +;;;#IF (TMSENABLE) +;;; .DW TMS_INIT +;;;#ENDIF +;;;#IF (EFENABLE) +;;; .DW EF_INIT +;;;#ENDIF +;;;#IF (VRCENABLE) +;;; .DW VRC_INIT +;;;#ENDIF +;;;#IF (TVGAENABLE) +;;; .DW TVGA_INIT +;;;#ENDIF +;;;#IF (SCONENABLE) +;;; .DW SCON_INIT +;;;#ENDIF +;;;#IF (XOSENABLE) +;;; .DW XOS_INIT +;;;#ENDIF +;;;#IF (LPTENABLE) +;;; .DW LPT_INIT +;;;#ENDIF +;;;#IF (PIOENABLE) +;;; .DW PIO_INIT +;;;#ENDIF +;;;#IF (PIO_4P | PIO_ZP) +;;; .DW PIO_INIT +;;;#ENDIF +;;;#IF (DMAENABLE) +;;; .DW DMA_INIT +;;;#ENDIF +;;;#IF (MDENABLE) +;;; .DW MD_INIT +;;;#ENDIF +;;;#IF (FDENABLE) +;;; .DW FD_INIT +;;;#ENDIF +;;;#IF (RFENABLE) +;;; .DW RF_INIT +;;;#ENDIF +;;;#IF (IDEENABLE) +;;; .DW IDE_INIT +;;;#ENDIF +;;;#IF (PPIDEENABLE) +;;; .DW PPIDE_INIT +;;;#ENDIF +;;;#IF (SDENABLE) +;;; .DW SD_INIT +;;;#ENDIF +;;;#IF (HDSKENABLE) +;;; .DW HDSK_INIT +;;;#ENDIF +;;;#IF (PPAENABLE) +;;; .DW PPA_INIT +;;;#ENDIF +;;;#IF (IMMENABLE) +;;; .DW IMM_INIT +;;;#ENDIF +;;;#IF (SYQENABLE) +;;; .DW SYQ_INIT +;;;#ENDIF +;;;#IF (CHENABLE) +;;; .DW CH_INIT +;;;#ENDIF +;;;#IF (ESPSDENABLE) +;;; .DW ESPSD_INIT +;;;#ENDIF +;;;#IF (SCSIENABLE) +;;; .DW SCSI_INIT +;;;#ENDIF +;;;#IF (PRPENABLE) +;;; .DW PRP_INIT +;;;#ENDIF +;;;#IF (PPPENABLE) +;;; .DW PPP_INIT +;;;#ENDIF +;;;#IF (ESPENABLE) +;;; .DW ESP_INIT +;;;#ENDIF +;;;#IF (CHSCSIENABLE) +;;; .DW CHSCSI_INIT +;;;#ENDIF +;;;#IF (CHUFIENABLE) +;;; .DW CHUFI_INIT +;;;#ENDIF +;;;; +;;;HB_INITTBLLEN .EQU (($ - HB_INITTBL) / 2) +; +HB_SYSINIT_END .EQU $ +; +;================================================================================================== +; BIOS FUNCTION DISPATCHER +;================================================================================================== +; +HB_DISP_BEG .EQU $ ; ;-------------------------------------------------------------------------------------------------- -; TABLE OF RECOVERY MODE INITIALIZATION ENTRY POINTS +; HIGH LEVEL FUNCTION DISPATCHER ;-------------------------------------------------------------------------------------------------- ; -; USE "CALLDUMMY" IF NO ENTRY REQUIRED -; -#IF (BT_REC_TYPE != BT_REC_NONE) +; JUMP TO FUNCTION GROUP SPECIFIC DISPATCHER. THE FUNCTION GROUP +; IS BASED ON THE TOP NIBBLE OF THE FUNCTION NUMBER. ; -HB_PCINIT_REC: +; ENTRY: B=FUNCTION ; - #IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_MBC) | (PLATFORM == PLT_DUO)) - .DW UART_PREINIT -; .DW CALLDUMMY - #ENDIF +HB_DISPATCH: ; -HB_PCINITRLEN .EQU (($ - HB_PCINIT_REC) / 2) +#IF (MEMMGR == MM_Z280) + ; FOR Z280 MEMMGR, WE DISPATCH VIA THE Z280 SYSCALL. + ; THE SYSCALL MECHANISM WILL DISABLE INTERRUPTS. IN + ; GENERAL, INTERRUPTS ARE OK DURING API PROCESSING, + ; SO ENABLE THEM HERE. + HB_EI +#ENDIF ; -HB_INIT_REC: +; STACK INTEGRITY DIAGNOSTIC CHECK ; - #IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_MBC) | (PLATFORM == PLT_DUO)) - .DW UART_INIT - .DW MD_INIT - .DW PPIDE_INIT - #ENDIF +#IF FALSE ; *DEBUG* START ; -HB_INITRLEN .EQU (($ - HB_INIT_REC) / 2) + CALL HB_DISPATCH1 ; DO THE WORK ; -#ENDIF + ; CHECK STACK INTEGRITY + PUSH AF + LD A,(HB_STACK - HB_STKSIZ + $08) + CP $FF + SYSCHKERR(ERR_INTERNAL) + LD A,$FF + LD (HB_STACK - HB_STKSIZ + $08),A + POP AF + RET ; -;-------------------------------------------------------------------------------------------------- -; TABLE OF PRE-CONSOLE INITIALIZATION ENTRY POINTS -;-------------------------------------------------------------------------------------------------- +HB_DISPATCH1: ; -HB_PCINITTBL: -; -#IF (ASCIENABLE) - .DW ASCI_PREINIT -#ENDIF -#IF (Z2UENABLE) - .DW Z2U_PREINIT -#ENDIF -#IF (TSERENABLE) - .DW TSER_PREINIT -#ENDIF -#IF (UARTENABLE) - .DW UART_PREINIT -#ENDIF -#IF (DUARTENABLE) - .DW DUART_PREINIT -#ENDIF -#IF (SIOENABLE) - .DW SIO_PREINIT -#ENDIF -#IF (SCCENABLE) - .DW SCC_PREINIT -#ENDIF -#IF (EZ80UARTENABLE) - .DW EZUART_PREINIT -#ENDIF -#IF (ACIAENABLE) - .DW ACIA_PREINIT -#ENDIF -#IF (SSERENABLE) - .DW SSER_PREINIT -#ENDIF -#IF (DLPSERENABLE) - .DW DLPSER_PREINIT -#ENDIF -#IF (UFENABLE) - .DW UF_PREINIT -#ENDIF -#IF (CVDUENABLE) - .DW CVDU_PREINIT -#ENDIF -#IF (VGAENABLE) - .DW VGA_PREINIT -#ENDIF -#IF (GDCENABLE) - .DW GDC_PREINIT -#ENDIF -#IF (TMSENABLE) - .DW TMS_PREINIT -#ENDIF -#IF (SCONENABLE) - .DW SCON_PREINIT -#ENDIF - .DW TERM_PREINIT ; ALWAYS DO THIS ONE -#IF (PIOENABLE) - .DW PIO_PREINIT -#ENDIF -#IF (PIO_4P | PIO_ZP) - .DW PIO_PREINIT -#ENDIF -#IF (XOSENABLE) - .DW XOS_PREINIT -#ENDIF -; -HB_PCINITTBLLEN .EQU (($ - HB_PCINITTBL) / 2) -; -;================================================================================================== -; TABLE OF INITIALIZATION ENTRY POINTS -;================================================================================================== -; -HB_INITTBL: -; -#IF (CHNATIVEENABLE) - ; NEED TO ENUMERATE USB DEVICES EARLY, SO THAT ACTUAL DRIVERS - ; WILL BE ABLE TO FIND THEM. -#IF (CHNATIVEFORCE) - .DW CHNATIVE_INITF -#ELSE - .DW CHNATIVE_INIT -#ENDIF -#ENDIF -#IF (KIOENABLE) - .DW KIO_INIT -#ENDIF -#IF (CTCENABLE) - .DW CTC_INIT -#ENDIF -#IF (PCFENABLE) - .DW PCF_INIT -#ENDIF -;;;#IF (DSKYENABLE) -#IF (ICMENABLE) - .DW ICM_INIT -#ENDIF -#IF (PKDENABLE) - .DW PKD_INIT -#ENDIF -;;;#ENDIF -#IF (LCDENABLE) - .DW LCD_INIT -#ENDIF -#IF (H8PENABLE) - .DW H8P_INIT -#ENDIF -#IF (GM7303ENABLE) - .DW GM7303_INIT -#ENDIF -#IF (PLATFORM == PLT_NABU) - .DW NABU_INIT -#ENDIF -#IF (AY38910ENABLE) - .DW AY38910_INIT ; AUDIBLE INDICATOR OF BOOT START -#ENDIF -#IF (SN76489ENABLE) - .DW SN76489_INIT -#ENDIF -#IF (YM2612ENABLE) - .DW YM2612_INIT -#ENDIF -#IF (SPKENABLE) - .DW SP_INIT ; AUDIBLE INDICATOR OF BOOT START -#ENDIF - - -#IF (ASCIENABLE) - .DW ASCI_INIT -#ENDIF -#IF (Z2UENABLE) - .DW Z2U_INIT -#ENDIF -#IF (TSERENABLE) - .DW TSER_INIT -#ENDIF -#IF (UARTENABLE) - .DW UART_INIT -#ENDIF -#IF (DUARTENABLE) - .DW DUART_INIT -#ENDIF -#IF (SIOENABLE) - .DW SIO_INIT -#ENDIF -#IF (SCCENABLE) - .DW SCC_INIT -#ENDIF -#IF (EZ80UARTENABLE) - .DW EZUART_INIT -#ENDIF -#IF (ACIAENABLE) - .DW ACIA_INIT -#ENDIF -#IF (SSERENABLE) - .DW SSER_INIT -#ENDIF -#IF (DLPSERENABLE) - .DW DLPSER_INIT -#ENDIF -#IF (UFENABLE) - .DW UF_INIT -#ENDIF -#IF (DSRTCENABLE) - .DW DSRTC_INIT -#ENDIF -#IF (DS1501RTCENABLE) - .DW DS1501RTC_INIT -#ENDIF -#IF (BQRTCENABLE) - .DW BQRTC_INIT -#ENDIF -#IF (SIMRTCENABLE) - .DW SIMRTC_INIT -#ENDIF -#IF (DS7RTCENABLE) - .DW DS7RTC_INIT -#ENDIF -#IF (DS5RTCENABLE) - .DW DS5RTC_INIT -#ENDIF -#IF (RP5RTCENABLE) - .DW RP5RTC_INIT -#ENDIF -#IF (EZ80RTCENABLE) - .DW EZ80RTC_INIT -#ENDIF -#IF (PCRTCENABLE) - .DW PCRTC_INIT -#ENDIF -#IF (MMRTCENABLE) - .DW MMRTC_INIT -#ENDIF -#IF (DS12RTCENABLE) - .DW DS12RTC_INIT -#ENDIF -#IF (INTRTCENABLE) - .DW INTRTC_INIT -#ENDIF -#IF (CPUFAM == CPU_EZ80) - ; INITALISE ONE OF THE SUPPORTED SYSTEM TIMER TICKS DRIVERS - .DW EZ80_TMR_INIT -#ENDIF -#IF (M6242RTCENABLE) - .DW M6242RTC_INIT -#ENDIF -#IF (VDUENABLE) - .DW VDU_INIT -#ENDIF -#IF (CVDUENABLE) - .DW CVDU_INIT -#ENDIF -#IF (VGAENABLE) - .DW VGA_INIT -#ENDIF -#IF (GDCENABLE) - .DW GDC_INIT -#ENDIF -#IF (TMSENABLE) - .DW TMS_INIT -#ENDIF -#IF (EFENABLE) - .DW EF_INIT -#ENDIF -#IF (VRCENABLE) - .DW VRC_INIT -#ENDIF -#IF (TVGAENABLE) - .DW TVGA_INIT -#ENDIF -#IF (SCONENABLE) - .DW SCON_INIT -#ENDIF -#IF (XOSENABLE) - .DW XOS_INIT -#ENDIF -#IF (LPTENABLE) - .DW LPT_INIT -#ENDIF -#IF (PIOENABLE) - .DW PIO_INIT -#ENDIF -#IF (PIO_4P | PIO_ZP) - .DW PIO_INIT -#ENDIF -#IF (DMAENABLE) - .DW DMA_INIT -#ENDIF -#IF (MDENABLE) - .DW MD_INIT -#ENDIF -#IF (FDENABLE) - .DW FD_INIT -#ENDIF -#IF (RFENABLE) - .DW RF_INIT -#ENDIF -#IF (IDEENABLE) - .DW IDE_INIT -#ENDIF -#IF (PPIDEENABLE) - .DW PPIDE_INIT -#ENDIF -#IF (SDENABLE) - .DW SD_INIT -#ENDIF -#IF (HDSKENABLE) - .DW HDSK_INIT -#ENDIF -#IF (PPAENABLE) - .DW PPA_INIT -#ENDIF -#IF (IMMENABLE) - .DW IMM_INIT -#ENDIF -#IF (SYQENABLE) - .DW SYQ_INIT -#ENDIF -#IF (CHENABLE) - .DW CH_INIT -#ENDIF -#IF (ESPSDENABLE) - .DW ESPSD_INIT -#ENDIF -#IF (SCSIENABLE) - .DW SCSI_INIT -#ENDIF -#IF (PRPENABLE) - .DW PRP_INIT -#ENDIF -#IF (PPPENABLE) - .DW PPP_INIT -#ENDIF -#IF (ESPENABLE) - .DW ESP_INIT -#ENDIF -#IF (CHSCSIENABLE) - .DW CHSCSI_INIT -#ENDIF -#IF (CHUFIENABLE) - .DW CHUFI_INIT -#ENDIF -; -HB_INITTBLLEN .EQU (($ - HB_INITTBL) / 2) -; -HB_SYSINIT_END .EQU $ -; -;================================================================================================== -; BIOS FUNCTION DISPATCHER -;================================================================================================== -; -HB_DISP_BEG .EQU $ -; -;-------------------------------------------------------------------------------------------------- -; HIGH LEVEL FUNCTION DISPATCHER -;-------------------------------------------------------------------------------------------------- -; -; JUMP TO FUNCTION GROUP SPECIFIC DISPATCHER. THE FUNCTION GROUP -; IS BASED ON THE TOP NIBBLE OF THE FUNCTION NUMBER. -; -; ENTRY: B=FUNCTION -; -HB_DISPATCH: -; -#IF (MEMMGR == MM_Z280) - ; FOR Z280 MEMMGR, WE DISPATCH VIA THE Z280 SYSCALL. - ; THE SYSCALL MECHANISM WILL DISABLE INTERRUPTS. IN - ; GENERAL, INTERRUPTS ARE OK DURING API PROCESSING, - ; SO ENABLE THEM HERE. - HB_EI -#ENDIF -; -; STACK INTEGRITY DIAGNOSTIC CHECK -; -#IF FALSE ; *DEBUG* START -; - CALL HB_DISPATCH1 ; DO THE WORK -; - ; CHECK STACK INTEGRITY - PUSH AF - LD A,(HB_STACK - HB_STKSIZ + $08) - CP $FF - SYSCHKERR(ERR_INTERNAL) - LD A,$FF - LD (HB_STACK - HB_STKSIZ + $08),A - POP AF - RET -; -HB_DISPATCH1: -; -#ENDIF ; *DEBUG* END +#ENDIF ; *DEBUG* END ; LD A,B ; REQUESTED FUNCTION IS IN B CP BF_CIO + $10 ; $00-$0F: CHARACTER I/O @@ -5745,7 +5728,9 @@ SYS_RESCOLD: #ENDIF ; ; HOOK CALLED WHEN A USERLAND RESET IS INVOKED, TYPICALLY VIA A JUMP -; TO CPU ADDRESS $0000 +; TO CPU ADDRESS $0000. HL IS EXPECTED TO TO CONTAIN VALUE OF PC +; WHEN THE $0000 VECTOR WAS INVOKED (I.E., THE PC AT THE TIME AN +; INVALID INSTRUCTION TRAP OCCURRED. ; ; CREDIT TO PHILLIP STEVENS FOR SUGGESTING AND SIGNIFICANT CONTRIBUTIONS ; TO THE Z180 INVALID OPCODE TRAP ENHANCEMENT. @@ -5767,6 +5752,7 @@ SYS_RESUSER: DEC HL ; OTHERWISE, BACK UP 1 MORE BYTE ; SYS_RESUSER1: + ;;; WHY IS THIS NOT DONE ABOVE??? OUT0 (Z180_ITC),A ; SAVE IT ; CALL PRTSTRD ; PRINT ERROR TAG @@ -5794,6 +5780,8 @@ SYS_RESUSER2: ; SYS_RESUSER3: ; RESET ACTIVE VIDEO DISPLAY ATTACHED TO EMULATOR + ;;; SHOULD THIS BE DONE PRIOR TO CHECKING FOR + ;;; INVALID OPCODE??? CALL TERM_RESET ; RET ; ELSE RETURN WITH USER RESET VECTOR IN HL @@ -7085,6 +7073,39 @@ CALLLIST: CALLDUMMY: RET ; +; WALK THE MODULE LIST CALLING THE MODULE INIT +; PHASE HANDLER WITH THE CURRENT INIT PHASE ID IN A. +; +MODINIT: + LD HL,HB_MODSTART ; POINT TO START OF MODULES +MODINIT1: + PUSH HL ; SAVE MODULE START + CALL NEWLINE ; *DEBUG* + CALL PRTHEXWORDHL ; *DEBUG* + LD E,(HL) ; GET MODULE LENGTH + INC HL + LD D,(HL) + INC HL + LD A,E ; CHECK FOR ZERO (END OF LIST) + OR D + JR Z,MODINIT_Z ; IF ZERO, DONE + PUSH DE ; SAVE MODULE LENGTH +; + LD A,(HL) ; ADR OF MOD INIT HANDLER TO HL + INC HL + LD H,(HL) + LD L,A + LD A,(HB_CURPHASE) ; PHASE ID TO A + CALL JPHL ; DO IT +; + POP DE ; RECOVER MODULE LENGTH + POP HL ; RECOVER MODULE START + ADD HL,DE ; BUMP TO NEXT + JR MODINIT1 ; LOOP +MODINIT_Z: + POP HL ; FIX STACK + RET ; AND DONE +; ;-------------------------------------------------------------------------------------------------- ; GLOBAL IDLE PROCESSING ;-------------------------------------------------------------------------------------------------- @@ -8135,6 +8156,12 @@ HB_UTIL_BEG .EQU $ #INCLUDE "unlzsa2s.asm" #ENDIF ; +; COMMON RETURN FUNCTIONS (WILL BE EXPANDED AT SOME POINT) +; +HB_RETOK: + XOR A + RET +; ;-------------------------------------------------------------------------------------------------- ; CONSOLE CHARACTER I/O HELPER ROUTINES (REGISTERS PRESERVED) ;-------------------------------------------------------------------------------------------------- @@ -8463,8 +8490,6 @@ FP_ACTIVE: FPSW_ACTIVE .DB TRUE FPLED_ACTIVE .DB TRUE -#IF (CPUFAM != CPU_EZ80) ; eZ80 WILL RETURNED ITS MEASURED CPUOSC - SO NO NEED FOR DETECTION HERE -; ;================================================================================================== ; CPU SPEED DETECTION USING DS-1302 RTC ;================================================================================================== @@ -8582,7 +8607,6 @@ HB_CPUSPD2: ; HANDLE NO RTC OR NOT TICKING OR $FF ; SIGNAL ERROR RET ; AND DONE -#ENDIF ; CPUFAM != CPU_EZ80 ; ;================================================================================================== ; FONT MANAGEMENT ROUTINES @@ -8854,727 +8878,471 @@ HB_PRTSUM_END .EQU $ ; HB_DRIVERS_BEG .EQU $ ; -;;;#IF (DSKYENABLE) -#IF (ICMENABLE) -ORG_ICM .EQU $ - #INCLUDE "icm.asm" -SIZ_ICM .EQU $ - ORG_ICM - MEMECHO "ICM occupies " - MEMECHO SIZ_ICM - MEMECHO " bytes.\n" -#ENDIF +HB_MODSTART .EQU $ ; -#IF (PKDENABLE) -ORG_PKD .EQU $ - #INCLUDE "pkd.asm" -SIZ_PKD .EQU $ - ORG_PKD - MEMECHO "PKD occupies " - MEMECHO SIZ_PKD - MEMECHO " bytes.\n" -#ENDIF -;;;#ENDIF +;-------------------------------------------------------------------------------------------------- +; SYSTEM MODULES +;-------------------------------------------------------------------------------------------------- ; -#IF (LCDENABLE) -ORG_LCD .EQU $ - #INCLUDE "lcd.asm" -SIZ_LCD .EQU $ - ORG_LCD - MEMECHO "LCD occupies " - MEMECHO SIZ_LCD - MEMECHO " bytes.\n" -#ENDIF +; - EZ80CPU +; - CHNATIVE +; - KIO +; - CTC +; - PCF +; - DMA +; - NABU +; - EZ80SYSTMP ; -#IF (GM7303ENABLE) -ORG_GM7303 .EQU $ - #INCLUDE "gm7303.asm" -SIZ_GM7303 .EQU $ - ORG_GM7303 - MEMECHO "GM7303 occupies " - MEMECHO SIZ_GM7303 - MEMECHO " bytes.\n" +#IF (CPUFAM == CPU_EZ80) +;;;; MEMECHO "EZ80 DRIVERS\n" +;;;ORG_EZ80DRVS .EQU $ + #INCLUDE "ez80cpu.asm" #ENDIF ; -#IF (H8PENABLE) -ORG_H8P .EQU $ - #INCLUDE "h8p.asm" -SIZ_H8P .EQU $ - ORG_H8P - MEMECHO "H8P occupies " - MEMECHO SIZ_H8P - MEMECHO " bytes.\n" +#IF (CHNATIVEENABLE) + #INCLUDE "ch376.asm" #ENDIF ; -#IF (PLATFORM == PLT_NABU) -ORG_NABU .EQU $ - #INCLUDE "nabu.asm" -SIZ_NABU .EQU $ - ORG_NABU - MEMECHO "NABU occupies " - MEMECHO SIZ_NABU - MEMECHO " bytes.\n" +#IF (KIOENABLE) + #INCLUDE "kio.asm" #ENDIF ; -#IF (DSRTCENABLE) -ORG_DSRTC .EQU $ - #INCLUDE "dsrtc.asm" -SIZ_DSRTC .EQU $ - ORG_DSRTC - MEMECHO "DSRTC occupies " - MEMECHO SIZ_DSRTC - MEMECHO " bytes.\n" +#IF (CTCENABLE) + #INCLUDE "ctc.asm" #ENDIF ; -#IF (DS1501RTCENABLE) -ORG_DS1501RTC .EQU $ - #INCLUDE "ds1501rtc.asm" -SIZ_DS1501RTC .EQU $ - ORG_DS1501RTC - MEMECHO "DS1501RTC occupies " - MEMECHO SIZ_DS1501RTC - MEMECHO " bytes.\n" +#IF (PCFENABLE) + #INCLUDE "pcf.asm" #ENDIF ; -#IF (BQRTCENABLE) -ORG_BQRTC .EQU $ - #INCLUDE "bqrtc.asm" -SIZ_BQRTC .EQU $ - ORG_BQRTC - MEMECHO "BQRTC occupies " - MEMECHO SIZ_BQRTC - MEMECHO " bytes.\n" +#IF (DMAENABLE) + #INCLUDE "dma.asm" #ENDIF ; -#IF (SIMRTCENABLE) -ORG_SIMRTC .EQU $ - #INCLUDE "simrtc.asm" -SIZ_SIMRTC .EQU $ - ORG_SIMRTC - MEMECHO "SIMRTC occupies " - MEMECHO SIZ_SIMRTC - MEMECHO " bytes.\n" +#IF (PLATFORM == PLT_NABU) + #INCLUDE "nabu.asm" #ENDIF ; -#IF (PCFENABLE) -ORG_PCF .EQU $ - #INCLUDE "pcf.asm" -SIZ_PCF .EQU $ - ORG_PCF - MEMECHO "PCF occupies " - MEMECHO SIZ_PCF - MEMECHO " bytes.\n" +#IF (CPUFAM == CPU_EZ80) +;;; MEMECHO "EZ80 DRIVERS\n" + #INCLUDE "ez80tmr.asm" #ENDIF ; -#IF (DS5RTCENABLE) -ORG_DS5RTC .EQU $ - #INCLUDE "ds5rtc.asm" -SIZ_DS5RTC .EQU $ - ORG_DS5RTC - MEMECHO "DS5RTC occupies " - MEMECHO SIZ_DS5RTC - MEMECHO " bytes.\n" -#ENDIF +;-------------------------------------------------------------------------------------------------- +; DSKY MODULES +;-------------------------------------------------------------------------------------------------- ; -#IF (PCRTCENABLE) -ORG_PCRTC .EQU $ - #INCLUDE "pcrtc.asm" -SIZ_PCRTC .EQU $ - ORG_PCRTC - MEMECHO "PCRTC occupies " - MEMECHO SIZ_PCRTC - MEMECHO " bytes.\n" -#ENDIF +; - ICM +; - PKD +; - LCD +; - H8P +; - GM7303 ; -#IF (DS7RTCENABLE) -ORG_DS7RTC .EQU $ - #INCLUDE "ds7rtc.asm" -SIZ_DS7RTC .EQU $ - ORG_DS7RTC - .ECHO "DS7RTC occupies " - .ECHO SIZ_DS7RTC - .ECHO " bytes.\n" +#IF (ICMENABLE) + #INCLUDE "icm.asm" #ENDIF ; -#IF (RP5RTCENABLE) -ORG_RP5RTC .EQU $ - #INCLUDE "rp5rtc.asm" -SIZ_RP5RTC .EQU $ - ORG_RP5RTC - MEMECHO "RP5RTC occupies " - MEMECHO SIZ_RP5RTC - MEMECHO " bytes.\n" +#IF (PKDENABLE) + #INCLUDE "pkd.asm" #ENDIF ; -#IF (MMRTCENABLE) -ORG_MMRTC .EQU $ - #INCLUDE "mmrtc.asm" -SIZ_MMRTC .EQU $ - ORG_MMRTC - MEMECHO "MMRTC occupies " - MEMECHO SIZ_MMRTC - MEMECHO " bytes.\n" +#IF (LCDENABLE) + #INCLUDE "lcd.asm" #ENDIF ; -#IF (DS12RTCENABLE) -ORG_DS12RTC .EQU $ - #INCLUDE "ds12rtc.asm" -SIZ_DS12RTC .EQU $ - ORG_DS12RTC - MEMECHO "DS12RTC occupies " - MEMECHO SIZ_DS12RTC - MEMECHO " bytes.\n" +#IF (H8PENABLE) + #INCLUDE "h8p.asm" #ENDIF ; -#IF (INTRTCENABLE) -ORG_INTRTC .EQU $ - #INCLUDE "intrtc.asm" -SIZ_INTRTC .EQU $ - ORG_INTRTC - MEMECHO "INTRTC occupies " - MEMECHO SIZ_INTRTC - MEMECHO " bytes.\n" +#IF (GM7303ENABLE) + #INCLUDE "gm7303.asm" #ENDIF ; -#IF (M6242RTCENABLE) -ORG_M6242RTC .EQU $ - #INCLUDE "m6242rtc.asm" -SIZ_M6242RTC .EQU $ - ORG_M6242RTC - MEMECHO "M6242RTC occupies " - MEMECHO SIZ_M6242RTC - MEMECHO " bytes.\n" +;-------------------------------------------------------------------------------------------------- +; SOUND MODULES +;-------------------------------------------------------------------------------------------------- +; +; - AY38910 +; - SN76489 +; - YM2612 +; - SPKENABLE +; +#IF (AY38910ENABLE) + #INCLUDE "ay38910.asm" #ENDIF ; -#IF (SSERENABLE) -ORG_SSER .EQU $ - #INCLUDE "sser.asm" -SIZ_SSER .EQU $ - ORG_SSER - MEMECHO "SSER occupies " - MEMECHO SIZ_SSER - MEMECHO " bytes.\n" +#IF (SN76489ENABLE) + #INCLUDE "sn76489.asm" #ENDIF ; -#IF (TSERENABLE) -ORG_TSER .EQU $ - #INCLUDE "tser.asm" -SIZ_TSER .EQU $ - ORG_TSER - MEMECHO "TSER occupies " - MEMECHO SIZ_TSER - MEMECHO " bytes.\n" +#IF (YM2612ENABLE) + #INCLUDE "ym2612.asm" #ENDIF ; -#IF (DLPSERENABLE) -ORG_DLPSER .EQU $ - #INCLUDE "dlpser.asm" -SIZ_DLPSER .EQU $ - ORG_DLPSER - MEMECHO "DLPSER occupies " - MEMECHO SIZ_DLPSER - MEMECHO " bytes.\n" +#IF (SPKENABLE) + #INCLUDE "spk.asm" #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; CHARACTER DEVICE MODULES +;-------------------------------------------------------------------------------------------------- +; +; - ASCI +; - Z2U +; - TSER +; - UART +; - DUART +; - SIO +; - SCC +; - EZUART +; - ACIA +; - SSER +; - DLPSER +; - UF +; #IF (ASCIENABLE) -ORG_ASCI .EQU $ #INCLUDE "asci.asm" -SIZ_ASCI .EQU $ - ORG_ASCI - MEMECHO "ASCI occupies " - MEMECHO SIZ_ASCI - MEMECHO " bytes.\n" #ENDIF ; #IF (Z2UENABLE) -ORG_Z2U .EQU $ #INCLUDE "z2u.asm" -SIZ_Z2U .EQU $ - ORG_Z2U - MEMECHO "Z2U occupies " - MEMECHO SIZ_Z2U - MEMECHO " bytes.\n" +#ENDIF +; +#IF (TSERENABLE) + #INCLUDE "tser.asm" #ENDIF ; #IF (UARTENABLE) -ORG_UART .EQU $ #INCLUDE "uart.asm" -SIZ_UART .EQU $ - ORG_UART - MEMECHO "UART occupies " - MEMECHO SIZ_UART - MEMECHO " bytes.\n" #ENDIF ; #IF (DUARTENABLE) -ORG_DUART .EQU $ #INCLUDE "duart.asm" -SIZ_DUART .EQU $ - ORG_DUART - MEMECHO "DUART occupies " - MEMECHO SIZ_DUART - MEMECHO " bytes.\n" #ENDIF ; #IF (SIOENABLE) -ORG_SIO .EQU $ #INCLUDE "sio.asm" -SIZ_SIO .EQU $ - ORG_SIO - MEMECHO "SIO occupies " - MEMECHO SIZ_SIO - MEMECHO " bytes.\n" #ENDIF ; #IF (SCCENABLE) -ORG_SCC .EQU $ #INCLUDE "scc.asm" -SIZ_SCC .EQU $ - ORG_SCC - MEMECHO "SCC occupies " - MEMECHO SIZ_SCC - MEMECHO " bytes.\n" +#ENDIF +; +#IF (EZ80UARTENABLE) + #INCLUDE "ez80uart.asm" #ENDIF ; #IF (ACIAENABLE) -ORG_ACIA .EQU $ #INCLUDE "acia.asm" -SIZ_ACIA .EQU $ - ORG_ACIA - MEMECHO "ACIA occupies " - MEMECHO SIZ_ACIA - MEMECHO " bytes.\n" #ENDIF ; -#IF (PIOENABLE) -ORG_PIO .EQU $ - #INCLUDE "pio.asm" -SIZ_PIO .EQU $ - ORG_PIO - MEMECHO "PIO occupies " - MEMECHO SIZ_PIO - MEMECHO " bytes.\n" +#IF (SSERENABLE) + #INCLUDE "sser.asm" +#ENDIF +; +#IF (DLPSERENABLE) + #INCLUDE "dlpser.asm" #ENDIF ; +#IF (UFENABLE) + #INCLUDE "uf.asm" +#ENDIF +; +;-------------------------------------------------------------------------------------------------- +; PARALLEL DEVICE MODULES +;-------------------------------------------------------------------------------------------------- +; +; - LPT +; - PIO +; #IF (LPTENABLE) -ORG_LPT .EQU $ #INCLUDE "lpt.asm" -SIZ_LPT .EQU $ - ORG_LPT - MEMECHO "LPT occupies " - MEMECHO SIZ_LPT - MEMECHO " bytes.\n" #ENDIF ; -#IF (PIO_4P | PIO_ZP | PIO_SBC) -ORG_PIO .EQU $ +#IF (PIOENABLE) #INCLUDE "pio.asm" -SIZ_PIO .EQU $ - ORG_PIO - MEMECHO "PIO occupies " - MEMECHO SIZ_PIO - MEMECHO " bytes.\n" #ENDIF ; -#IF (UFENABLE) -ORG_UF .EQU $ - #INCLUDE "uf.asm" -SIZ_UF .EQU $ - ORG_UF - MEMECHO "UF occupies " - MEMECHO SIZ_UF - MEMECHO " bytes.\n" +;-------------------------------------------------------------------------------------------------- +; REAL-TIME CLOCK / NON-VOLATILE MEMORY MODULES +;-------------------------------------------------------------------------------------------------- +; +; - DSRTC +; - DS1501RTC +; - BQRTC +; - SIMRTC +; - DS7RTC +; - DS5RTC +; - RP5RTC +; - EZ80RTC +; - PCRTC +; - MMRTC +; - DS12RTC +; - M6242RTC +; - INTRTC +; +#IF (DSRTCENABLE) + #INCLUDE "dsrtc.asm" #ENDIF ; -#IF (VGAENABLE) -ORG_VGA .EQU $ - #INCLUDE "vga.asm" -SIZ_VGA .EQU $ - ORG_VGA - MEMECHO "VGA occupies " - MEMECHO SIZ_VGA - MEMECHO " bytes.\n" +#IF (DS1501RTCENABLE) + #INCLUDE "ds1501rtc.asm" #ENDIF ; -#IF (CVDUENABLE) -ORG_CVDU .EQU $ - #INCLUDE "cvdu.asm" -SIZ_CVDU .EQU $ - ORG_CVDU - MEMECHO "CVDU occupies " - MEMECHO SIZ_CVDU - MEMECHO " bytes.\n" +#IF (BQRTCENABLE) + #INCLUDE "bqrtc.asm" +#ENDIF +; +#IF (SIMRTCENABLE) + #INCLUDE "simrtc.asm" +#ENDIF +; +#IF (DS7RTCENABLE) + #INCLUDE "ds7rtc.asm" +#ENDIF +; +#IF (DS5RTCENABLE) + #INCLUDE "ds5rtc.asm" +#ENDIF +; +#IF (RP5RTCENABLE) + #INCLUDE "rp5rtc.asm" +#ENDIF +; +#IF (EZ80RTCENABLE) + #INCLUDE "ez80rtc.asm" +#ENDIF +; +#IF (PCRTCENABLE) + #INCLUDE "pcrtc.asm" +#ENDIF +; +#IF (MMRTCENABLE) + #INCLUDE "mmrtc.asm" +#ENDIF +; +#IF (DS12RTCENABLE) + #INCLUDE "ds12rtc.asm" #ENDIF ; +#IF (M6242RTCENABLE) + #INCLUDE "m6242rtc.asm" +#ENDIF +; +#IF (INTRTCENABLE) + #INCLUDE "intrtc.asm" +#ENDIF +; +;-------------------------------------------------------------------------------------------------- +; VIDEO DISPLAY MODULES +;-------------------------------------------------------------------------------------------------- +; +; - VDU +; - CVDU +; - VGA +; - GDC +; - TMS +; - EF +; - VRC +; - TVGA +; - XOS +; #IF (VDUENABLE) -ORG_VDU .EQU $ #INCLUDE "vdu.asm" -SIZ_VDU .EQU $ - ORG_VDU - MEMECHO "VDU occupies " - MEMECHO SIZ_VDU - MEMECHO " bytes.\n" #ENDIF ; -#IF (TMSENABLE) -ORG_TMS .EQU $ - #INCLUDE "tms.asm" -SIZ_TMS .EQU $ - ORG_TMS - MEMECHO "TMS occupies " - MEMECHO SIZ_TMS - MEMECHO " bytes.\n" +#IF (CVDUENABLE) + #INCLUDE "cvdu.asm" #ENDIF ; -#IF (EFENABLE) -ORG_EF .EQU $ - #INCLUDE "ef.asm" -SIZ_EF .EQU $ - ORG_EF - MEMECHO "EF occupies " - MEMECHO SIZ_EF - MEMECHO " bytes.\n" +#IF (VGAENABLE) + #INCLUDE "vga.asm" #ENDIF ; #IF (GDCENABLE) -ORG_GDC .EQU $ #INCLUDE "gdc.asm" -SIZ_GDC .EQU $ - ORG_GDC - MEMECHO "GDC occupies " - MEMECHO SIZ_GDC - MEMECHO " bytes.\n" +#ENDIF +; +#IF (TMSENABLE) + #INCLUDE "tms.asm" +#ENDIF +; +#IF (EFENABLE) + #INCLUDE "ef.asm" #ENDIF ; #IF (VRCENABLE) -ORG_VRC .EQU $ #INCLUDE "vrc.asm" -SIZ_VRC .EQU $ - ORG_VRC - MEMECHO "VRC occupies " - MEMECHO SIZ_VRC - MEMECHO " bytes.\n" #ENDIF ; #IF (TVGAENABLE) -ORG_TVGA .EQU $ #INCLUDE "tvga.asm" -SIZ_TVGA .EQU $ - ORG_TVGA - MEMECHO "TVGA occupies " - MEMECHO SIZ_TVGA - MEMECHO " bytes.\n" #ENDIF ; #IF (XOSENABLE) -ORG_XOS .EQU $ #INCLUDE "xosera.asm" -SIZ_XOS .EQU $ - ORG_XOS - MEMECHO "XOS occupies " - MEMECHO SIZ_XOS - MEMECHO " bytes.\n" #ENDIF ; -#IF (DMAENABLE) -ORG_DMA .EQU $ -#INCLUDE "dma.asm" -SIZ_DMA .EQU $ - ORG_DMA - MEMECHO "DMA occupies " - MEMECHO SIZ_DMA - MEMECHO " bytes.\n" -#ENDIF +;-------------------------------------------------------------------------------------------------- +; KEYBOARD MODULES +;-------------------------------------------------------------------------------------------------- +; +; - KBD +; - MKY +; - NABUKBD +; - PPK +; - USBKYB ; #IF (KBDENABLE) -ORG_KBD .EQU $ #INCLUDE "kbd.asm" -SIZ_KBD .EQU $ - ORG_KBD - MEMECHO "KBD occupies " - MEMECHO SIZ_KBD - MEMECHO " bytes.\n" -#ENDIF -; -#IF (PPKENABLE) -ORG_PPK .EQU $ - #INCLUDE "ppk.asm" -SIZ_PPK .EQU $ - ORG_PPK - MEMECHO "PPK occupies " - MEMECHO SIZ_PPK - MEMECHO " bytes.\n" #ENDIF ; #IF (MKYENABLE) -ORG_MKY .EQU $ #INCLUDE "mky.asm" -SIZ_MKY .EQU $ - ORG_MKY - MEMECHO "MKY occupies " - MEMECHO SIZ_MKY - MEMECHO " bytes.\n" #ENDIF ; #IF (NABUKBENABLE) -ORG_NABUKB .EQU $ #INCLUDE "nabukb.asm" -SIZ_NABUKB .EQU $ - ORG_NABUKB - MEMECHO "NABUKB occupies " - MEMECHO SIZ_NABUKB - MEMECHO " bytes.\n" #ENDIF ; -#IF (PRPENABLE) -ORG_PRP .EQU $ - #INCLUDE "prp.asm" -SIZ_PRP .EQU $ - ORG_PRP - MEMECHO "PRP occupies " - MEMECHO SIZ_PRP - MEMECHO " bytes.\n" +#IF (PPKENABLE) + #INCLUDE "ppk.asm" #ENDIF ; -#IF (PPPENABLE) -ORG_PPP .EQU $ - #INCLUDE "ppp.asm" -SIZ_PPP .EQU $ - ORG_PPP - MEMECHO "PPP occupies " - MEMECHO SIZ_PPP - MEMECHO " bytes.\n" +#IF (USBKYBENABLE) + #INCLUDE "ch376kyb.asm" #ENDIF ; -#IF (SCONENABLE) -ORG_SCON .EQU $ - #INCLUDE "scon.asm" -SIZ_SCON .EQU $ - ORG_SCON - MEMECHO "SCON occupies " - MEMECHO SIZ_SCON - MEMECHO " bytes.\n" -#ENDIF +;-------------------------------------------------------------------------------------------------- +; TERMINAL MODULES +;-------------------------------------------------------------------------------------------------- ; -#IF (CHENABLE) -ORG_CH .EQU $ - #INCLUDE "ch.asm" -SIZ_CH .EQU $ - ORG_CH - MEMECHO "CH occupies " - MEMECHO SIZ_CH - MEMECHO " bytes.\n" -#ENDIF +; - TERM ; -#IF (ESPSDENABLE) -ORG_ESPSD .EQU $ - #INCLUDE "espsd.asm" -SIZ_ESPSD .EQU $ - ORG_ESPSD - MEMECHO "ESPSD occupies " - MEMECHO SIZ_ESPSD - MEMECHO " bytes.\n" -#ENDIF +; TERM IS ALWAYS INCLUDED +#INCLUDE "term.asm" ; -#IF (SCSIENABLE) -ORG_SCSI .EQU $ - #INCLUDE "scsi.asm" -SIZ_SCSI .EQU $ - ORG_SCSI - MEMECHO "SCSI occupies " - MEMECHO SIZ_SCSI - MEMECHO " bytes.\n" -#ENDIF +;-------------------------------------------------------------------------------------------------- +; DISK / STORAGE MODULES +;-------------------------------------------------------------------------------------------------- ; -#IF (ESPENABLE) -ORG_ESP .EQU $ - #INCLUDE "esp.asm" -SIZ_ESP .EQU $ - ORG_ESP - MEMECHO "ESP occupies " - MEMECHO SIZ_ESP - MEMECHO " bytes.\n" -#ENDIF +; - MD +; - FD +; - RF +; - IDE +; - PPIDE +; - SD +; - HDSK +; - PPA +; - IMM +; - SYQ +; - CH +; - ESPSD +; - SCSI +; - CHSCSI +; - CHUFI ; #IF (MDENABLE) -ORG_MD .EQU $ #INCLUDE "md.asm" -SIZ_MD .EQU $ - ORG_MD - MEMECHO "MD occupies " - MEMECHO SIZ_MD - MEMECHO " bytes.\n" #ENDIF ; #IF (FDENABLE) -ORG_FD .EQU $ #INCLUDE "fd.asm" -SIZ_FD .EQU $ - ORG_FD - MEMECHO "FD occupies " - MEMECHO SIZ_FD - MEMECHO " bytes.\n" #ENDIF ; +; #IF (RFENABLE) -ORG_RF .EQU $ #INCLUDE "rf.asm" -SIZ_RF .EQU $ - ORG_RF - MEMECHO "RF occupies " - MEMECHO SIZ_RF - MEMECHO " bytes.\n" #ENDIF ; #IF (IDEENABLE) -ORG_IDE .EQU $ #INCLUDE "ide.asm" -SIZ_IDE .EQU $ - ORG_IDE - MEMECHO "IDE occupies " - MEMECHO SIZ_IDE - MEMECHO " bytes.\n" #ENDIF ; #IF (PPIDEENABLE) -ORG_PPIDE .EQU $ #INCLUDE "ppide.asm" -SIZ_PPIDE .EQU $ - ORG_PPIDE - MEMECHO "PPIDE occupies " - MEMECHO SIZ_PPIDE - MEMECHO " bytes.\n" #ENDIF ; #IF (SDENABLE) -ORG_SD .EQU $ #INCLUDE "sd.asm" -SIZ_SD .EQU $ - ORG_SD - MEMECHO "SD occupies " - MEMECHO SIZ_SD - MEMECHO " bytes.\n" #ENDIF ; #IF (HDSKENABLE) -ORG_HDSK .EQU $ #INCLUDE "hdsk.asm" -SIZ_HDSK .EQU $ - ORG_HDSK - MEMECHO "HDSK occupies " - MEMECHO SIZ_HDSK - MEMECHO " bytes.\n" #ENDIF ; #IF (PPAENABLE) -ORG_PPA .EQU $ #INCLUDE "ppa.asm" -SIZ_PPA .EQU $ - ORG_PPA - MEMECHO "PPA occupies " - MEMECHO SIZ_PPA - MEMECHO " bytes.\n" #ENDIF ; #IF (IMMENABLE) -ORG_IMM .EQU $ #INCLUDE "imm.asm" -SIZ_IMM .EQU $ - ORG_IMM - MEMECHO "IMM occupies " - MEMECHO SIZ_IMM - MEMECHO " bytes.\n" #ENDIF ; #IF (SYQENABLE) -ORG_SYQ .EQU $ #INCLUDE "syq.asm" -SIZ_SYQ .EQU $ - ORG_SYQ - MEMECHO "SYQ occupies " - MEMECHO SIZ_SYQ - MEMECHO " bytes.\n" #ENDIF ; -; TERM IS ALWAYS INCLUDED -ORG_TERM .EQU $ - #INCLUDE "term.asm" -SIZ_TERM .EQU $ - ORG_TERM - MEMECHO "TERM occupies ") - MEMECHO SIZ_TERM - MEMECHO " bytes.\n" -; -;#IF (SPKENABLE & DSRTCENABLE -#IF (SPKENABLE) -ORG_SPK .EQU $ - #INCLUDE "spk.asm" -SIZ_SPK .EQU $ - ORG_SPK - MEMECHO "SPK occupies " - MEMECHO SIZ_SPK - MEMECHO " bytes.\n" -#ENDIF -#IF (KIOENABLE) -ORG_KIO .EQU $ - #INCLUDE "kio.asm" -SIZ_KIO .EQU $ - ORG_KIO - MEMECHO "KIO occupies " - MEMECHO SIZ_KIO - MEMECHO " bytes.\n" -#ENDIF -#IF (CTCENABLE) -ORG_CTC .EQU $ - #INCLUDE "ctc.asm" -SIZ_CTC .EQU $ - ORG_CTC - MEMECHO "CTC occupies " - MEMECHO SIZ_CTC - MEMECHO " bytes.\n" -#ENDIF -#IF (SN76489ENABLE) -ORG_SN76489 .EQU $ - #INCLUDE "sn76489.asm" -SIZ_SN76489 .EQU $ - ORG_SN76489 - MEMECHO "SN76489 occupies " - MEMECHO SIZ_SN76489 - MEMECHO " bytes.\n" -#ENDIF -#IF (AY38910ENABLE) -ORG_AY38910 .EQU $ - #INCLUDE "ay38910.asm" -SIZ_AY38910 .EQU $ - ORG_AY38910 - MEMECHO "AY38910 occupies " - MEMECHO SIZ_AY38910 - MEMECHO " bytes.\n" +#IF (CHENABLE) + #INCLUDE "ch.asm" #ENDIF -#IF (YM2612ENABLE) -ORG_YM2612 .EQU $ - #INCLUDE "ym2612.asm" -SIZ_YM2612 .EQU $ - ORG_YM2612 - MEMECHO "YM2612 occupies " - MEMECHO SIZ_YM2612 - MEMECHO " bytes.\n" +; +#IF (ESPSDENABLE) + #INCLUDE "espsd.asm" #ENDIF ; -#IF (CHNATIVEENABLE) -ORG_CHNATIVE .EQU $ - #INCLUDE "ch376.asm" -SIZ_CHNATIVE .EQU $ - ORG_CHNATIVE - MEMECHO "CH376 Native occupies " - MEMECHO SIZ_CHNATIVE - MEMECHO " bytes.\n" +#IF (SCSIENABLE) + #INCLUDE "scsi.asm" #ENDIF ; #IF (CHSCSIENABLE) -ORG_CHSCSI .EQU $ #INCLUDE "ch376scsi.asm" -SIZ_CHSCSI .EQU $ - ORG_CHSCSI - MEMECHO " CH376 SCSI Mass Storage occupies " - MEMECHO SIZ_CHSCSI - MEMECHO " bytes.\n" #ENDIF ; #IF (CHUFIENABLE) -ORG_CHUFI .EQU $ #INCLUDE "ch376ufi.asm" -SIZ_CHUFI .EQU $ - ORG_CHUFI - MEMECHO " CH376 UFI Floppy Storage occupies " - MEMECHO SIZ_CHUFI - MEMECHO " bytes.\n" #ENDIF ; -#IF (USBKYBENABLE) -ORG_UKY .EQU $ - #INCLUDE "ch376kyb.asm" -SIZ_UKY .EQU $ - ORG_UKY - MEMECHO " CH376 USB Keyboard occupies " - MEMECHO SIZ_UKY - MEMECHO " bytes.\n" -#ENDIF +;-------------------------------------------------------------------------------------------------- +; MULTI-FUNCTION MODULES +;-------------------------------------------------------------------------------------------------- ; -#IF (CPUFAM == CPU_EZ80) - MEMECHO "EZ80 DRIVERS\n" -ORG_EZ80DRVS .EQU $ -; -ORG_EZ80CPUDRV .EQU $ - #INCLUDE "ez80cpudrv.asm" -SIZ_EZ80CPUDRV .EQU $ - ORG_EZ80CPUDRV - MEMECHO " EZ80 CPU DRIVER occupies " - MEMECHO SIZ_EZ80CPUDRV - MEMECHO " bytes.\n" +; - SCON +; - PRP +; - PPP +; - ESP ; -ORG_EZ80SYSTMR .EQU $ - #INCLUDE "ez80systmr.asm" -SIZ_EZ80SYSTMR .EQU $ - ORG_EZ80SYSTMR - MEMECHO " EZ80 SYS TIMER occupies " - MEMECHO SIZ_EZ80SYSTMR - MEMECHO " bytes.\n" ; -#IF (EZ80RTCENABLE) -ORG_EZ80RTC .EQU $ - #INCLUDE "ez80rtc.asm" -SIZ_EZ80RTC .EQU $ - ORG_EZ80RTC - MEMECHO " EZ80 RTC occupies " - MEMECHO SIZ_EZ80RTC - MEMECHO " bytes.\n" +#IF (SCONENABLE) + #INCLUDE "scon.asm" #ENDIF ; -#IF (EZ80UARTENABLE) -ORG_EZU .EQU $ - #INCLUDE "ez80uart.asm" -SIZ_EZU .EQU $ - ORG_EZU - MEMECHO " EZ80 UART occupies " - MEMECHO SIZ_EZU - MEMECHO " bytes.\n" +#IF (PRPENABLE) + #INCLUDE "prp.asm" #ENDIF - -SIZ_EZ80DRVS .EQU $ - ORG_EZ80DRVS - MEMECHO " Total " - MEMECHO SIZ_EZ80DRVS - MEMECHO " bytes.\n" - +; +#IF (PPPENABLE) + #INCLUDE "ppp.asm" #ENDIF - +; +#IF (ESPENABLE) + #INCLUDE "esp.asm" +#ENDIF +; +;-------------------------------------------------------------------------------------------------- +; END OF DEVICE DRIVERS +;-------------------------------------------------------------------------------------------------- +; + .DW $0000 ; END OF MODULES MARKER +; +HB_DRIVERS_END .EQU $ +; +; +; MEMECHO "RTCDEF=" MEMECHO RTCDEF MEMECHO "\n" ; -HB_DRIVERS_END .EQU $ -; ;================================================================================================== ; FONTS ;================================================================================================== @@ -9684,6 +9452,8 @@ HB_DATA_BEG .EQU $ ; IDLECOUNT .DB 0 ; +HB_CURPHASE .DB 0 ; CURRENT OPERATIONAL PHASE (SEE HB_PHASE_... IN STD.ASM) +; HEAPCURB .DW 0 ; MARK HEAP ADDRESS AFTER INITIALIZATION ; HB_TICKS .FILL 4,0 ; 32 BIT TICK COUNTER @@ -9691,7 +9461,7 @@ HB_SECTCK .DB TICKFREQ ; TICK COUNTER FOR FRACTIONAL SECONDS HB_SECS .FILL 4,0 ; 32 BIT SECONDS COUNTER ; HB_CPUTYPE .DB 0 ; 0=Z80, 1=Z180, 2=Z180-K, 3=Z180-N, 4=Z280 -HB_CPUOSC .DW CPUOSC ; ACTUAL CPU HARDWARE OSC FREQ IN KHZ +HB_CPUOSC .DW CPUOSC / 1000 ; ACTUAL CPU HARDWARE OSC FREQ IN KHZ ; HB_BATCOND .DB 0 ; BATTERY CONDITION (0=LOW, 1=OK) ; diff --git a/Source/HBIOS/hdsk.asm b/Source/HBIOS/hdsk.asm index c4d97357..4b744ec2 100644 --- a/Source/HBIOS/hdsk.asm +++ b/Source/HBIOS/hdsk.asm @@ -28,6 +28,23 @@ HDSK_LBA .EQU 2 ; OFFSET OF LBA (DWORD) DEVECHO HDSK_DEVCNT DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_HDSK .EQU $ +; + .DW SIZ_HDSK ; MODULE SIZE + .DW HDSK_INITPHASE ; ADR OF INIT PHASE HANDLER +; +HDSK_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,HDSK_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,HDSK_INIT ; DO INIT + RET ; DONE +; HDSK_CFGTBL: ; DEVICE 0 .DB 0 ; DRIVER DEVICE NUMBER @@ -431,3 +448,14 @@ HDSK_DRV .DB 0 ; 0..7, HDSK DRIVE NUMBER HDSK_SEC .DB 0 ; 0..255 SECTOR HDSK_TRK .DW 0 ; 0..2047 TRACK HDSK_DMA .DW 0 ; ADDRESS FOR SECTOR DATA EXCHANGE +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_HDSK .EQU $ +SIZ_HDSK .EQU END_HDSK - ORG_HDSK +; + MEMECHO "HDSK occupies " + MEMECHO SIZ_HDSK + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/icm.asm b/Source/HBIOS/icm.asm index 49b558f7..6d16640c 100644 --- a/Source/HBIOS/icm.asm +++ b/Source/HBIOS/icm.asm @@ -43,6 +43,23 @@ ICM_COLS .EQU 8 ; DISPLAY COLUMNS DEVECHO ICM_ROWS DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_ICM .EQU $ +; + .DW SIZ_ICM ; MODULE SIZE + .DW ICM_INITPHASE ; ADR OF INIT PHASE HANDLER +; +ICM_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,ICM_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,ICM_INIT ; DO INIT + RET ; DONE +; ;__ICM_INIT________________________________________________________________________________________ ; ; CONFIGURE PARALLEL PORT AND CLEAR KEYPAD BUFFER @@ -542,3 +559,14 @@ ICM_MSG_LDR_LOAD .DB $0B,$1D,$7E,$3D,$80,$80,$80,$00 ; "Load... " ICM_MSG_LDR_GO .DB $5F,$1D,$80,$80,$80,$00,$00,$00 ; "Go... " ICM_MSG_MON_RDY .DB $04,$4B,$6E,$3B,$00,$3B,$6E,$04 ; "-CPU UP-" ICM_MSG_MON_BOOT .DB $7F,$1D,$1D,$0F,$B0,$00,$00,$00 ; "Boot! " +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_ICM .EQU $ +SIZ_ICM .EQU END_ICM - ORG_ICM +; + MEMECHO "ICM occupies " + MEMECHO SIZ_ICM + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ide.asm b/Source/HBIOS/ide.asm index da5171a2..bb928893 100644 --- a/Source/HBIOS/ide.asm +++ b/Source/HBIOS/ide.asm @@ -170,6 +170,23 @@ IDE_STNOTRDY .EQU -9 IDE_DRVMASTER .EQU %11100000 ; LBA, MASTER DEVICE IDE_DRVSLAVE .EQU %11110000 ; LBA, SLAVE DEVICE ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_IDE .EQU $ +; + .DW SIZ_IDE ; MODULE SIZE + .DW IDE_INITPHASE ; ADR OF INIT PHASE HANDLER +; +IDE_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,IDE_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,IDE_INIT ; DO INIT + RET ; DONE +; ; IDE DEVICE CONFIGURATION ; IDE_CFGSIZ .EQU 19 ; SIZE OF CFG TBL ENTRIES @@ -2279,3 +2296,14 @@ IDE_PKTCMD_SENSE .DB $03, $00, $00, $00, $FF, $00, $00, $00, $00, $00, $00, $00 IDE_PKTCMD_RDCAP .DB $25, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; READ CAPACITY IDE_PKTCMD_RW10 .DB $28, $00, $00, $00, $00, $00, $00, $00, $01, $00, $00, $00 ; READ/WRITE SECTOR IDE_PKTCMD_TSTRDY .DB $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; TEST UNIT READY +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_IDE .EQU $ +SIZ_IDE .EQU END_IDE - ORG_IDE +; + MEMECHO "IDE occupies " + MEMECHO SIZ_IDE + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/imm.asm b/Source/HBIOS/imm.asm index 5daf5cfd..d41351e5 100644 --- a/Source/HBIOS/imm.asm +++ b/Source/HBIOS/imm.asm @@ -140,6 +140,23 @@ IMM_LBA .EQU 8 ; OFFSET OF LBA (DWORD) #DEFINE MG014_MAP #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_IMM .EQU $ +; + .DW SIZ_IMM ; MODULE SIZE + .DW IMM_INITPHASE ; ADR OF INIT PHASE HANDLER +; +IMM_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,IMM_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,IMM_INIT ; DO INIT + RET ; DONE +; ;============================================================================= ; INITIALIZATION ENTRY POINT ;============================================================================= @@ -1577,3 +1594,14 @@ IMM1_CFG: ; DEVICE 1 #ENDIF ; .DB $FF ; END MARKER +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_IMM .EQU $ +SIZ_IMM .EQU END_IMM - ORG_IMM +; + MEMECHO "IMM occupies " + MEMECHO SIZ_IMM + \ No newline at end of file diff --git a/Source/HBIOS/intrtc.asm b/Source/HBIOS/intrtc.asm index 49eb9573..ffb6084b 100644 --- a/Source/HBIOS/intrtc.asm +++ b/Source/HBIOS/intrtc.asm @@ -7,6 +7,23 @@ INTRTC_BUFSIZ .EQU 6 ; SIX BYTE BUFFER (YYMMDDHHMMSS) ; DEVECHO "INTRTC: ENABLED\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_INTRTC .EQU $ +; + .DW SIZ_INTRTC ; MODULE SIZE + .DW INTRTC_INITPHASE ; ADR OF INIT PHASE HANDLER +; +INTRTC_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,INTRTC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,INTRTC_INIT ; DO INIT + RET ; DONE +; ; RTC DEVICE INITIALIZATION ENTRY ; INTRTC_INIT: @@ -257,3 +274,14 @@ INTRTC_MONTBL: ; DAYS IN MONTH + 1 .DB 32 ; OCTOBER .DB 31 ; NOVEMBER .DB 32 ; DECEMBER +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_INTRTC .EQU $ +SIZ_INTRTC .EQU END_INTRTC - ORG_INTRTC +; + MEMECHO "INTRTC occupies " + MEMECHO SIZ_INTRTC + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/kbd.asm b/Source/HBIOS/kbd.asm index 91c59415..cc9490bb 100644 --- a/Source/HBIOS/kbd.asm +++ b/Source/HBIOS/kbd.asm @@ -49,6 +49,23 @@ KBD_KEYRDY .EQU 80H ; BIT 7, INDICATES A DECODED KEYCODE IS READY KBD_DEFRPT .EQU $40 ; DEFAULT REPEAT RATE (.5 SEC DELAY, 30CPS) KBD_DEFSTATE .EQU KBD_NUMLCK ; DEFAULT STATE (NUM LOCK ON) KBD_ACK .EQU $FA ; CMD ACKNOWLEDGE +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_KBD .EQU $ +; + .DW SIZ_KBD ; MODULE SIZE + .DW KBD_INITPHASE ; ADR OF INIT PHASE HANDLER +; +KBD_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,KBD_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,KBD_INIT ; DO INIT + RET ; DONE ;__________________________________________________________________________________________________ ; DATA ;__________________________________________________________________________________________________ @@ -939,3 +956,14 @@ KBD_MAPNUMPAD: ; KEYCODE TRANSLATION FROM NUMPAD RANGE TO STD ASCII/KEYCODES ; SLEEP $FB ; WAKE $FC ; BREAK $FD +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_KBD .EQU $ +SIZ_KBD .EQU END_KBD - ORG_KBD +; + MEMECHO "KBD occupies " + MEMECHO SIZ_KBD + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/kio.asm b/Source/HBIOS/kio.asm index 5eaba51c..9f0df533 100644 --- a/Source/HBIOS/kio.asm +++ b/Source/HBIOS/kio.asm @@ -30,6 +30,23 @@ KIO_KIOCMDB .EQU KIOBASE + $0F DEVECHO KIOBASE DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_KIO .EQU $ +; + .DW SIZ_KIO ; MODULE SIZE + .DW KIO_INITPHASE ; ADR OF INIT PHASE HANDLER +; +KIO_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,KIO_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,KIO_INIT ; DO INIT + RET ; DONE +; KIO_PREINIT: CALL KIO_DETECT RET NZ @@ -99,3 +116,14 @@ KIO_DETECT: ; ; KIO_EXISTS .DB 0 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_KIO .EQU $ +SIZ_KIO .EQU END_KIO - ORG_KIO +; + MEMECHO "KIO occupies " + MEMECHO SIZ_KIO + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/lcd.asm b/Source/HBIOS/lcd.asm index 05e0becd..aed81cca 100644 --- a/Source/HBIOS/lcd.asm +++ b/Source/HBIOS/lcd.asm @@ -35,6 +35,24 @@ LCD_FUNC_DDADR .EQU $80 ; SET DDRAM ADDRESS DEVECHO LCD_ROWS DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_LCD .EQU $ +; + .DW SIZ_LCD ; MODULE SIZE + .DW LCD_INITPHASE ; ADR OF INIT PHASE HANDLER +; +LCD_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,LCD_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,LCD_INIT ; DO INIT + RET ; DONE + +; ; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION ; LCD_PREINIT: @@ -528,3 +546,14 @@ LCD_MSG_LDR_LOAD .DB "Load...",0 LCD_MSG_LDR_GO .DB "Go...",0 LCD_MSG_MON_RDY .DB "-CPU UP-",0 LCD_MSG_MON_BOOT .DB "Boot!",0 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_LCD .EQU $ +SIZ_LCD .EQU END_LCD - ORG_LCD +; + MEMECHO "LCD occupies " + MEMECHO SIZ_LCD + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/lpt.asm b/Source/HBIOS/lpt.asm index efa3b658..eb10cf98 100644 --- a/Source/HBIOS/lpt.asm +++ b/Source/HBIOS/lpt.asm @@ -88,6 +88,23 @@ ; ;================================================================================================== ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_LPT .EQU $ +; + .DW SIZ_LPT ; MODULE SIZE + .DW LPT_INITPHASE ; ADR OF INIT PHASE HANDLER +; +LPT_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,LPT_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,LPT_INIT ; DO INIT + RET ; DONE +; LPT_INIT: LD B,LPT_CFGCNT ; LOOP CONTROL XOR A ; ZERO TO ACCUM @@ -515,3 +532,14 @@ LPT1_CFG: #ENDIF ; LPT_CFGCNT .EQU ($ - LPT_CFG) / LPT_CFGSIZ +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_LPT .EQU $ +SIZ_LPT .EQU END_LPT - ORG_LPT +; + MEMECHO "LPT occupies " + MEMECHO SIZ_LPT + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/m6242rtc.asm b/Source/HBIOS/m6242rtc.asm index 15ca3a07..01bdaad7 100644 --- a/Source/HBIOS/m6242rtc.asm +++ b/Source/HBIOS/m6242rtc.asm @@ -40,7 +40,24 @@ M6242RTC_REG_CONTROL3 .EQU $0F DEVECHO "M6242RTC: IO=" DEVECHO M6242RTC_BASE DEVECHO "\n" - +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_M6242RTC .EQU $ +; + .DW SIZ_M6242RTC ; MODULE SIZE + .DW M6242RTC_INITPHASE ; ADR OF INIT PHASE HANDLER +; +M6242RTC_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,M6242RTC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,M6242RTC_INIT ; DO INIT + RET ; DONE +; M6242RTC_INIT: LD A, (RTC_DISPACT) ; RTC DISPATCHER ALREADY SET? OR A ; SET FLAGS @@ -323,4 +340,15 @@ RP5RTC_MO .DB 01 RP5RTC_DT .DB 01 RP5RTC_HH .DB 00 RP5RTC_MM .DB 00 -RP5RTC_SS .DB 00 \ No newline at end of file +RP5RTC_SS .DB 00 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_M6242RTC .EQU $ +SIZ_M6242RTC .EQU END_M6242RTC - ORG_M6242RTC +; + MEMECHO "M6242RTC occupies " + MEMECHO SIZ_M6242RTC + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/md.asm b/Source/HBIOS/md.asm index 3eef75b9..a29b7811 100644 --- a/Source/HBIOS/md.asm +++ b/Source/HBIOS/md.asm @@ -29,6 +29,23 @@ MD_FDBG .EQU 0 ; FLASH DEBUG CODE MD_FVBS .EQU 1 ; FLASH VERBOSE OUTPUT MD_FVAR .EQU 1 ; FLASH VERIFY AFTER WRITE ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_MD .EQU $ +; + .DW SIZ_MD ; MODULE SIZE + .DW MD_INITPHASE ; ADR OF INIT PHASE HANDLER +; +MD_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,MD_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,MD_INIT ; DO INIT + RET ; DONE +; ; DEVICE CONFIG TABLE (RAM DEVICE FIRST TO MAKE IT ALWAYS FIRST DRIVE) ; MD_CFGTBL: @@ -1063,3 +1080,18 @@ MD_DSTBNK .DB 0 MD_SRC .DW 0 MD_DST .DW 0 MD_LEN .DW 0 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_MD .EQU $ +SIZ_MD .EQU END_MD - ORG_MD +; + MEMECHO "MD occupies " + MEMECHO SIZ_MD + MEMECHO " bytes.\n" + + + + diff --git a/Source/HBIOS/mky.asm b/Source/HBIOS/mky.asm index 177b628f..ca336945 100644 --- a/Source/HBIOS/mky.asm +++ b/Source/HBIOS/mky.asm @@ -155,6 +155,24 @@ S_INSERT .EQU $00 ; E0 70 --- E0 F0 70 S_HOME .EQU $00 ; E0 6C --- E0 F0 6C S_SPACE .EQU $29 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_MKY .EQU $ +; + .DW SIZ_MKY ; MODULE SIZE + .DW MKY_INITPHASE ; ADR OF INIT PHASE HANDLER +; +MKY_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,MKY_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,MKY_INIT ; DO INIT + RET ; DONE + SCANCODE_TBL: .DB S_7, S_6, S_5, S_4, S_3, S_2, S_1, S_0 ; 00 .DB S_SEMICOLON, S_RBRACKET, S_LBRACKET, S_BSLASH, S_EQUALS, S_MINUS, S_9, S_8 ; 01 @@ -1170,3 +1188,14 @@ MKY_MAPEXT: ; PAIRS ARE [SCANCODE,KEYCODE] FOR EXTENDED SCANCODES ; SLEEP $FB ; WAKE $FC ; BREAK $FD +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_MKY .EQU $ +SIZ_MKY .EQU END_MKY - ORG_MKY +; + MEMECHO "MKY occupies " + MEMECHO SIZ_MKY + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/mmrtc.asm b/Source/HBIOS/mmrtc.asm index 8da09b7e..bf49a663 100644 --- a/Source/HBIOS/mmrtc.asm +++ b/Source/HBIOS/mmrtc.asm @@ -53,6 +53,23 @@ MMRTC_DATA .EQU MMRTC_IO + 1 DEVECHO MMRTC_IO DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_MMRTC .EQU $ +; + .DW SIZ_MMRTC ; MODULE SIZE + .DW MMRTC_INITPHASE ; ADR OF INIT PHASE HANDLER +; +MMRTC_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,MMRTC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,MMRTC_INIT ; DO INIT + RET ; DONE +; ; RTC DEVICE PRE-INITIALIZATION ENTRY ; MMRTC_PREINIT: @@ -295,3 +312,14 @@ MMRTC_WRREG: ; MMRTC_TIMBUF IS DRIVER'S INTERNAL CLOCK DATA BUFFER ; MMRTC_TIMBUF .FILL 6,0 ; 6 BYTES FOR GETTIM, YYMMDDHHMMSS +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_MMRTC .EQU $ +SIZ_MMRTC .EQU END_MMRTC - ORG_MMRTC +; + MEMECHO "MMRTC occupies " + MEMECHO SIZ_MMRTC + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/nabu.asm b/Source/HBIOS/nabu.asm index f9f3f8bd..8a920fd1 100644 --- a/Source/HBIOS/nabu.asm +++ b/Source/HBIOS/nabu.asm @@ -45,6 +45,23 @@ NABU_RIN .EQU NABU_BASE + 0 ; READ FROM SELECTED REGISTER DEVECHO NABU_BASE DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_NABU .EQU $ +; + .DW SIZ_NABU ; MODULE SIZE + .DW NABU_INITPHASE ; ADR OF INIT PHASE HANDLER +; +NABU_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,NABU_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,NABU_INIT ; DO INIT + RET ; DONE +; ; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION ; NABU_PREINIT: @@ -87,3 +104,14 @@ NABU_INIT: ; DATA STORAGE ; NABU_CTLVAL .DB 0 ; SHADOW VAL FOR NABU CONTROL REGISTER +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_NABU .EQU $ +SIZ_NABU .EQU END_NABU - ORG_NABU +; + MEMECHO "NABU occupies " + MEMECHO SIZ_NABU + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/nabukb.asm b/Source/HBIOS/nabukb.asm index 2a5d79a9..3b111281 100644 --- a/Source/HBIOS/nabukb.asm +++ b/Source/HBIOS/nabukb.asm @@ -31,6 +31,23 @@ NABUKB_BUFSZ .EQU 16 ; RECEIVE RING BUFFER SIZE DEVECHO NABUKB_IODAT DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_NABUKB .EQU $ +; + .DW SIZ_NABUKB ; MODULE SIZE + .DW NABUKB_INITPHASE ; ADR OF INIT PHASE HANDLER +; +NABUKB_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,NABUKB_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,NABUKB_INIT ; DO INIT + RET ; DONE +; ; INITIALZIZE THE KEYBOARD CONTROLLER. ; NABUKB_INIT: @@ -354,3 +371,14 @@ NABUKB_XTBL: .DB $00 ; $FD, N/A .DB $00 ; $FE, N/A .DB $00 ; $FF, N/A +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_NABUKB .EQU $ +SIZ_NABUKB .EQU END_NABUKB - ORG_NABUKB +; + MEMECHO "NABUKB occupies " + MEMECHO SIZ_NABUKB + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/pcf.asm b/Source/HBIOS/pcf.asm index 1a6789d2..4d3d7803 100644 --- a/Source/HBIOS/pcf.asm +++ b/Source/HBIOS/pcf.asm @@ -84,6 +84,26 @@ PCF_LABDLY .EQU 65000 ; ; DATA PORT REGISTERS ; +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_PCF .EQU $ +; + .DW SIZ_PCF ; MODULE SIZE + .DW PCF_INITPHASE ; ADR OF INIT PHASE HANDLER +; +PCF_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,PCF_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,PCF_INIT ; DO INIT + RET ; DONE +; +; +; PCF_INIT: CALL NEWLINE ; Formatting PRTS("PCF: IO=0x$") @@ -494,3 +514,14 @@ PCF_TOFAIL .DB "TIMEOUT ERROR$" PCF_ARBFAIL .DB "LOST ARBITRATION$" PCF_PINFAIL .DB "PIN FAIL$" PCF_BBFAIL .DB "BUS BUSY$" +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_PCF .EQU $ +SIZ_PCF .EQU END_PCF - ORG_PCF +; + MEMECHO "PCF occupies " + MEMECHO SIZ_PCF + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/pcrtc.asm b/Source/HBIOS/pcrtc.asm index ceb6c38a..fe0506b3 100644 --- a/Source/HBIOS/pcrtc.asm +++ b/Source/HBIOS/pcrtc.asm @@ -37,6 +37,24 @@ PCRTC_NVSIZE .EQU $30 ; 64 bytes in total is what DS1285 and MC146818 had DEVECHO PCRTC_BASE DEVECHO "\n" +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_PCRTC .EQU $ +; + .DW SIZ_PCRTC ; MODULE SIZE + .DW PCRTC_INITPHASE ; ADR OF INIT PHASE HANDLER +; +PCRTC_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,PCRTC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,PCRTC_INIT ; DO INIT + RET ; DONE +; PCRTC_INIT: LD A, (RTC_DISPACT) ; RTC DISPATCHER ALREADY SET? OR A ; SET FLAGS @@ -232,7 +250,7 @@ PCRTC_SETTIM: LD A, PCRTC_REG_CTLB ; Set Ctl Reg B EZ80_IO OUT (PCRTC_REG), A - LD A, PCRTC_CTLB_VAL|0x80 ; Set the SET bit to stop updates + LD A, PCRTC_CTLB_VAL|$80 ; Set the SET bit to stop updates EZ80_IO OUT (PCRTC_DAT), A @@ -365,4 +383,14 @@ PCRTC_DT .DB $01 PCRTC_HH .DB $00 PCRTC_MM .DB $00 PCRTC_SS .DB $00 - +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_PCRTC .EQU $ +SIZ_PCRTC .EQU END_PCRTC - ORG_PCRTC +; + MEMECHO "PCRTC occupies " + MEMECHO SIZ_PCRTC + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/pio.asm b/Source/HBIOS/pio.asm index 8954d3c6..a78d4fbc 100644 --- a/Source/HBIOS/pio.asm +++ b/Source/HBIOS/pio.asm @@ -31,6 +31,23 @@ PIO1B_DAT .EQU PIO1BASE + $01 ; #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_PIO .EQU $ +; + .DW SIZ_PIO ; MODULE SIZE + .DW PIO_INITPHASE ; ADR OF INIT PHASE HANDLER +; +PIO_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,PIO_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,PIO_INIT ; DO INIT + RET ; DONE +; PIO_PREINIT: ; ; SETUP THE DISPATCH TABLE ENTRIES @@ -363,3 +380,14 @@ PIO1B_CFG: #ENDIF ; PIO_CFGCNT .EQU ($ - PIO_CFG) / PIO_CFGSIZ +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_PIO .EQU $ +SIZ_PIO .EQU END_PIO - ORG_PIO +; + MEMECHO "PIO occupies " + MEMECHO SIZ_PIO + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/pkd.asm b/Source/HBIOS/pkd.asm index b89d794c..ebaee884 100644 --- a/Source/HBIOS/pkd.asm +++ b/Source/HBIOS/pkd.asm @@ -78,6 +78,23 @@ PKD_PRESCL .EQU PKDOSC/100000 ; PRESCALER DEVECHO PKD_ROWS DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_PKD .EQU $ +; + .DW SIZ_PKD ; MODULE SIZE + .DW PKD_INITPHASE ; ADR OF INIT PHASE HANDLER +; +PKD_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,PKD_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,PKD_INIT ; DO INIT + RET ; DONE +; ;__PKD_PREINIT_____________________________________________________________________________________ ; ; CONFIGURE PARALLEL PORT AND INITIALIZE 8279 @@ -879,3 +896,14 @@ PKD_MSG_LDR_LOAD .DB $38,$5C,$5F,$5E,$80,$80,$80,$00 ; "Load... " PKD_MSG_LDR_GO .DB $3D,$5C,$80,$80,$80,$00,$00,$00 ; "Go... " PKD_MSG_MON_RDY .DB $40,$39,$73,$3E,$00,$3E,$73,$40 ; "-CPU UP-" PKD_MSG_MON_BOOT .DB $7F,$5C,$5C,$78,$82,$00,$00,$00 ; "Boot! " +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_PKD .EQU $ +SIZ_PKD .EQU END_PKD - ORG_PKD +; + MEMECHO "PKD occupies " + MEMECHO SIZ_PKD + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ppa.asm b/Source/HBIOS/ppa.asm index ec8505f6..90f2701f 100644 --- a/Source/HBIOS/ppa.asm +++ b/Source/HBIOS/ppa.asm @@ -143,6 +143,23 @@ PPA_LBA .EQU 8 ; OFFSET OF LBA (DWORD) #DEFINE MG014_MAP #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_PPA .EQU $ +; + .DW SIZ_PPA ; MODULE SIZE + .DW PPA_INITPHASE ; ADR OF INIT PHASE HANDLER +; +PPA_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,PPA_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,PPA_INIT ; DO INIT + RET ; DONE +; ;============================================================================= ; INITIALIZATION ENTRY POINT ;============================================================================= @@ -1437,3 +1454,14 @@ PPA1_CFG: ; DEVICE 1 #ENDIF ; .DB $FF ; END MARKER +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_PPA .EQU $ +SIZ_PPA .EQU END_PPA - ORG_PPA +; + MEMECHO "PPA occupies " + MEMECHO SIZ_PPA + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ppide.asm b/Source/HBIOS/ppide.asm index a109720d..ee2874be 100644 --- a/Source/HBIOS/ppide.asm +++ b/Source/HBIOS/ppide.asm @@ -235,6 +235,23 @@ PPIDE_ACC_8BIT .EQU %00000010 ; UNIT WANTS 8 BIT I/O (ELSE 16 BIT) PPIDE_MED_CF .EQU %00000001 ; MEDIA IS CF CARD PPIDE_MED_LBA .EQU %00000010 ; MEDIA HAS LBA CAPABILITY ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_PPIDE .EQU $ +; + .DW SIZ_PPIDE ; MODULE SIZE + .DW PPIDE_INITPHASE ; ADR OF INIT PHASE HANDLER +; +PPIDE_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,PPIDE_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,PPIDE_INIT ; DO INIT + RET ; DONE +; PPIDE_DEVCNT .EQU PPIDECNT * 2 ; PPIDE_CFGTBL: @@ -2456,3 +2473,14 @@ PPIDE_PKTCMD_SENSE .DB $03, $00, $00, $00, $FF, $00, $00, $00, $00, $00, $00, $0 PPIDE_PKTCMD_RDCAP .DB $25, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; READ CAPACITY PPIDE_PKTCMD_RW10 .DB $28, $00, $00, $00, $00, $00, $00, $00, $01, $00, $00, $00 ; READ/WRITE SECTOR PPIDE_PKTCMD_TSTRDY .DB $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; TEST UNIT READY +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_PPIDE .EQU $ +SIZ_PPIDE .EQU END_PPIDE - ORG_PPIDE +; + MEMECHO "PPIDE occupies " + MEMECHO SIZ_PPIDE + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ppk.asm b/Source/HBIOS/ppk.asm index fa913492..af370b64 100644 --- a/Source/HBIOS/ppk.asm +++ b/Source/HBIOS/ppk.asm @@ -35,6 +35,23 @@ PPK_KEYRDY .EQU 80H ; BIT 7, INDICATES A DECODED KEYCODE IS READY PPK_DEFRPT .EQU $40 ; DEFAULT REPEAT RATE (.5 SEC DELAY, 30CPS) PPK_DEFSTATE .EQU KBD_NUMLCK ; DEFAULT STATE (NUM LOCK ON) ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_PPK .EQU $ +; + .DW SIZ_PPK ; MODULE SIZE + .DW PPK_INITPHASE ; ADR OF INIT PHASE HANDLER +; +PPK_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,PPK_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,PPK_INIT ; DO INIT + RET ; DONE +; ;__________________________________________________________________________________________________ ; DATA ;__________________________________________________________________________________________________ @@ -903,3 +920,14 @@ PPK_MAPNUMPAD: ; KEYCODE TRANSLATION FROM NUMPAD RANGE TO STD ASCII/KEYCODES ; SLEEP $FB ; WAKE $FC ; BREAK $FD +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_PPK .EQU $ +SIZ_PPK .EQU END_PPK - ORG_PPK +; + MEMECHO "PPK occupies " + MEMECHO SIZ_PPK + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ppp.asm b/Source/HBIOS/ppp.asm index b1de0b83..887adc5b 100644 --- a/Source/HBIOS/ppp.asm +++ b/Source/HBIOS/ppp.asm @@ -47,6 +47,23 @@ PPP_CMDSIOTXFL .EQU $56 ; SERIAL PORT TRANSMIT BUFFER FLUSH (NOT IMPLEMENTED) PPP_CMDRESET .EQU $F0 ; SOFT RESET PROPELLER PPP_CMDVER .EQU $F1 ; SEND FIRMWARE VERSION ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_PPP .EQU $ +; + .DW SIZ_PPP ; MODULE SIZE + .DW PPP_INITPHASE ; ADR OF INIT PHASE HANDLER +; +PPP_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,PPP_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,PPP_INIT ; DO INIT + RET ; DONE +; ; GLOBAL PARPORTPROP INITIALIZATION ; PPP_INIT: @@ -1154,3 +1171,14 @@ PPPSD_DSKBUF .DW 0 PPPSD_DSKSTAT .DB 0 PPPSD_ERRCODE .DW 0,0 PPPSD_CSDBUF .FILL 16,0 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_PPP .EQU $ +SIZ_PPP .EQU END_PPP - ORG_PPP +; + MEMECHO "PPP occupies " + MEMECHO SIZ_PPP + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/prp.asm b/Source/HBIOS/prp.asm index 0efe5361..98034d5d 100644 --- a/Source/HBIOS/prp.asm +++ b/Source/HBIOS/prp.asm @@ -11,6 +11,23 @@ PRP_IOBASE .EQU $A8 DEVECHO PRP_IOBASE DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_PRP .EQU $ +; + .DW SIZ_PRP ; MODULE SIZE + .DW PRP_INITPHASE ; ADR OF INIT PHASE HANDLER +; +PRP_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,PRP_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,PRP_INIT ; DO INIT + RET ; DONE +; ; GLOBAL PROPIO INITIALIZATION ; PRP_INIT: @@ -1091,3 +1108,14 @@ PRPSD_CSDBUF .FILL 16,0 PRPSD_CMD .DB 0 ; PRPSD_TIMEOUT .DW $0000 ; FIX: MAKE THIS CPU SPEED RELATIVE +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_PRP .EQU $ +SIZ_PRP .EQU END_PRP - ORG_PRP +; + MEMECHO "PRP occupies " + MEMECHO SIZ_PRP + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/rf.asm b/Source/HBIOS/rf.asm index 2ffa687e..ef2c5ccb 100644 --- a/Source/HBIOS/rf.asm +++ b/Source/HBIOS/rf.asm @@ -27,6 +27,23 @@ RF_DEV .EQU 0 ; OFFSET OF DEVICE NUMBER (BYTE) RF_STAT .EQU 1 ; OFFSET OF STATUS (BYTE) RF_LBA .EQU 2 ; OFFSET OF LBA (DWORD) RF_IOAD .EQU 7 ; OFFSET OF DEVICE IO ADDRESS +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_RF .EQU $ +; + .DW SIZ_RF ; MODULE SIZE + .DW RF_INITPHASE ; ADR OF INIT PHASE HANDLER +; +RF_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,RF_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,RF_INIT ; DO INIT + RET ; DONE #IF ($RF_DEVCNT > RF_MAXRF) .ECHO "*** ONLY 4 RAM FLOPPY DEVICES SUPPORTED ***\n" @@ -356,3 +373,14 @@ RF_IO .DB 0 ; PORT ADDRESS OF ACTIVE DEVICE RF_RWFNADR .DW 0 ; RF_DSKBUF .DW 0 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_RF .EQU $ +SIZ_RF .EQU END_RF - ORG_RF +; + MEMECHO "RF occupies " + MEMECHO SIZ_RF + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/rp5rtc.asm b/Source/HBIOS/rp5rtc.asm index 98a93112..d614f1bc 100644 --- a/Source/HBIOS/rp5rtc.asm +++ b/Source/HBIOS/rp5rtc.asm @@ -59,6 +59,24 @@ MD_ALRM .EQU 4 DEVECHO RP5RTC_REG DEVECHO "\n" +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_RP5RTC .EQU $ +; + .DW SIZ_RP5RTC ; MODULE SIZE + .DW RP5RTC_INITPHASE ; ADR OF INIT PHASE HANDLER +; +RP5RTC_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,RP5RTC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,RP5RTC_INIT ; DO INIT + RET ; DONE +; RP5RTC_INIT: LD A, (RTC_DISPACT) ; RTC DISPATCHER ALREADY SET? OR A ; SET FLAGS @@ -473,3 +491,14 @@ RP5RTC_HH .DB 00 RP5RTC_MM .DB 00 RP5RTC_SS .DB 00 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_RP5RTC .EQU $ +SIZ_RP5RTC .EQU END_RP5RTC - ORG_RP5RTC +; + MEMECHO "RP5RTC occupies " + MEMECHO SIZ_RP5RTC + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/scc.asm b/Source/HBIOS/scc.asm index 72770a49..357d6eac 100644 --- a/Source/HBIOS/scc.asm +++ b/Source/HBIOS/scc.asm @@ -77,6 +77,23 @@ SCC1B_DAT .EQU SCC1BASE + $02 ; #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_SCC .EQU $ +; + .DW SIZ_SCC ; MODULE SIZE + .DW SCC_INITPHASE ; ADR OF INIT PHASE HANDLER +; +SCC_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,SCC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,SCC_INIT ; DO INIT + RET ; DONE +; SCC_PREINIT: ; ; SETUP THE DISPATCH TABLE ENTRIES @@ -1074,3 +1091,14 @@ SCC1B_CFG: #ENDIF ; SCC_CFGCNT .EQU ($ - SCC_CFG) / SCC_CFGSIZ +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_SCC .EQU $ +SIZ_SCC .EQU END_SCC - ORG_SCC +; + MEMECHO "SCC occupies " + MEMECHO SIZ_SCC + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/scon.asm b/Source/HBIOS/scon.asm index 3821f29b..73f86dc8 100644 --- a/Source/HBIOS/scon.asm +++ b/Source/HBIOS/scon.asm @@ -20,6 +20,23 @@ SCON_ROWS .EQU 40 DEVECHO SCON_IOBASE DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_SCON .EQU $ +; + .DW SIZ_SCON ; MODULE SIZE + .DW SCON_INITPHASE ; ADR OF INIT PHASE HANDLER +; +SCON_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,SCON_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,SCON_INIT ; DO INIT + RET ; DONE +; ; ; SCON_PREINIT: @@ -180,4 +197,15 @@ SCON_DETECT1: ; ; ; -SCON_UNIT .DB $FF ; OUR ASSIGNED UNIT NUMBER \ No newline at end of file +SCON_UNIT .DB $FF ; OUR ASSIGNED UNIT NUMBER +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_SCON .EQU $ +SIZ_SCON .EQU END_SCON - ORG_SCON +; + MEMECHO "SCON occupies " + MEMECHO SIZ_SCON + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/scsi.asm b/Source/HBIOS/scsi.asm index 94cadcb0..69e3f3de 100644 --- a/Source/HBIOS/scsi.asm +++ b/Source/HBIOS/scsi.asm @@ -62,7 +62,24 @@ SCSI_LUN .EQU 2 ; TARGET LUN SCSI_STAT .EQU 3 ; LAST STATUS (BYTE) SCSI_MEDCAP .EQU 4 ; MEDIA CAPACITY (DWORD) SCSI_LBA .EQU 8 ; OFFSET OF LBA (DWORD) -; +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_SCSI .EQU $ +; + .DW SIZ_SCSI ; MODULE SIZE + .DW SCSI_INITPHASE ; ADR OF INIT PHASE HANDLER +; +SCSI_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,SCSI_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,SCSI_INIT ; DO INIT + RET ; DONE +; SCSI_CFGSIZ .EQU 12 ; SIZE OF CFG TBL ENTRIES ; SCSI_CFGTBL: @@ -931,3 +948,14 @@ SCSI_S_STAT .DW 0 ; SCSI ENDING STATUS SCSI_S_MSG .DW 0 ; SCSI MESSAGE ; SCSI_CAP_BUF .FILL 8,0 ; SCSI CAPACITY DATA BUFFER +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_SCSI .EQU $ +SIZ_SCSI .EQU END_SCSI - ORG_SCSI +; + MEMECHO "SCSI occupies " + MEMECHO SIZ_SCSI + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/sd.asm b/Source/HBIOS/sd.asm index 80a3c0ad..f7261325 100644 --- a/Source/HBIOS/sd.asm +++ b/Source/HBIOS/sd.asm @@ -528,6 +528,23 @@ SD_STCRCERR .EQU -8 ; CRC ERROR ON RECEIVED DATA PACKET SD_STNOMEDIA .EQU -9 ; NO MEDIA IN CONNECTOR SD_STWRTPROT .EQU -10 ; ATTEMPT TO WRITE TO WRITE PROTECTED MEDIA ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_SD .EQU $ +; + .DW SIZ_SD ; MODULE SIZE + .DW SD_INITPHASE ; ADR OF INIT PHASE HANDLER +; +SD_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,SD_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,SD_INIT ; DO INIT + RET ; DONE +; ; IDE DEVICE CONFIGURATION ; SD_CFGSIZ .EQU 12 ; SIZE OF CFG TBL ENTRIES @@ -2715,3 +2732,14 @@ MIRTAB .DB 00H, 80H, 40H, 0C0H, 20H, 0A0H, 60H, 0E0H, 10H, 90H, 50H, 0D0H, 30H, .DB 0FH, 8FH, 4FH, 0CFH, 2FH, 0AFH, 6FH, 0EFH, 1FH, 9FH, 5FH, 0DFH, 3FH, 0BFH, 7FH, 0FFH ; #ENDIF +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_SD .EQU $ +SIZ_SD .EQU END_SD - ORG_SD +; + MEMECHO "SD occupies " + MEMECHO SIZ_SD + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/simrtc.asm b/Source/HBIOS/simrtc.asm index 17cc2c3d..7558fb28 100644 --- a/Source/HBIOS/simrtc.asm +++ b/Source/HBIOS/simrtc.asm @@ -12,6 +12,23 @@ SIMRTC_BUFSIZ .EQU 6 ; SIX BYTE BUFFER (YYMMDDHHMMSS) DEVECHO SIMRTC_IO DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_SIMRTC .EQU $ +; + .DW SIZ_SIMRTC ; MODULE SIZE + .DW SIMRTC_INITPHASE ; ADR OF INIT PHASE HANDLER +; +SIMRTC_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,SIMRTC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,SIMRTC_INIT ; DO INIT + RET ; DONE +; ; RTC DEVICE INITIALIZATION ENTRY ; SIMRTC_INIT: @@ -154,3 +171,16 @@ SIMRTC_DT .DB 0 SIMRTC_HH .DB 0 SIMRTC_MM .DB 0 SIMRTC_SS .DB 0 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_SIMRTC .EQU $ +SIZ_SIMRTC .EQU END_SIMRTC - ORG_SIMRTC +; + MEMECHO "SIMRTC occupies " + MEMECHO SIZ_SIMRTC + MEMECHO " bytes.\n" + + diff --git a/Source/HBIOS/sio.asm b/Source/HBIOS/sio.asm index 5d0027b1..82d98acf 100644 --- a/Source/HBIOS/sio.asm +++ b/Source/HBIOS/sio.asm @@ -113,6 +113,23 @@ SIO1B_DAT .EQU SIO1BASE + $00 ; #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_SIO .EQU $ +; + .DW SIZ_SIO ; MODULE SIZE + .DW SIO_INITPHASE ; ADR OF INIT PHASE HANDLER +; +SIO_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,SIO_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,SIO_INIT ; DO INIT + RET ; DONE +; SIO_PREINIT: ; ; SETUP THE DISPATCH TABLE ENTRIES @@ -1320,3 +1337,14 @@ SIO1B_CFG: #ENDIF ; SIO_CFGCNT .EQU ($ - SIO_CFG) / SIO_CFGSIZ +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_SIO .EQU $ +SIZ_SIO .EQU END_SIO - ORG_SIO +; + MEMECHO "SIO occupies " + MEMECHO SIZ_SIO + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/sn76489.asm b/Source/HBIOS/sn76489.asm index a9f1ffe3..4f9abda2 100644 --- a/Source/HBIOS/sn76489.asm +++ b/Source/HBIOS/sn76489.asm @@ -50,6 +50,23 @@ SN7_TONECNT .EQU 3 ; COUNT NUMBER OF TONE CHANNELS SN7_NOISECNT .EQU 1 ; COUNT NUMBER OF NOISE CHANNELS SN7_CHCNT .EQU SN7_TONECNT + SN7_NOISECNT ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_SN7 .EQU $ +; + .DW SIZ_SN7 ; MODULE SIZE + .DW SN7_INITPHASE ; ADR OF INIT PHASE HANDLER +; +SN7_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,SN76489_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,SN76489_INIT ; DO INIT + RET ; DONE +; #INCLUDE "audio.inc" ; ; BLINDLY RESET THE PSG AS SOON AS WE CAN AFTER BOOT BECAUSE IT @@ -531,3 +548,14 @@ SN7NOTETBL: .DW SN7RATIO / 5579 ; .DW SN7RATIO / 5661 ; .DW SN7RATIO / 5743 ; +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_SN7 .EQU $ +SIZ_SN7 .EQU END_SN7 - ORG_SN7 +; + MEMECHO "SN7 occupies " + MEMECHO SIZ_SN7 + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/spk.asm b/Source/HBIOS/spk.asm index d754aceb..93ee6717 100644 --- a/Source/HBIOS/spk.asm +++ b/Source/HBIOS/spk.asm @@ -11,6 +11,23 @@ ; NO VOLUME ADJUSTMENT DUE TO HARDWARE LIMITATION ;====================================================================== ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_SP .EQU $ +; + .DW SIZ_SP ; MODULE SIZE + .DW SP_INITPHASE ; ADR OF INIT PHASE HANDLER +; +SP_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,SP_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,SP_INIT ; DO INIT + RET ; DONE +; ; DRIVER FUNCTION TABLE AND INSTANCE DATA ; SP_FNTBL: @@ -33,7 +50,7 @@ SP_IDAT .EQU 0 ; NO INSTANCE DATA ASSOCIATED WITH THIS DEVICE ; SP_TONECNT .EQU 1 ; COUNT NUMBER OF TONE CHANNELS SP_NOISECNT .EQU 0 ; COUNT NUMBER OF NOISE CHANNELS - +; ; FOR OTHER DRIVERS, THE PERIOD VALUE FOR THE TONE IS STORED AT PENDING_PERIOD ; FOR THE SPK DRIVER THE ADDRESS IN THE TONE TABLE IS STORED IN PENDING_PERIOD ; @@ -512,3 +529,13 @@ SP_NOTE_B5: ; SP_NOTCNT .EQU ($-SP_TUNTBL) / 4 ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_SP .EQU $ +SIZ_SP .EQU END_SP - ORG_SP +; + MEMECHO "SP occupies " + MEMECHO SIZ_SP + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/sser.asm b/Source/HBIOS/sser.asm index 93d8669c..f488ad9d 100644 --- a/Source/HBIOS/sser.asm +++ b/Source/HBIOS/sser.asm @@ -9,6 +9,23 @@ DEVECHO SSERSTATUS DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_SSER .EQU $ +; + .DW SIZ_SSER ; MODULE SIZE + .DW SSER_INITPHASE ; ADR OF INIT PHASE HANDLER +; +SSER_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,SSER_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,SSER_INIT ; DO INIT + RET ; DONE +; ; ; SSER_PREINIT: @@ -131,7 +148,6 @@ SSER_DEVICE: ; $FF, WE ASSUME NOT PRESENT. THEN READ PORT A DIFFERENT WAY. IF ; PRESENT PORT SHOULD HAVE SAME VALUE. ; -; SSER_DETECT: IN A,(SSERSTATUS) ; GET DATA PORT VALUE DIRECTLY CP $FF ; CHECK FOR $FF @@ -146,4 +162,15 @@ SSER_DETECT1: ; ; ; -SSER_PRESENT .DB 0 ; FLAG FOR HARDWARE PRESENT \ No newline at end of file +SSER_PRESENT .DB 0 ; FLAG FOR HARDWARE PRESENT +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_SSER .EQU $ +SIZ_SSER .EQU END_SSER - ORG_SSER +; + MEMECHO "SSER occupies " + MEMECHO SIZ_SSER + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm index 3c1a40a5..8ef8bb66 100644 --- a/Source/HBIOS/std.asm +++ b/Source/HBIOS/std.asm @@ -87,6 +87,13 @@ BM_IMGBOOT .EQU 3 ; IMAGE BOOT (DEPRECATED) START_WARM .EQU 1 ; COLD START START_COLD .EQU 2 ; WARM START ; +; HBIOS INIT PHASE IDS +; +; USE EQUATES, VALUES WILL CHANGE!!! +; +HB_PHASE_PREINIT .EQU 1 +HB_PHASE_INIT .EQU 2 +; ; MEMORY MANAGERS ; MM_NONE .EQU 0 diff --git a/Source/HBIOS/syq.asm b/Source/HBIOS/syq.asm index c107e4ea..b9498098 100644 --- a/Source/HBIOS/syq.asm +++ b/Source/HBIOS/syq.asm @@ -192,6 +192,23 @@ SYQ_TONORM .EQU 4 ; NORMAL TIMEOUT IS 1 SEC (1 / .25) #DEFINE MG014_MAP #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_SYQ .EQU $ +; + .DW SIZ_SYQ ; MODULE SIZE + .DW SYQ_INITPHASE ; ADR OF INIT PHASE HANDLER +; +SYQ_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,SYQ_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,SYQ_INIT ; DO INIT + RET ; DONE +; ;============================================================================= ; INITIALIZATION ENTRY POINT ;============================================================================= @@ -1486,3 +1503,14 @@ SYQ1_CFG: ; DEVICE 1 #ENDIF ; .DB $FF ; END MARKER +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_SYQ .EQU $ +SIZ_SYQ .EQU END_SYQ - ORG_SYQ +; + MEMECHO "SYQ occupies " + MEMECHO SIZ_SYQ + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/term.asm b/Source/HBIOS/term.asm index 5ad5513e..3e2290c8 100644 --- a/Source/HBIOS/term.asm +++ b/Source/HBIOS/term.asm @@ -15,6 +15,23 @@ ;====================================================================== ; ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_TERM .EQU $ +; + .DW SIZ_TERM ; MODULE SIZE + .DW TERM_INITPHASE ; ADR OF INIT PHASE HANDLER +; +TERM_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,TERM_PREINIT ; DO PREINIT + ;CP HB_PHASE_INIT ; INIT PHASE? + ;JP Z,TERM_INIT ; DO INIT + RET ; DONE +; ;====================================================================== ; TERMINAL DRIVER - PRE-CONSOLE INITIALIZATION ;====================================================================== @@ -133,4 +150,15 @@ TERM_RESET: XOR A RET ; -#ENDIF \ No newline at end of file +#ENDIF +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_TERM .EQU $ +SIZ_TERM .EQU END_TERM - ORG_TERM +; + MEMECHO "TERM occupies " + MEMECHO SIZ_TERM + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/tms.asm b/Source/HBIOS/tms.asm index 5f0a302e..cbf7931d 100644 --- a/Source/HBIOS/tms.asm +++ b/Source/HBIOS/tms.asm @@ -236,6 +236,23 @@ USBKYBENABLE .SET TRUE ; INCLUDE USB KEYBOARD SUPPORT #ENDIF #ENDIF ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_TMS .EQU $ +; + .DW SIZ_TMS ; MODULE SIZE + .DW TMS_INITPHASE ; ADR OF INIT PHASE HANDLER +; +TMS_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,TMS_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,TMS_INIT ; DO INIT + RET ; DONE +; ;====================================================================== ; TMS DRIVER - INITIALIZATION ;====================================================================== @@ -1605,3 +1622,14 @@ TMS_DCNTL .DB $00 ; SAVE Z180 DCNTL AS NEEDED ; F Bright White F ;=============================================================================== ; +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_TMS .EQU $ +SIZ_TMS .EQU END_TMS - ORG_TMS +; + MEMECHO "TMS occupies " + MEMECHO SIZ_TMS + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/tser.asm b/Source/HBIOS/tser.asm index 1d6eec68..5b1445a6 100644 --- a/Source/HBIOS/tser.asm +++ b/Source/HBIOS/tser.asm @@ -14,6 +14,23 @@ TSER_DATA .EQU $35 DEVECHO TSER_DATA DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_TSER .EQU $ +; + .DW SIZ_TSER ; MODULE SIZE + .DW TSER_INITPHASE ; ADR OF INIT PHASE HANDLER +; +TSER_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,TSER_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,TSER_INIT ; DO INIT + RET ; DONE +; ; ; TSER_PREINIT: @@ -114,3 +131,14 @@ TSER_DEVICE: LD L,TSER_DATA ; L := BASE I/O ADDRESS XOR A ; SIGNAL SUCCESS RET +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_TSER .EQU $ +SIZ_TSER .EQU END_TSER - ORG_TSER +; + MEMECHO "TSER occupies " + MEMECHO SIZ_TSER + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/tvga.asm b/Source/HBIOS/tvga.asm index 99413cf6..c7e803bc 100644 --- a/Source/HBIOS/tvga.asm +++ b/Source/HBIOS/tvga.asm @@ -52,6 +52,23 @@ KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT DEVECHO TVGA_KBDDATA DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_TVGA .EQU $ +; + .DW SIZ_TVGA ; MODULE SIZE + .DW TVGA_INITPHASE ; ADR OF INIT PHASE HANDLER +; +TVGA_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,TVGA_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,TVGA_INIT ; DO INIT + RET ; DONE +; ;====================================================================== ; TRION VGA DRIVER - INITIALIZATION ;====================================================================== @@ -505,3 +522,14 @@ TVGA_IDAT: .DB KBDMODE_T35 ; S100 T35 KEYBOARD CONTROLLER .DB TVGA_KBDST .DB TVGA_KBDDATA +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_TVGA .EQU $ +SIZ_TVGA .EQU END_TVGA - ORG_TVGA +; + MEMECHO "TVGA occupies " + MEMECHO SIZ_TVGA + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/uart.asm b/Source/HBIOS/uart.asm index a7362766..19f5badb 100644 --- a/Source/HBIOS/uart.asm +++ b/Source/HBIOS/uart.asm @@ -83,6 +83,24 @@ UART1_IVT .EQU IVT(INT_UART1) ; #DEFINE UART_INP(RID) CALL UART_INP_IMP \ .DB RID #DEFINE UART_OUTP(RID) CALL UART_OUTP_IMP \ .DB RID +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_UART .EQU $ +; + .DW SIZ_UART ; MODULE SIZE + .DW UART_INITPHASE ; ADR OF INIT PHASE HANDLER +; +UART_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,UART_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,UART_INIT ; DO INIT + RET ; DONE + ; ; ; @@ -1166,3 +1184,14 @@ UART1_BUF .FILL UART_BUFSZ,0 ; RECEIVE RING BUFFER #ENDIF ; #ENDIF +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_UART .EQU $ +SIZ_UART .EQU END_UART - ORG_UART +; + MEMECHO "UART occupies " + MEMECHO SIZ_UART + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/uf.asm b/Source/HBIOS/uf.asm index 972ebe05..a8fd16c0 100644 --- a/Source/HBIOS/uf.asm +++ b/Source/HBIOS/uf.asm @@ -17,6 +17,24 @@ FIFO_DATA .EQU (UFBASE+0) ; READ/WRITE DATA FIFO_STATUS .EQU (UFBASE+1) ; READ/WRITE STATUS FIFO_SEND_IMM .EQU (UFBASE+2) ; WRITE PORT TO FORCE BUFFER FLUSH FIFO_BUFFER .EQU FALSE ; OPTION TO BUFFER OUTPUT FOR 17ms +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_UF .EQU $ +; + .DW SIZ_UF ; MODULE SIZE + .DW UF_INITPHASE ; ADR OF INIT PHASE HANDLER +; +UF_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,UF_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,UF_INIT ; DO INIT + RET ; DONE + ; UF_USB_ACTIVE .DB 0 ; USB CABLE CONNECTED STATUS FLAG ; @@ -187,3 +205,14 @@ UF_FNTBL: .ECHO "*** INVALID USB-FIFO FUNCTION TABLE ***\n" #ENDIF ; +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_UF .EQU $ +SIZ_UF .EQU END_UF - ORG_UF +; + MEMECHO "UF occupies " + MEMECHO SIZ_UF + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/vdu.asm b/Source/HBIOS/vdu.asm index 96c8d84c..fc1871d9 100644 --- a/Source/HBIOS/vdu.asm +++ b/Source/HBIOS/vdu.asm @@ -89,6 +89,23 @@ VDU_R11 .EQU DSCANL-1 DEVECHO VDU_PPIA DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_VDU .EQU $ +; + .DW SIZ_VDU ; MODULE SIZE + .DW VDU_INITPHASE ; ADR OF INIT PHASE HANDLER +; +VDU_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,VDU_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,VDU_INIT ; DO INIT + RET ; DONE +; ;====================================================================== ; VDU DRIVER - INITIALIZATION ;====================================================================== @@ -738,3 +755,14 @@ VDU_IDAT: .DB VDU_PPIB .DB VDU_PPIC .DB VDU_PPIX +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_VDU .EQU $ +SIZ_VDU .EQU END_VDU - ORG_VDU +; + MEMECHO "VDU occupies " + MEMECHO SIZ_VDU + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/vga.asm b/Source/HBIOS/vga.asm index df4a8d96..278c829b 100644 --- a/Source/HBIOS/vga.asm +++ b/Source/HBIOS/vga.asm @@ -104,6 +104,23 @@ KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT ; SCREEN 2 ROW DEFINES WHERE BUFFER BYTE 0 WILL BE DISPLAYED (R18) ; SCREEN 2 RAM ADDRESS IS ALWAYS ZERO (R19/R20) ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_VGA .EQU $ +; + .DW SIZ_VGA ; MODULE SIZE + .DW VGA_INITPHASE ; ADR OF INIT PHASE HANDLER +; +VGA_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,VGA_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,VGA_INIT ; DO INIT + RET ; DONE +; ;====================================================================== ; VGA DRIVER - INITIALIZATION ;====================================================================== @@ -1046,3 +1063,14 @@ VGA_IDAT: .DB KBDMODE_PS2 ; PS/2 8242 KEYBOARD CONTROLLER .DB VGA_KBDST .DB VGA_KBDDATA +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_VGA .EQU $ +SIZ_VGA .EQU END_VGA - ORG_VGA +; + MEMECHO "VGA occupies " + MEMECHO SIZ_VGA + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/vrc.asm b/Source/HBIOS/vrc.asm index 740dba3d..f03d13fc 100644 --- a/Source/HBIOS/vrc.asm +++ b/Source/HBIOS/vrc.asm @@ -39,6 +39,23 @@ KBDENABLE .SET TRUE ; INCLUDE KBD KEYBOARD SUPPORT DEVECHO VRC_KBDDATA DEVECHO "\n" ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_VRC .EQU $ +; + .DW SIZ_VRC ; MODULE SIZE + .DW VRC_INITPHASE ; ADR OF INIT PHASE HANDLER +; +VRC_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,VRC_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,VRC_INIT ; DO INIT + RET ; DONE +; ;====================================================================== ; VRC DRIVER - INITIALIZATION ;====================================================================== @@ -636,3 +653,14 @@ VRC_IDAT: .DB KBDMODE_VRC ; VGARC KEYBOARD CONTROLLER .DB VRC_KBDST .DB VRC_KBDDATA +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_VRC .EQU $ +SIZ_VRC .EQU END_VRC - ORG_VRC +; + MEMECHO "VRC occupies " + MEMECHO SIZ_VRC + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/xosera.asm b/Source/HBIOS/xosera.asm index 13060f71..73407892 100644 --- a/Source/HBIOS/xosera.asm +++ b/Source/HBIOS/xosera.asm @@ -131,6 +131,23 @@ TILE_CTRL_DISP_TILEMEM_F .EQU $0200 SYNC_RETRIES .EQU 250 TERMENABLE .SET TRUE ; INCLUDE TERMINAL PSEUDODEVICE DRIVER +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_XOS .EQU $ +; + .DW SIZ_XOS ; MODULE SIZE + .DW XOS_INITPHASE ; ADR OF INIT PHASE HANDLER +; +XOS_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,XOS_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,XOS_INIT ; DO INIT + RET ; DONE ;====================================================================== ; XOSERA DRIVER - INITIALIZATION @@ -1048,3 +1065,14 @@ XOS_IDAT2: .DB KBDMODE_NONE .DB 0 .DB 0 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_XOS .EQU $ +SIZ_XOS .EQU END_XOS - ORG_XOS +; + MEMECHO "XOS occupies " + MEMECHO SIZ_XOS + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/ym2612.asm b/Source/HBIOS/ym2612.asm index 0516ef42..7c092364 100644 --- a/Source/HBIOS/ym2612.asm +++ b/Source/HBIOS/ym2612.asm @@ -22,6 +22,24 @@ YMDAT .EQU VGMBASE+01H ; Primary YM2162 11000001 a1=0 a0=1 YM2SEL .EQU VGMBASE+02H ; Secondary YM2162 11000010 a1=1 a0=0 YM2DAT .EQU VGMBASE+03H ; Secondary YM2162 11000011 a1=1 a0=1 +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_YM .EQU $ +; + .DW SIZ_YM ; MODULE SIZE + .DW YM_INITPHASE ; ADR OF INIT PHASE HANDLER +; +YM_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + ;CP HB_PHASE_PREINIT ; PREINIT PHASE? + ;JP Z,YM2612_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,YM2612_INIT ; DO INIT + RET ; DONE + ;------------------------------------------------------------------------------ ; Device capabilities and configuration ;------------------------------------------------------------------------------ @@ -890,3 +908,14 @@ ym_cfg: .db part0, 24/2 ; .db $00 ; End flag #ENDIF +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_YM .EQU $ +SIZ_YM .EQU END_YM - ORG_YM +; + MEMECHO "YM occupies " + MEMECHO SIZ_YM + MEMECHO " bytes.\n" diff --git a/Source/HBIOS/z2u.asm b/Source/HBIOS/z2u.asm index 698fa4a2..b5c1e757 100644 --- a/Source/HBIOS/z2u.asm +++ b/Source/HBIOS/z2u.asm @@ -67,6 +67,23 @@ Z2U_BUFSZ .EQU 144 ; RECEIVE RING BUFFER SIZE Z2U_NONE .EQU 0 ; NOT PRESENT Z2U_PRESENT .EQU 1 ; PRESENT ; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE HEADER +;-------------------------------------------------------------------------------------------------- +; +ORG_Z2U .EQU $ +; + .DW SIZ_Z2U ; MODULE SIZE + .DW Z2U_INITPHASE ; ADR OF INIT PHASE HANDLER +; +Z2U_INITPHASE: + ; INIT PHASE HANDLER, A=PHASE + CP HB_PHASE_PREINIT ; PREINIT PHASE? + JP Z,Z2U_PREINIT ; DO PREINIT + CP HB_PHASE_INIT ; INIT PHASE? + JP Z,Z2U_INIT ; DO INIT + RET ; DONE +; ; ; Z2U_PREINIT: @@ -725,3 +742,14 @@ Z2U0_CFG: Z2U_CFGSIZ .EQU $ - Z2U_CFG ; SIZE OF ONE CFG TABLE ENTRY ; Z2U_CFGCNT .EQU ($ - Z2U_CFG) / Z2U_CFGSIZ +; +;-------------------------------------------------------------------------------------------------- +; HBIOS MODULE TRAILER +;-------------------------------------------------------------------------------------------------- +; +END_Z2U .EQU $ +SIZ_Z2U .EQU END_Z2U - ORG_Z2U +; + MEMECHO "Z2U occupies " + MEMECHO SIZ_Z2U + MEMECHO " bytes.\n" diff --git a/Source/ver.inc b/Source/ver.inc index 476849bb..3f47343a 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,7 +2,7 @@ #DEFINE RMN 6 #DEFINE RUP 0 #DEFINE RTP 0 -#DEFINE BIOSVER "3.6.0-dev.48" +#DEFINE BIOSVER "3.6.0-dev.49" #define rmj RMJ #define rmn RMN #define rup RUP diff --git a/Source/ver.lib b/Source/ver.lib index 1944f0ef..37bf734c 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 6 rup equ 0 rtp equ 0 biosver macro - db "3.6.0-dev.48" + db "3.6.0-dev.49" endm