diff --git a/Source/HBIOS/pldser.asm b/Source/HBIOS/pldser.asm
index f468c3d9..9f83df30 100644
--- a/Source/HBIOS/pldser.asm
+++ b/Source/HBIOS/pldser.asm
@@ -4,13 +4,30 @@
 ;==================================================================================================
 ;
 ; THIS SERIAL DRIVER SUPPORTS THE DLP-USB DEVICE ON THE S100 SERIAL-IO
-; BOARD.  THE STATUS PORT IS ACTUALLY BITS 6-7 OF PORT C OF THE 8255.  IT IS ASSUMED
-; THAT THE 8255 IS ALREADY PROGRAMMED AS NEEDED.
+; BOARD.  THE STATUS PORT IS ACTUALLY BITS 6-7 OF PORT C OF THE 8255.
+;
+; STATUS BITS:				IDLE
+;   7: 0=CHAR PENDING			1
+;   6: 0=XMIT HOLDING REGISTER EMPTY	0
+;   5-0: UNDEFINED
 ;
 ; TODO:
 ;
-PLDSER_STAT	.EQU	$AA
-PLDSER_DATA	.EQU	$AC
+PLDSER_PPI_BASE	.EQU	$A8
+;
+PLDSER_PPIA	.EQU	PLDSER_PPI_BASE + 0
+PLDSER_PPIB	.EQU	PLDSER_PPI_BASE + 1
+PLDSER_PPIC	.EQU	PLDSER_PPI_BASE + 2
+PLDSER_PPICTL	.EQU	PLDSER_PPI_BASE + 3
+;
+PLDSER_STAT	.EQU	PLDSER_PPIC
+PLDSER_DATA	.EQU	PLDSER_PPI_BASE + 4
+;
+; ACCORDING TO THE S100 SERIAL-IO BOARD CONVENTIONS, THE PPI IS
+; CONFIGURED FOR MODE 0 WITH A=INPUT, B=OUTPUT, C0-3=OUTPUT,
+; C4-7=INPUT
+;
+PLDSER_PPICFG	.EQU	%10011000
 ;
 		DEVECHO	"PLDSER: IO="
 		DEVECHO	PLDSER_DATA
@@ -28,6 +45,8 @@ PLDSER_PREINIT:
 	RET	NZ			; ABORT IF NOT PRESENT
 	OR	$FF			; PRESENT FLAG
 	LD	(PLDSER_PRESENT),A	; STORE IT
+;
+	CALL	PLDSER_INITDEV
 ;
 ; ADD OURSELVES TO CIO DISPATCH TABLE
 ;
@@ -109,7 +128,10 @@ PLDSER_OST:
 ;
 ;
 PLDSER_INITDEV:
-	SYSCHKERR(ERR_NOTIMPL)
+	; INIT THE PPI.  THE PLD ADAPTER ITSELF HAS NO
+	; CONFIGURATION CAPABILITIES.
+	LD	A,PLDSER_PPICFG		; CONFIG 8255 PORTS: B=OUTPUT
+	OUT	(PLDSER_PPICTL),A	; WRITE CONTROL WORD
 	RET
 ;
 ;
@@ -130,23 +152,23 @@ PLDSER_DEVICE:
 	XOR	A			; SIGNAL SUCCESS
 	RET
 ;
-; TEST FOR HARDWARE PRESENCE BY CHECKING THE STATUS PORT.  IF IT IS
-; $FF, WE ASSUME NOT PRESENT.  THEN READ PORT A DIFFERENT WAY.  IF
-; PRESENT PORT SHOULD HAVE SAME VALUE.
-;
-; THIS COULD BE SIGNIFICANTLY IMPROVED.
-; 
+; TEST FOR HARDWARE PRESENCE.  THE PLD ADAPTER STATUS IS EXPOSED THROUGH
+; AN 8255 PPI.  DETECTING THE PLD ITSELF IS BASICALLY IMPOSSIBLE GIVEN
+; THERE ARE ONLY TWO STATUS BITS WITH VALUES THAT SHOULD NOT BE ASSUMED.
+; SO, HERE WE JSUT CHECK FOR THE EXISTENCE OF THE PPI ITSELF WHICH IS
+; USED TO INFER THE EXCISTENCE OF THE PLD ADAPTER.
 ;
 PLDSER_DETECT:
-	IN	A,(PLDSER_STAT)		; GET DATA PORT VALUE DIRECTLY
-	CP	$FF			; CHECK FOR $FF
-	JR	NZ,PLDSER_DETECT1	; IF NOT $FF, MAY BE ACTIVE, CONTINUE
-	OR	A			; SWITCH ZF BACK TO NZ
-	RET				; DONE
-PLDSER_DETECT1:
-	LD	C,PLDSER_STAT		; PORT ADR TO C
-	IN	B,(C)			; GET DATA PORT VALUE VIA (C)
-	CP	B			; COMPARE, EQUAL IMPLIES ACTIVE PORT
+;
+	; WE SETUP THE PPI TO WRITE, THEN WRITE A TEST VALUE
+	; TO PORT B, THEN READ IT BACK.  IF THE PPI IS THERE
+	; THEN THE BUS HOLD CIRCUITRY WILL READ BACK THE TEST VALUE.
+	LD	A,PLDSER_PPICFG		; CONFIG 8255 PORTS: B=OUTPUT
+	OUT	(PLDSER_PPICTL),A	; WRITE CONTROL WORD
+	LD	A,$A5			; TEST VALUE
+	OUT	(PLDSER_PPIB),A		; WRITE IT
+	IN	A,(PLDSER_PPIB)		; READ IT
+	CP	$A5
 	RET
 ;
 ;