From e79770dceab298707ad5d3dec7433678368b7bd6 Mon Sep 17 00:00:00 2001
From: Wayne Warthen <wwarthen@gmail.com>
Date: Thu, 8 Jul 2021 16:45:57 -0700
Subject: [PATCH] Cleanup MBC LEDs

- LED behavior was not quite right.
- Enable MBC speaker by default
---
 Source/HBIOS/Config/MBC_std.asm |  4 +++-
 Source/HBIOS/cfg_mbc.asm        |  2 +-
 Source/HBIOS/dsrtc.asm          | 37 +++++++++++++++++++++++++++------
 Source/HBIOS/hbios.asm          |  3 ++-
 Source/HBIOS/romldr.asm         |  4 ----
 Source/ver.inc                  |  2 +-
 Source/ver.lib                  |  2 +-
 7 files changed, 39 insertions(+), 15 deletions(-)

diff --git a/Source/HBIOS/Config/MBC_std.asm b/Source/HBIOS/Config/MBC_std.asm
index d0248be0..a8c21dcd 100644
--- a/Source/HBIOS/Config/MBC_std.asm
+++ b/Source/HBIOS/Config/MBC_std.asm
@@ -27,7 +27,9 @@
 ;
 #include "cfg_mbc.asm"
 ;
+BATCOND		.SET	FALSE
+;
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 ;
-DSKYENABLE	.SET	TRUE		; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
+DSKYENABLE	.SET	FALSE		; ENABLES DSKY
 DSKYMODE	.SET	DSKYMODE_NG	; DSKY VERTSION: DSKYMODE_[V1|NG]
diff --git a/Source/HBIOS/cfg_mbc.asm b/Source/HBIOS/cfg_mbc.asm
index 8f08b1da..129dc15f 100644
--- a/Source/HBIOS/cfg_mbc.asm
+++ b/Source/HBIOS/cfg_mbc.asm
@@ -228,4 +228,4 @@ AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
 AYMODE		.EQU	AYMODE_NONE	; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
 ;
-SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
+SPKENABLE	.EQU	TRUE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
diff --git a/Source/HBIOS/dsrtc.asm b/Source/HBIOS/dsrtc.asm
index 4384cce7..0d113169 100644
--- a/Source/HBIOS/dsrtc.asm
+++ b/Source/HBIOS/dsrtc.asm
@@ -132,12 +132,12 @@ DSRTC_BUFSIZ	.EQU	7		; 7 BYTE BUFFER (YYMMDDHHMMSSWW)
 ;
 DSRTC_PREINIT:
 ;
-	; SET RELEVANT BITS IN RTC LATCH SHADOW REGISTER
-	; TO THEIR QUIESENT STATE
-	LD	A,(DSRTC_OPRVAL)	; GET CURRENT SHADOW REG VAL
-	AND	~DSRTC_MASK		; CLEAR OUR BITS
-	OR	DSRTC_IDLE		; SET OUR IDLE BITS
-	LD	(DSRTC_OPRVAL),A	; SAVE IT
+	;; SET RELEVANT BITS IN RTC LATCH SHADOW REGISTER
+	;; TO THEIR QUIESENT STATE
+	;LD	A,(DSRTC_OPRVAL)	; GET CURRENT SHADOW REG VAL
+	;AND	~DSRTC_MASK		; CLEAR OUR BITS
+	;OR	DSRTC_IDLE		; SET OUR IDLE BITS
+	;LD	(DSRTC_OPRVAL),A	; SAVE IT
 ;
 	CALL	DSRTC_DETECT		; HARDWARE DETECTION
 	LD	(DSRTC_STAT),A		; SAVE RESULT
@@ -478,6 +478,7 @@ DSRTC_TSTCLK:
 ;   E=VALUE (OUTPUT)
 ;
 DSRTC_RDBYT:
+	CALL	DSRTC_START
 	LD	E,C
 	CALL	DSRTC_CMD
 	CALL	DSRTC_GET
@@ -489,6 +490,7 @@ DSRTC_RDBYT:
 ;   E=VALUE
 ;
 DSRTC_WRBYT:
+	CALL	DSRTC_START
 	PUSH	DE			; SAVE VALUE TO WRITE
 	LD	E,C			; CMD TO E
 	CALL	DSRTC_CMD
@@ -525,6 +527,7 @@ DSRTC_WRBYTWP:
 ; BURST READ CLOCK DATA INTO BUFFER AT HL
 ;
 DSRTC_RDCLK:
+	CALL	DSRTC_START
 	LD	E,$BF			; COMMAND = $BF TO BURST READ CLOCK
 	CALL	DSRTC_CMD		; SEND COMMAND TO RTC
 	LD	B,DSRTC_BUFSIZ		; B IS LOOP COUNTER
@@ -540,6 +543,7 @@ DSRTC_RDCLK1:
 ; BURST WRITE CLOCK DATA FROM BUFFER AT HL
 ;
 DSRTC_WRCLK:
+	CALL	DSRTC_START
 	LD	E,$8E			; COMMAND = $8E TO WRITE CONTROL REGISTER
 	CALL	DSRTC_CMD		; SEND COMMAND
 	LD	E,$00			; $00 = UNPROTECT
@@ -668,6 +672,25 @@ DSRTC_GET1:
 	CALL	DLY1			; DELAY 27 T-STATES
 	DJNZ	DSRTC_GET1		; LOOP IF NOT DONE (13)
 	RET
+
+
+;
+; START A COMMAND SEQUENCE
+;   INITIATES A COMMAND SEQUENCE
+;   DOES NOT DESTROY ANY REGISTERS.
+;
+;   1) CAPTURE RTC LATCH BITS
+;
+DSRTC_START:
+	; SET RELEVANT BITS IN RTC LATCH SHADOW REGISTER
+	; TO THEIR QUIESENT STATE
+	PUSH	AF
+	LD	A,(DSRTC_OPRVAL)	; GET CURRENT SHADOW REG VAL
+	AND	~DSRTC_MASK		; CLEAR OUR BITS
+	OR	DSRTC_IDLE		; SET OUR IDLE BITS
+	LD	(DSRTC_OPRVAL),A	; SAVE IT
+	POP	AF
+	RET
 ;
 ; COMPLETE A COMMAND SEQUENCE
 ;   FINISHES UP A COMMAND SEQUENCE.
@@ -676,8 +699,10 @@ DSRTC_GET1:
 ;   1) SET ALL LINES BACK TO QUIESCENT STATE
 ;
 DSRTC_END:
+	;PUSH	AF
 	LD	A,(DSRTC_OPRVAL)	; INIT A WITH QUIESCENT STATE
 	OUT	(DSRTC_IO),A		; WRITE TO PORT
+	;POP	AF
 	RET				; RETURN
 ;
 ; WORKING VARIABLES
diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm
index 8d534fe9..369708b9 100644
--- a/Source/HBIOS/hbios.asm
+++ b/Source/HBIOS/hbios.asm
@@ -1243,7 +1243,6 @@ Z280_INITZ:
 #ENDIF
 ;
 	DIAG(%00000011)
-	LED(%00000010)
 ;
 ; CHECK BATTERY BACKUP STATUS BEFORE WE COPY PROXY TO UPPER MEMORY
 ;
@@ -1328,6 +1327,7 @@ HB_RAMFLAG	.DB	FALSE		; INITIALLY FALSE, SET TO TRUE BELOW AFTER RAM TRANSITION
 HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 ;
 	DIAG(%00000111)
+	LED(%00000010)
 ;
 	LD	A,(HBX_LOC - 1)		; RECALL BATTERY STATE AND SAVE
 	LD	(HB_BATCOND),A		; FOR FUTURE REFERENCE
@@ -4944,6 +4944,7 @@ HB_CPUSPD1:
 
 	; WAIT FOR AN INITIAL TICK TO ALIGN, THEN WAIT
 	; FOR SECOND TICK AND TO GET A FULL ONE SECOND LOOP COUNT
+	CALL	DSRTC_START
 	CALL	HB_RDSEC		; GET SECONDS
 	LD	(HB_CURSEC),A		; AND INIT CURSEC
 	CALL	HB_WAITSEC		; WAIT FOR SECONDS TICK
diff --git a/Source/HBIOS/romldr.asm b/Source/HBIOS/romldr.asm
index ed3e5ee2..a87a38fc 100644
--- a/Source/HBIOS/romldr.asm
+++ b/Source/HBIOS/romldr.asm
@@ -358,10 +358,6 @@ dskycmd:
 	call	clrled			; clear LEDs
 ;
 	call	DSKY_GETKEY		; get DSKY key
-	
-	call	prthexbyte
-	
-	
 	cp	$FF			; check for error
 	ret	z			; abort if so
 ;
diff --git a/Source/ver.inc b/Source/ver.inc
index 96741d7f..d74d870b 100644
--- a/Source/ver.inc
+++ b/Source/ver.inc
@@ -2,4 +2,4 @@
 #DEFINE	RMN	1
 #DEFINE	RUP	1
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.1.1-pre.85"
+#DEFINE BIOSVER	"3.1.1-pre.86"
diff --git a/Source/ver.lib b/Source/ver.lib
index b8bc7696..9fd10d30 100644
--- a/Source/ver.lib
+++ b/Source/ver.lib
@@ -3,5 +3,5 @@ rmn	equ	1
 rup	equ	1
 rtp	equ	0
 biosver	macro
-	db	"3.1.1-pre.85"
+	db	"3.1.1-pre.86"
 	endm