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4th attempt

import/raw
david 13 years ago
parent
fb2ad3173d
commit
e7fed4f1c8
14 changed files with 43 additions and 8 deletions
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  1. 3
      branches/dgg/Source/config_n8_2312.asm
  2. 3
      branches/dgg/Source/config_n8_2511.asm
  3. 2
      branches/dgg/Source/config_n8vem.asm
  4. 2
      branches/dgg/Source/config_n8vem_dide.asm
  5. 2
      branches/dgg/Source/config_n8vem_diskio.asm
  6. 2
      branches/dgg/Source/config_n8vem_diskio3.asm
  7. 2
      branches/dgg/Source/config_n8vem_ppide.asm
  8. 2
      branches/dgg/Source/config_n8vem_ppisd.asm
  9. 2
      branches/dgg/Source/config_n8vem_propio.asm
  10. 2
      branches/dgg/Source/config_n8vem_vdu.asm
  11. 3
      branches/dgg/Source/config_simh.asm
  12. 3
      branches/dgg/Source/config_zeta.asm
  13. 3
      branches/dgg/Source/config_zeta_ppp.asm
  14. 20
      branches/dgg/Source/isr.asm

3
branches/dgg/Source/config_n8_2312.asm
View File

@ -88,6 +88,9 @@ BOOT_DEFAULT .EQU 'R' ; SELECTION TO INVOKE AT TIMEOUT
BAUDRATE .EQU 38400 ; IN BPS: 1200, 9600, 38400, ..., 115200
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H)
ZPBASE .EQU 0 ; BASE ADDRESS OF ZILOG PERIPHERALS BOARD (SAME AS PIO4BASE)
;
Z180_CLKDIV .EQU 1 ; 0=XTAL/2, 1=XTAL/1
Z180_MEMWAIT .EQU 0 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3)

3
branches/dgg/Source/config_n8_2511.asm
View File

@ -88,6 +88,9 @@ BOOT_DEFAULT .EQU 'R' ; SELECTION TO INVOKE AT TIMEOUT
BAUDRATE .EQU 38400 ; IN BPS: 1200, 9600, 38400, ..., 115200
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H)
ZPBASE .EQU 0 ; BASE ADDRESS OF ZILOG PERIPHERALS BOARD (SAME AS PIO4BASE)
;
Z180_CLKDIV .EQU 1 ; 0=XTAL/2, 1=XTAL/1
Z180_MEMWAIT .EQU 0 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3)

2
branches/dgg/Source/config_n8vem.asm
View File

@ -88,5 +88,5 @@ BOOT_DEFAULT .EQU 'R' ; SELECTION TO INVOKE AT TIMEOUT
BAUDRATE .EQU 38400 ; IN BPS: 1200, 9600, 38400, ..., 115200
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H)
ZPBASE .EQU 0 ; BASE ADDRESS OF ZILOG PERIPHERALS BOARD (SAME AS PIO4BASE)

2
branches/dgg/Source/config_n8vem_dide.asm
View File

@ -88,5 +88,5 @@ BOOT_DEFAULT .EQU 'R' ; SELECTION TO INVOKE AT TIMEOUT
BAUDRATE .EQU 38400 ; IN BPS: 1200, 9600, 38400, ..., 115200
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H)
ZPBASE .EQU 0 ; BASE ADDRESS OF ZILOG PERIPHERALS BOARD (SAME AS PIO4BASE)

2
branches/dgg/Source/config_n8vem_diskio.asm
View File

@ -88,5 +88,5 @@ BOOT_DEFAULT .EQU 'R' ; SELECTION TO INVOKE AT TIMEOUT
BAUDRATE .EQU 38400 ; IN BPS: 1200, 9600, 38400, ..., 115200
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H)
ZPBASE .EQU 0 ; BASE ADDRESS OF ZILOG PERIPHERALS BOARD (SAME AS PIO4BASE)

2
branches/dgg/Source/config_n8vem_diskio3.asm
View File

@ -88,5 +88,5 @@ BOOT_DEFAULT .EQU 'R' ; SELECTION TO INVOKE AT TIMEOUT
BAUDRATE .EQU 38400 ; IN BPS: 1200, 9600, 38400, ..., 115200
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H)
ZPBASE .EQU 0 ; BASE ADDRESS OF ZILOG PERIPHERALS BOARD (SAME AS PIO4BASE)

2
branches/dgg/Source/config_n8vem_ppide.asm
View File

@ -88,5 +88,5 @@ BOOT_DEFAULT .EQU 'R' ; SELECTION TO INVOKE AT TIMEOUT
BAUDRATE .EQU 38400 ; IN BPS: 1200, 9600, 38400, ..., 115200
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H)
ZPBASE .EQU 0 ; BASE ADDRESS OF ZILOG PERIPHERALS BOARD (SAME AS PIO4BASE)

2
branches/dgg/Source/config_n8vem_ppisd.asm
View File

@ -88,5 +88,5 @@ BOOT_DEFAULT .EQU 'R' ; SELECTION TO INVOKE AT TIMEOUT
BAUDRATE .EQU 38400 ; IN BPS: 1200, 9600, 38400, ..., 115200
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H)
ZPBASE .EQU 0 ; BASE ADDRESS OF ZILOG PERIPHERALS BOARD (SAME AS PIO4BASE)

2
branches/dgg/Source/config_n8vem_propio.asm
View File

@ -88,5 +88,5 @@ BOOT_DEFAULT .EQU 'R' ; SELECTION TO INVOKE AT TIMEOUT
BAUDRATE .EQU 38400 ; IN BPS: 1200, 9600, 38400, ..., 115200
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H)
ZPBASE .EQU 0 ; BASE ADDRESS OF ZILOG PERIPHERALS BOARD (SAME AS PIO4BASE)

2
branches/dgg/Source/config_n8vem_vdu.asm
View File

@ -88,5 +88,5 @@ BOOT_DEFAULT .EQU 'R' ; SELECTION TO INVOKE AT TIMEOUT
BAUDRATE .EQU 38400 ; IN BPS: 1200, 9600, 38400, ..., 115200
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H)
ZPBASE .EQU 0 ; BASE ADDRESS OF ZILOG PERIPHERALS BOARD (SAME AS PIO4BASE)

3
branches/dgg/Source/config_simh.asm
View File

@ -87,3 +87,6 @@ BOOT_DEFAULT .EQU 'R' ; SELECTION TO INVOKE AT TIMEOUT
;
BAUDRATE .EQU 38400 ; IN BPS: 1200, 9600, 38400, ..., 115200
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H)
ZPBASE .EQU 0 ; BASE ADDRESS OF ZILOG PERIPHERALS BOARD (SAME AS PIO4BASE)

3
branches/dgg/Source/config_zeta.asm
View File

@ -87,3 +87,6 @@ BOOT_DEFAULT .EQU 'R' ; SELECTION TO INVOKE AT TIMEOUT
;
BAUDRATE .EQU 38400 ; IN BPS: 1200, 9600, 38400, ..., 115200
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H)
ZPBASE .EQU 0 ; BASE ADDRESS OF ZILOG PERIPHERALS BOARD (SAME AS PIO4BASE)

3
branches/dgg/Source/config_zeta_ppp.asm
View File

@ -87,3 +87,6 @@ BOOT_DEFAULT .EQU 'R' ; SELECTION TO INVOKE AT TIMEOUT
;
BAUDRATE .EQU 38400 ; IN BPS: 1200, 9600, 38400, ..., 115200
TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2
;
PIO4BASE .EQU 0 ; BASE ADDRESS OF 4PIO BOARD (0=NO BOARD, USE 10H, 0A0H, 0B0H, 0C0H, 0D0H, 0E0H)
ZPBASE .EQU 0 ; BASE ADDRESS OF ZILOG PERIPHERALS BOARD (SAME AS PIO4BASE)

20
branches/dgg/Source/isr.asm
View File

@ -0,0 +1,20 @@
;
;==================================================================================================
; CBIOS INTERRUPT SERVICE ROUTINES
;==================================================================================================
; THIS AREA IS FOR ANY OTHER INTERRUPT SERVICE ROUTINES SO THEY ARE SAFELY KEPT IN THE TOP
; 32k OF THE CPU'S ADDRESS SPACE AND OUT OF THE TPA AREA. REFER TO BNK1.ASM FOR DETAILS ON THE
; INTERRUPT VECTOR TABLE AT FF00H AND INTERRUPTS.TXT IN THE DOC FOLDER.
;
INITISR: ; CALLED DURING BOOT (CBIOS)
#IF (INTMODE = 2) ; MODE 2 ONLY
DI
; MODIFY INTERRUPT VECTOR TABLE TO POINT TO ISR(S)
; INITIALISE ANY INTERRUPT HARDWARE
EI
#ENDIF
RET
; ADD ANY ISR(S) HERE
.FILL 256 ; **DEBUG** RESERVE A PAGE FOR INTERRUPTS
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