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ROMLDR Improvements

.com files can now be started from CP/M and size of .com files has been reduced so they always fit.
pull/112/head
Wayne Warthen 6 years ago
parent
commit
e84a1bc3ea
  1. 2
      Doc/ChangeLog.txt
  2. BIN
      Doc/RomWBW Applications.pdf
  3. BIN
      Doc/RomWBW Architecture.pdf
  4. BIN
      Doc/RomWBW Getting Started.pdf
  5. 10
      ReadMe.md
  6. 10
      ReadMe.txt
  7. 8
      Source/Doc/GettingStarted.md
  8. 9
      Source/HBIOS/Build.ps1
  9. 5
      Source/HBIOS/Build.sh
  10. 44
      Source/HBIOS/dsrtc.asm
  11. 53
      Source/HBIOS/romldr.asm
  12. 5
      Source/HBIOS/sd.asm
  13. 2
      Source/ver.inc
  14. 2
      Source/ver.lib

2
Doc/ChangeLog.txt

@ -3,6 +3,8 @@ Version 3.1
- WBW: Refactored ROM Loader
- WBW: INTRTC periodic timer based clock
- WBW: FDISK80 updated to allow reserving up to 256 slices
- WBW: Added support dual 16C550 UART on RC2014 platform
- WBW: Made .com images smaller (contain only Z-System now)
Version 3.0.1
-------------

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Doc/RomWBW Applications.pdf

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Doc/RomWBW Architecture.pdf

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Doc/RomWBW Getting Started.pdf

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10
ReadMe.md

@ -3,7 +3,7 @@
## Z80/Z180 System Software
Version 3.1 Pre-release
Monday 30 March 2020
Saturday 11 April 2020
Wayne Warthen <wwarthen@gmail.com>
@ -1007,14 +1007,6 @@ through the normal startup process just like it was started from ROM.
However, your ROM has not been updated and the next time you boot your
system, it will revert to the system image contained in ROM.
There are two restrictions to be aware of related to loading a system
image as a .com application. First, this is only supported under
Z-System and CP/M 2.2. You must boot into one of these OSes before
attempting to launch the .com file. Second, you may find that you are
unable to load the .com file because it is too large to fit in available
application RAM (TPA). Your only recourse in this situation is to build
a custom ROM with fewer features.
If you do not have easy access to a ROM programmer, it is usually
possible to reprogram your system ROM using the FLASH utility from Will
Sowerbutts. This application, called FLASH.COM, can be found on the ROM

10
ReadMe.txt

@ -3,7 +3,7 @@ RomWBW
Z80/Z180 System Software
Version 3.1 Pre-release
Monday 30 March 2020
Saturday 11 April 2020
Wayne Warthen wwarthen@gmail.com
@ -1031,14 +1031,6 @@ through the normal startup process just like it was started from ROM.
However, your ROM has not been updated and the next time you boot your
system, it will revert to the system image contained in ROM.
There are two restrictions to be aware of related to loading a system
image as a .com application. First, this is only supported under
Z-System and CP/M 2.2. You must boot into one of these OSes before
attempting to launch the .com file. Second, you may find that you are
unable to load the .com file because it is too large to fit in available
application RAM (TPA). Your only recourse in this situation is to build
a custom ROM with fewer features.
If you do not have easy access to a ROM programmer, it is usually
possible to reprogram your system ROM using the FLASH utility from Will
Sowerbutts. This application, called FLASH.COM, can be found on the ROM

8
Source/Doc/GettingStarted.md

@ -1058,14 +1058,6 @@ through the normal startup process just like it was started from ROM.
However, your ROM has not been updated and the next time you boot your
system, it will revert to the system image contained in ROM.
There are two restrictions to be aware of related to loading a system
image as a .com application. First, this is only supported under
Z-System and CP/M 2.2. You must boot into one of these OSes before
attempting to launch the .com file. Second, you may find that you
are unable to load the .com file because it is too large to fit in
available application RAM (TPA). Your only recourse in this
situation is to build a custom ROM with fewer features.
If you do not have easy access to a ROM programmer, it is usually
possible to reprogram your system ROM using the FLASH utility from
Will Sowerbutts. This application, called FLASH.COM, can be found on the

9
Source/HBIOS/Build.ps1

@ -184,9 +184,12 @@ if ($Platform -ne "UNA")
#
"Building ${RomName} output files..."
# Build 32K OS chunk containing the loader, debug monitor, and OS images
# Build 32K OS chunk containing the loader, debug monitor, and two OS images
Concat 'romldr.bin', 'eastaegg.bin','dbgmon.bin', "..\cpm22\cpm_${Bios}.bin", "..\zsdos\zsys_${Bios}.bin" osimg.bin
# Build 20K OS chunk containing the loader, debug monitor, and one OS image
Concat 'romldr.bin', 'eastaegg.bin','dbgmon.bin', "..\zsdos\zsys_${Bios}.bin" osimg_small.bin
# Build second 32K chunk containing supplemental ROM apps (not for UNA)
if ($Platform -ne "UNA")
{
@ -237,8 +240,8 @@ if ($Platform -eq "UNA")
else
{
Concat 'hbios_rom.bin','osimg.bin','osimg1.bin','osimg.bin',$RomDiskFile $RomFile
Concat 'hbios_app.bin','osimg.bin' $ComFile
# Concat 'hbios_img.bin','osimg.bin' $ImgFile
Concat 'hbios_app.bin','osimg_small.bin' $ComFile
# Concat 'hbios_img.bin','osimg_small.bin' $ImgFile
}
# Remove the temporary working ROM disk file

5
Source/HBIOS/Build.sh

@ -100,6 +100,7 @@ fi
echo "Building $romname output files..."
cat romldr.bin eastaegg.bin dbgmon.bin ../CPM22/cpm_$BIOS.bin ../ZSDOS/zsys_$BIOS.bin >osimg.bin
cat romldr.bin eastaegg.bin dbgmon.bin ../ZSDOS/zsys_$BIOS.bin >osimg_small.bin
if [ $platform != UNA ] ; then
cat camel80.bin nascom.bin tastybasic.bin game.bin imgpad0.bin usrrom.bin >osimg1.bin
@ -146,8 +147,8 @@ if [ $platform = UNA ] ; then
cat ../UBIOS/UNA-BIOS.BIN osimg.bin ../UBIOS/FSFAT.BIN $romdiskfile >$romname.rom
else
cat hbios_rom.bin osimg.bin osimg1.bin osimg.bin $romdiskfile >$romname.rom
cat hbios_app.bin osimg.bin > $romname.com
cat hbios_img.bin osimg.bin > $romname.img
cat hbios_app.bin osimg_small.bin > $romname.com
# cat hbios_img.bin osimg_small.bin > $romname.img
fi
#rm $romdiskfile

44
Source/HBIOS/dsrtc.asm

@ -85,7 +85,7 @@
;
#IF (DSRTCMODE == DSRTCMODE_STD)
;
DSRTC_BASE .EQU RTCIO ; RTC PORT
DSRTC_IO .EQU RTCIO ; RTC PORT
;
DSRTC_DATA .EQU %10000000 ; BIT 7 IS RTC DATA OUT
DSRTC_CLK .EQU %01000000 ; BIT 6 IS RTC CLOCK (CLK)
@ -95,6 +95,10 @@ DSRTC_CE .EQU %00010000 ; BIT 4 IS CHIP ENABLE (CE)
DSRTC_MASK .EQU %11110000 ; MASK FOR BITS WE OWN IN RTC LATCH PORT
DSRTC_IDLE .EQU %00100000 ; QUIESCENT STATE
;
RTCDEF .SET DSRTC_IDLE ; FOR HBIOS MAINLINE
;
#DEFINE DSRTC_OPRVAL RTCVAL
;
; VALUES FOR DIFFERENT BATTERY OR SUPERCAPACITOR CHARGE RATES
;
DS1d2k .EQU %10100101 ; 1 DIODE 2K RESISTOR (DEFAULT)
@ -108,7 +112,7 @@ DS2d8k .EQU %10101011 ; 2 DIODES 8K RESISTOR
;
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
;
DSRTC_BASE .EQU $43 ; RTC PORT ON MF/PIC
DSRTC_IO .EQU $43 ; RTC PORT ON MF/PIC
;
DSRTC_DATA .EQU %00000001 ; BIT 0 IS RTC DATA OUT
DSRTC_CLK .EQU %00000100 ; BIT 2 IS RTC CLOCK (CLK)
@ -116,11 +120,11 @@ DSRTC_WR .EQU %00000010 ; BIT 1 IS DATA DIRECTION (WE)
DSRTC_CE .EQU %00001000 ; BIT 3 CHIP ENABLE (/CE)
;
DSRTC_MASK .EQU %00001111 ; MASK FOR BITS WE OWN IN RTC LATCH PORT
DSRTC_IDLE .EQU %00101000 ; QUIESCENT STATE
DSRTC_IDLE .EQU %00001000 ; QUIESCENT STATE
;
#ENDIF
#DEFINE DSRTC_OPRVAL DSRTC_RTCVAL
;
RTCDEF .SET DSRTC_IDLE ; FOR HBIOS MAINLINE
#ENDIF
;
DSRTC_BUFSIZ .EQU 7 ; 7 BYTE BUFFER (YYMMDDHHMMSSWW)
;
@ -130,10 +134,10 @@ DSRTC_PREINIT:
;
; SET RELEVANT BITS IN RTC LATCH SHADOW REGISTER
; TO THEIR QUIESENT STATE
LD A,(RTCVAL) ; GET CURRENT SHADOW REG VAL
LD A,(DSRTC_OPRVAL) ; GET CURRENT SHADOW REG VAL
AND ~DSRTC_MASK ; CLEAR OUR BITS
OR DSRTC_IDLE ; SET OUR IDLE BITS
LD (RTCVAL),A ; SAVE IT
LD (DSRTC_OPRVAL),A ; SAVE IT
;
CALL DSRTC_DETECT ; HARDWARE DETECTION
LD (DSRTC_STAT),A ; SAVE RESULT
@ -167,7 +171,7 @@ DSRTC_INIT:
;
; PRINT RTC LATCH PORT ADDRESS
PRTS(" IO=0x$") ; LABEL FOR IO ADDRESS
LD A,DSRTC_BASE ; GET IO ADDRESS
LD A,DSRTC_IO ; GET IO ADDRESS
CALL PRTHEXBYTE ; PRINT IT
;
; CHECK PRESENCE STATUS
@ -541,15 +545,15 @@ DSRTC_WRCLK1:
; 5) PUT COMMAND
;
DSRTC_CMD:
LD A,(RTCVAL) ; INIT A WITH QUIESCENT STATE
OUT (DSRTC_BASE),A ; WRITE TO PORT
LD A,(DSRTC_OPRVAL) ; INIT A WITH QUIESCENT STATE
OUT (DSRTC_IO),A ; WRITE TO PORT
CALL DLY2 ; DELAY 2 * 27 T-STATES
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
AND ~DSRTC_CE ; ASSERT CE (LOW)
#ELSE
OR DSRTC_CE ; ASSERT CE (HIGH)
#ENDIF
OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
OUT (DSRTC_IO),A ; WRITE TO RTC PORT
CALL DLY2 ; DELAY 2 * 27 T-STATES
CALL DSRTC_PUT ; WRITE IT
RET
@ -577,7 +581,7 @@ DSRTC_PUT:
#ENDIF
DSRTC_PUT1:
AND ~DSRTC_CLK ; SET CLOCK LOW
OUT (DSRTC_BASE),A ; DO IT
OUT (DSRTC_IO),A ; DO IT
CALL DLY1 ; DELAY 27 T-STATES
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
@ -589,9 +593,9 @@ DSRTC_PUT1:
RR E ; ROTATE NEXT BIT TO SEND INTO CARRY
RRA ; ROTATE BITS BACK TO CORRECT POSTIIONS
#ENDIF
OUT (DSRTC_BASE),A ; ASSERT DATA BIT ON BUS
OUT (DSRTC_IO),A ; ASSERT DATA BIT ON BUS
OR DSRTC_CLK ; SET CLOCK HI
OUT (DSRTC_BASE),A ; DO IT
OUT (DSRTC_IO),A ; DO IT
CALL DLY1 ; DELAY 27 T-STATES
DJNZ DSRTC_PUT1 ; LOOP IF NOT DONE
RET
@ -620,15 +624,15 @@ DSRTC_GET:
#ENDIF
DSRTC_GET1:
AND ~DSRTC_CLK ; SET CLK LO
OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
OUT (DSRTC_IO),A ; WRITE TO RTC PORT
CALL DLY1 ; DELAY 2 * 27 T-STATES
PUSH AF ; SAVE PORT VALUE
IN A,(DSRTC_BASE) ; READ THE RTC PORT
IN A,(DSRTC_IO) ; READ THE RTC PORT
RRA ; DATA BIT TO CARRY
RR E ; SHIFT INTO WORKING VALUE
POP AF ; RESTORE PORT VALUE
OR DSRTC_CLK ; CLOCK BACK TO HI
OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
OUT (DSRTC_IO),A ; WRITE TO RTC PORT
CALL DLY1 ; DELAY 27 T-STATES
DJNZ DSRTC_GET1 ; LOOP IF NOT DONE (13)
RET
@ -640,8 +644,8 @@ DSRTC_GET1:
; 1) SET ALL LINES BACK TO QUIESCENT STATE
;
DSRTC_END:
LD A,(RTCVAL) ; INIT A WITH QUIESCENT STATE
OUT (DSRTC_BASE),A ; WRITE TO PORT
LD A,(DSRTC_OPRVAL) ; INIT A WITH QUIESCENT STATE
OUT (DSRTC_IO),A ; WRITE TO PORT
RET ; RETURN
;
; WORKING VARIABLES
@ -649,6 +653,8 @@ DSRTC_END:
DSRTC_STAT .DB 0 ; DEVICE STATUS (0=OK)
DSRTC_TEMP .DB 0 ; TEMP VALUE STORAGE
;
DSRTC_RTCVAL .DB DSRTC_IDLE ; LOCAL LATCH SHADOW FOR MFPIC
;
; DSRTC_BUF IS USED FOR BURST READ/WRITE OF CLOCK DATA TO DS-1302
; FIELDS BELOW MATCH ORDER OF DS-1302 FIELDS (BCD)
;

53
Source/HBIOS/romldr.asm

@ -115,7 +115,7 @@ start:
di
#endif
;
; Switch banked memory to user RAM bank and setup page zero.
; Switch to user RAM bank
;
#if (BIOS == BIOS_WBW)
ld b,BF_SYSSETBNK ; HBIOS func: set bank
@ -123,15 +123,24 @@ start:
rst 08 ; do it
ld a,c ; previous bank to A
ld (bid_ldr),a ; save previous bank for later
cp BID_IMG0 ; starting from ROM?
#endif
;
#if (BIOS == BIOS_UNA)
ld bc,$01FB ; UNA func: set bank
ld de,BID_USR ; select user bank
rst 08 ; do it
ld a,c ; save previous bank
ld (bid_ldr),de ; ... for later
ld a,d ; starting from ROM?
or e ; ... bank == 0?
#endif
;
; For app mode startup, use alternate table
ld hl,ra_tbl ; assume ROM startup
jr z,start1 ; if so, ra_tbl OK, skip ahead
ld hl,ra_tbl_app ; not ROM boot, get app tbl loc
start1:
ld (ra_tbl_loc),hl ; and overlay pointer
;
; Copy original page zero into user page zero
;
@ -274,7 +283,7 @@ runcmd:
jp z,reboot ; if so, do it
;
; Attempt ROM application launch
ld ix,ra_tbl ; point to start of ROM app tbl
ld ix,(ra_tbl_loc) ; point to start of ROM app tbl
ld c,a ; save command in C
runcmd1:
ld a,(ix+ra_conkey) ; get match char
@ -334,7 +343,7 @@ dskycmd:
jp z,reboot ; if so, do it
;
; Attempt ROM application launch
ld ix,ra_tbl ; point to start of ROM app tbl
ld ix,(ra_tbl_loc) ; point to start of ROM app tbl
ld c,a ; save DSKY key in C
dskycmd1:
ld a,(ix+ra_dskykey) ; get match char
@ -374,7 +383,7 @@ applst:
ld hl,str_applst
call pstr
call nl
ld ix,ra_tbl
ld ix,(ra_tbl_loc)
applst1:
; check for end of table
ld a,(ix)
@ -1493,25 +1502,26 @@ ra_ent .equ 12
; *_SIZ *_END and any code generated which does not include std.asm is
; synced.
;
; Note: The loadable ROM images are placed in ROM banks bid_img0 and
; bid_img1. However, RomWBW supports a mechanism to load a complete
; Note: The loadable ROM images are placed in ROM banks BID_IMG0 and
; BID_IMG1. However, RomWBW supports a mechanism to load a complete
; new system dynamically as a runnable application (see appboot and
; imgboot in hbios.asm). In this case, the contents of bid_img0 will
; imgboot in hbios.asm). In this case, the contents of BID_IMG0 will
; be pre-loaded into the currently executing ram bank thereby allowing
; those images to be dynamically loaded as well. To support this
; concept, a pseudo-bank called bid_cur is used to specify the images
; normally found in bid_img0. In romload, this special value will cause
; normally found in BID_IMG0. In romload, this special value will cause
; the associated image to be loaded from the currently executing bank
; which will be correct regardless of the load mode. Images in other
; banks (bid_img1) will always be loaded directly from ROM.
; banks (BID_IMG1) will always be loaded directly from ROM.
;
ra_tbl:
;
; Name Key Dsky Bank Src Dest Size Entry
; --------- ------- ----- -------- ----- ------- ------- ----------
ra_ent(str_mon, 'M', KY_CL, bid_cur, $1000, MON_LOC, MON_SIZ, MON_SERIAL)
ra_ent(str_mon, 'M', KY_CL, BID_IMG0, $1000, MON_LOC, MON_SIZ, MON_SERIAL)
ra_entsiz .equ $ - ra_tbl
ra_ent(str_cpm22, 'C', KY_BK, bid_cur, $2000, CPM_LOC, CPM_SIZ, CPM_ENT)
ra_ent(str_zsys, 'Z', KY_FW, bid_cur, $5000, CPM_LOC, CPM_SIZ, CPM_ENT)
ra_ent(str_cpm22, 'C', KY_BK, BID_IMG0, $2000, CPM_LOC, CPM_SIZ, CPM_ENT)
ra_ent(str_zsys, 'Z', KY_FW, BID_IMG0, $5000, CPM_LOC, CPM_SIZ, CPM_ENT)
#if (BIOS == BIOS_WBW)
ra_ent(str_fth, 'F', KY_EX, BID_IMG1, $0000, FTH_LOC, FTH_SIZ, FTH_LOC)
ra_ent(str_bas, 'B', KY_DE, BID_IMG1, $1700, BAS_LOC, BAS_SIZ, BAS_LOC)
@ -1520,9 +1530,21 @@ ra_ent(str_play, 'P', $FF, BID_IMG1, $4000, GAM_LOC, GAM_SIZ, GAM_LOC)
ra_ent(str_user, 'U', $FF, BID_IMG1, $7000, USR_LOC, USR_SIZ, USR_LOC)
#endif
#if (DSKYENABLE)
ra_ent(str_dsky, 'Y'+$80, KY_GO, bid_cur, $1000, MON_LOC, MON_SIZ, MON_DSKY)
ra_ent(str_dsky, 'Y'+$80, KY_GO, bid_cur, $1000, MON_LOC, MON_SIZ, MON_DSKY)
#endif
ra_ent(str_egg, 'E'+$80, $FF , bid_cur, $0E00, EGG_LOC, EGG_SIZ, EGG_LOC)
.dw 0 ; table terminator
;
ra_tbl_app:
;
; Name Key Dsky Bank Src Dest Size Entry
; --------- ------- ----- -------- ----- ------- ------- ----------
ra_ent(str_mon, 'M', KY_CL, bid_cur, $1000, MON_LOC, MON_SIZ, MON_SERIAL)
ra_ent(str_zsys, 'Z', KY_FW, bid_cur, $2000, CPM_LOC, CPM_SIZ, CPM_ENT)
#if (DSKYENABLE)
ra_ent(str_dsky, 'Y'+$80, KY_GO, bid_cur, $1000, MON_LOC, MON_SIZ, MON_DSKY)
#endif
ra_ent(str_egg, 'E'+$80, $FF , bid_cur, $0E00, EGG_LOC, EGG_SIZ, EGG_LOC)
ra_ent(str_egg, 'E'+$80, $FF , bid_cur, $0E00, EGG_LOC, EGG_SIZ, EGG_LOC)
.dw 0 ; table terminator
;
str_mon .db "Monitor",0
@ -1562,6 +1584,7 @@ bid_ldr .ds 2 ; bank at startup
loadlba .ds 4 ; lba for load, dword
#endif
;
ra_tbl_loc .ds 2 ; points to active ra_tbl
bootunit .ds 1 ; boot disk unit
bootslice .ds 1 ; boot disk slice
loadcnt .ds 1 ; num disk sectors to load

5
Source/HBIOS/sd.asm

@ -20,8 +20,8 @@
;
; CS = CHIP SELECT (AKA DAT3 FOR NON-SPI MODE)
; CLK = CLOCK
; DI = DATA IN (HOST -> CARD, AKA CMD FOR NON-SPI MODE)
; DO = DATA OUT (HOST <- CARD, AKA DAT0 FOR NON-SPI MODE)
; DI = MOSI = DATA IN (HOST -> CARD, AKA CMD FOR NON-SPI MODE)
; DO = MISO = DATA OUT (HOST <- CARD, AKA DAT0 FOR NON-SPI MODE)
;
; NOTES:
; 1) SIGNAL NAMES ARE FROM THE SD CARD SPEC AND ARE NAMED FROM THE
@ -570,6 +570,7 @@ SD_INITUNIT2:
RET Z ; IF NOT, DONE
PRTS(" WP$") ; NOTIFY USER
;
XOR A ; SIGNAL SUCCESS
RET ; DONE
;
;----------------------------------------------------------------------

2
Source/ver.inc

@ -2,4 +2,4 @@
#DEFINE RMN 1
#DEFINE RUP 0
#DEFINE RTP 0
#DEFINE BIOSVER "3.1-pre.1"
#DEFINE BIOSVER "3.1-pre.2"

2
Source/ver.lib

@ -3,5 +3,5 @@ rmn equ 1
rup equ 0
rtp equ 0
biosver macro
db "3.1-pre.1"
db "3.1-pre.2"
endm

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