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Floppy Driver fixes from Steve Garcia

pull/80/head
Wayne Warthen 6 years ago
parent
3c8cd5219e
commit
e9709fcde6
2 changed files with 6 additions and 6 deletions
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  1. 2
      Doc/FDU.txt
  2. 10
      Source/HBIOS/fd.asm

2
Doc/FDU.txt
View File

@ -511,4 +511,4 @@ WW 9/5/2018: v5.3
- Added support for SmallZ80 - Added support for SmallZ80
WW 5/1/2020: v5.4 WW 5/1/2020: v5.4
- Added support for Dyno
- Added support for Dyno (based on work by Steve Garcia)

10
Source/HBIOS/fd.asm
View File

@ -46,7 +46,7 @@ FDC_MSR .EQU $50 ; 8272 MAIN STATUS REGISTER
FDC_DATA .EQU $51 ; 8272 DATA PORT FDC_DATA .EQU $51 ; 8272 DATA PORT
FDC_DOR .EQU $58 ; DIGITAL OUTPUT REGISTER (LATCH) FDC_DOR .EQU $58 ; DIGITAL OUTPUT REGISTER (LATCH)
#ENDIF #ENDIF
#IF (FDMODE = FDMODE_RCWDC)
#IF (FDMODE == FDMODE_RCWDC)
FDC_MSR .EQU $50 ; 8272 MAIN STATUS REGISTER FDC_MSR .EQU $50 ; 8272 MAIN STATUS REGISTER
FDC_DATA .EQU $51 ; 8272 DATA PORT FDC_DATA .EQU $51 ; 8272 DATA PORT
FDC_DOR .EQU $58 ; DIGITAL OUTPUT REGISTER FDC_DOR .EQU $58 ; DIGITAL OUTPUT REGISTER
@ -1235,7 +1235,7 @@ FC_SETDOR
; ;
; SET FST_DCR ; SET FST_DCR
; ;
#IF ((FDMODE == FDMODE_DIDE) | (FDMODE == FDMODE_N8) | (FDMODE == FDMODE_ZETA2) | (FDMODE == FDMODE_RCWDC) | (FDMODE == FDMODE_RCWDC))
#IF ((FDMODE == FDMODE_DIDE) | (FDMODE == FDMODE_N8) | (FDMODE == FDMODE_ZETA2) | (FDMODE == FDMODE_RCWDC) | (FDMODE == FDMODE_DYNO))
; ;
FC_SETDCR FC_SETDCR
LD (FST_DCR),A LD (FST_DCR),A
@ -1267,7 +1267,7 @@ FC_RESETFDC:
#IF ((FDMODE == FDMODE_ZETA) | (FDMODE == FDMODE_DIO3) | (FDMODE == FDMODE_RCSMC)) #IF ((FDMODE == FDMODE_ZETA) | (FDMODE == FDMODE_DIO3) | (FDMODE == FDMODE_RCSMC))
RES 7,A RES 7,A
#ENDIF #ENDIF
#IF ((FDMODE == FDMODE_DIDE) | (FDMODE == FDMODE_N8) | (FDMODE == FDMODE_ZETA2) | (FDMODE == FDMODE_RCWDC) | (FDMODE == FDMODE_RCWDC))
#IF ((FDMODE == FDMODE_DIDE) | (FDMODE == FDMODE_N8) | (FDMODE == FDMODE_ZETA2) | (FDMODE == FDMODE_RCWDC) | (FDMODE == FDMODE_DYNO))
LD A,0 LD A,0
#ENDIF #ENDIF
CALL FC_SETDOR CALL FC_SETDOR
@ -1282,7 +1282,7 @@ FC_RESETFDC:
; PULSE TERMCT TO TERMINATE ANY ACTIVE EXECUTION PHASE ; PULSE TERMCT TO TERMINATE ANY ACTIVE EXECUTION PHASE
; ;
FC_PULSETC: FC_PULSETC:
#IF ((FDMODE == FDMODE_DIDE) | (FDMODE == FDMODE_N8) | (FDMODE == FDMODE_ZETA2) | (FDMODE == FDMODE_RCWDC) | (FDMODE == FDMODE_RCWDC))
#IF ((FDMODE == FDMODE_DIDE) | (FDMODE == FDMODE_N8) | (FDMODE == FDMODE_ZETA2) | (FDMODE == FDMODE_RCWDC) | (FDMODE == FDMODE_DYNO))
IN A,(FDC_TC) IN A,(FDC_TC)
#ELSE #ELSE
LD A,(FST_DOR) LD A,(FST_DOR)
@ -1335,7 +1335,7 @@ FC_MOTORON1:
CP C ; COMPARE TO NEW MOTOR BITS CP C ; COMPARE TO NEW MOTOR BITS
RET Z ; SKIP DELAY, MOTOR WAS ALREADY ON RET Z ; SKIP DELAY, MOTOR WAS ALREADY ON
#ENDIF #ENDIF
#IF ((FDMODE == FDMODE_DIDE) | (FDMODE == FDMODE_N8) | (FDMODE == FDMODE_ZETA2) | (FDMODE == FDMODE_RCWDC) | (FDMODE == FDMODE_RCWDC))
#IF ((FDMODE == FDMODE_DIDE) | (FDMODE == FDMODE_N8) | (FDMODE == FDMODE_ZETA2) | (FDMODE == FDMODE_RCWDC) | (FDMODE == FDMODE_DYNO))
; SETUP DCR FOR DIDE HARDWARE ; SETUP DCR FOR DIDE HARDWARE
LD A,(FCD_DCR) ; GET NEW DCR VALUE LD A,(FCD_DCR) ; GET NEW DCR VALUE
CALL FC_SETDCR ; AND IMPLEMENT IT CALL FC_SETDCR ; AND IMPLEMENT IT

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