From eae829581166f17f9687fca7e731e58464ed9465 Mon Sep 17 00:00:00 2001 From: b1ackmai1er Date: Thu, 1 Dec 2022 20:12:41 +0800 Subject: [PATCH] revert debug --- Source/HBIOS/bqrtc.asm | 4 +--- Source/HBIOS/cfg_dyno.asm | 1 + Source/HBIOS/cfg_ezz80.asm | 6 ++++++ Source/HBIOS/cfg_master.asm | 3 +++ Source/HBIOS/cfg_mbc.asm | 3 +++ Source/HBIOS/cfg_mk4.asm | 2 ++ Source/HBIOS/cfg_n8.asm | 3 ++- Source/HBIOS/cfg_rcz180.asm | 3 +++ Source/HBIOS/cfg_rcz280.asm | 4 +++- Source/HBIOS/cfg_rcz80.asm | 4 +++- 10 files changed, 27 insertions(+), 6 deletions(-) diff --git a/Source/HBIOS/bqrtc.asm b/Source/HBIOS/bqrtc.asm index 3ec20fb4..ce0daeb5 100644 --- a/Source/HBIOS/bqrtc.asm +++ b/Source/HBIOS/bqrtc.asm @@ -54,9 +54,7 @@ ; Day-Of-Week coded as Sunday = 1 through Saturday = 7. ; BVF = 1 for valid battery. ; STOP = 1 turns the RTC on; STOP = 0 stops the RTC in back-up mode. -; -THIS_DRV .SET DRV_ID_BQRTC -; + ; Constants BQRTC_SEC .EQU BQRTC_BASE + $00 diff --git a/Source/HBIOS/cfg_dyno.asm b/Source/HBIOS/cfg_dyno.asm index 8833e378..51843d00 100644 --- a/Source/HBIOS/cfg_dyno.asm +++ b/Source/HBIOS/cfg_dyno.asm @@ -197,6 +197,7 @@ PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4 SNMODE .EQU SNMODE_NONE ; DRIVER MODE: SNMODE_[NONE|RC2014|VGM] ; diff --git a/Source/HBIOS/cfg_ezz80.asm b/Source/HBIOS/cfg_ezz80.asm index 529bff69..f1e4adc6 100644 --- a/Source/HBIOS/cfg_ezz80.asm +++ b/Source/HBIOS/cfg_ezz80.asm @@ -48,6 +48,7 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU TRUE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] @@ -134,6 +135,7 @@ Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM) ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) ; SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED) SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP SIO0MODE .EQU SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] @@ -239,6 +241,7 @@ PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4 SNMODE .EQU SNMODE_NONE ; DRIVER MODE: SNMODE_[NONE|RC2014|VGM] ; @@ -255,3 +258,6 @@ DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC) YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB) VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC) +YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB) +VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC) + diff --git a/Source/HBIOS/cfg_master.asm b/Source/HBIOS/cfg_master.asm index c555d645..279bd4cd 100644 --- a/Source/HBIOS/cfg_master.asm +++ b/Source/HBIOS/cfg_master.asm @@ -78,6 +78,7 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] @@ -189,6 +190,7 @@ ACIA1DIV .EQU 1 ; ACIA 1: SERIAL CLOCK DIVIDER ACIA1CFG .EQU DEFSERCFG ; ACIA 1: SERIAL LINE CONFIG (SEE STD.ASM) ; SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED) SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] @@ -319,6 +321,7 @@ UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .EQU $0C ; UF: REGISTERS BASE ADR ; SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4 SNMODE .EQU SNMODE_NONE ; DRIVER MODE: SNMODE_[NONE|RC2014|VGM] ; diff --git a/Source/HBIOS/cfg_mbc.asm b/Source/HBIOS/cfg_mbc.asm index 8e3e8ef9..4057e40a 100644 --- a/Source/HBIOS/cfg_mbc.asm +++ b/Source/HBIOS/cfg_mbc.asm @@ -45,6 +45,7 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU TRUE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] @@ -127,6 +128,7 @@ Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM) ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) ; SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED) SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] @@ -243,6 +245,7 @@ UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .EQU $0C ; UF: REGISTERS BASE ADR ; SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4 SNMODE .EQU SNMODE_NONE ; DRIVER MODE: SNMODE_[NONE|RC2014|VGM] ; diff --git a/Source/HBIOS/cfg_mk4.asm b/Source/HBIOS/cfg_mk4.asm index 33b5bdfb..f04934e9 100644 --- a/Source/HBIOS/cfg_mk4.asm +++ b/Source/HBIOS/cfg_mk4.asm @@ -56,6 +56,7 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER ; @@ -246,6 +247,7 @@ UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) UFBASE .EQU $0C ; UF: REGISTERS BASE ADR ; SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4 SNMODE .EQU SNMODE_NONE ; DRIVER MODE: SNMODE_[NONE|RC2014|VGM] ; diff --git a/Source/HBIOS/cfg_n8.asm b/Source/HBIOS/cfg_n8.asm index fb2737ac..a7a7dab7 100644 --- a/Source/HBIOS/cfg_n8.asm +++ b/Source/HBIOS/cfg_n8.asm @@ -58,6 +58,7 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER ; @@ -241,6 +242,7 @@ UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) FIFO_BASE .EQU $0C ; UF: REGISTERS BASE ADR ; SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4 SNMODE .EQU SNMODE_NONE ; DRIVER MODE: SNMODE_[NONE|RC2014|VGM] ; @@ -256,4 +258,3 @@ DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC) ; YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB) VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC) - diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm index ff515e94..56e1ca3b 100644 --- a/Source/HBIOS/cfg_rcz180.asm +++ b/Source/HBIOS/cfg_rcz180.asm @@ -56,6 +56,7 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER ; @@ -141,6 +142,7 @@ Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM) ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) ; SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED) SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] @@ -252,6 +254,7 @@ PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4 SNMODE .EQU SNMODE_NONE ; DRIVER MODE: SNMODE_[NONE|RC2014|VGM] ; diff --git a/Source/HBIOS/cfg_rcz280.asm b/Source/HBIOS/cfg_rcz280.asm index 53ea20ec..6599438d 100644 --- a/Source/HBIOS/cfg_rcz280.asm +++ b/Source/HBIOS/cfg_rcz280.asm @@ -56,6 +56,7 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER CTCMODE .EQU CTCMODE_TIM16 ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] @@ -156,6 +157,7 @@ ACIA1DIV .EQU 1 ; ACIA 1: SERIAL CLOCK DIVIDER ACIA1CFG .EQU DEFSERCFG ; ACIA 1: SERIAL LINE CONFIG (SEE STD.ASM) ; SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED) SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] @@ -267,6 +269,7 @@ PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4 SNMODE .EQU SNMODE_NONE ; DRIVER MODE: SNMODE_[NONE|RC2014|VGM] ; @@ -282,4 +285,3 @@ DMAMODE .EQU DMAMODE_Z280 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC) ; YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB) VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC) - diff --git a/Source/HBIOS/cfg_rcz80.asm b/Source/HBIOS/cfg_rcz80.asm index d4df4d05..3cb827ff 100644 --- a/Source/HBIOS/cfg_rcz80.asm +++ b/Source/HBIOS/cfg_rcz80.asm @@ -48,6 +48,7 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER CTCMODE .EQU CTCMODE_TIM16 ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] @@ -145,6 +146,7 @@ ACIA1DIV .EQU 1 ; ACIA 1: SERIAL CLOCK DIVIDER ACIA1CFG .EQU DEFSERCFG ; ACIA 1: SERIAL LINE CONFIG (SEE STD.ASM) ; SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) +SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED) SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] @@ -259,6 +261,7 @@ PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) ; SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER +AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4 SNMODE .EQU SNMODE_RCZ80 ; DRIVER MODE: SNMODE_[NONE|RC2014|VGM] ; @@ -274,4 +277,3 @@ DMAMODE .EQU DMAMODE_RC ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC) ; YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB) VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC) -