From 3da911edf4fd0324f16fcddb5ea743f2b1ce5fda Mon Sep 17 00:00:00 2001
From: Wayne Warthen <wwarthen@gmail.com>
Date: Thu, 13 Feb 2020 16:01:19 -0800
Subject: [PATCH] BPBIOS Updates

---
 Source/BPBIOS/@WBW Z3ENV.txt |  2 +-
 Source/BPBIOS/hbios.z80      |  3 +++
 Source/BPBIOS/romwbw-mk4.lib | 20 +++++++++++++++++---
 Source/BPBIOS/romwbw-sim.lib | 20 +++++++++++++++++---
 Source/HBIOS/asci.asm        |  4 +++-
 Source/HBIOS/hbios.asm       |  3 ++-
 6 files changed, 43 insertions(+), 9 deletions(-)

diff --git a/Source/BPBIOS/@WBW Z3ENV.txt b/Source/BPBIOS/@WBW Z3ENV.txt
index 0b8bb617..8c17e2ca 100644
--- a/Source/BPBIOS/@WBW Z3ENV.txt	
+++ b/Source/BPBIOS/@WBW Z3ENV.txt	
@@ -75,7 +75,7 @@ should be consulted to understand these.  The build process used here
 produces several different configurations which can be loaded at runtime.
 The original distributed memory segment configuration occupies the top
 of memory which, unfortunately, conflicts with the RomWBW HBIOS need to
-occupt this space.
+occupy this space.
 
 Although RomWBW HBIOS is implemented in it's own dedicated memory bank, it
 requires a small proxy at the top of memory which acts as a mechansim to
diff --git a/Source/BPBIOS/hbios.z80 b/Source/BPBIOS/hbios.z80
index be63e92d..7899f6aa 100644
--- a/Source/BPBIOS/hbios.z80
+++ b/Source/BPBIOS/hbios.z80
@@ -194,6 +194,9 @@ HBX_ROM:
 
 	IF MK4
 	RLCA
+	JR	NC,HBX_BNKSEL1
+	XOR	00100001B
+HBX_BNKSEL1:
 	RLCA
 	RLCA
 	OUT0	(CPU_BBR),A
diff --git a/Source/BPBIOS/romwbw-mk4.lib b/Source/BPBIOS/romwbw-mk4.lib
index 09968231..e4dcf70f 100644
--- a/Source/BPBIOS/romwbw-mk4.lib
+++ b/Source/BPBIOS/romwbw-mk4.lib
@@ -26,15 +26,15 @@ HBCLK	EQU	YES			; HBIOS clock driver
 ;
 ; Set HB_IODEV to appropriate console device
 ;
-HB_IODEV	EQU	0
+HB_IODEV	EQU	0		; Assume we want to use first HBIOS serial device
 ;
 ; Set HB_HDDEV to appropriate hard disk driver
 ;
-HB_HDDEV	EQU	2
+HB_HDDEV	EQU	2		; Assumes disk device #2 is first hard disk device
 ;
 ; Set HB_MDDEV to appropriate memory disk driver
 ;
-HB_MDDEV	EQU	0
+HB_MDDEV	EQU	0		; Assumes disk device #0 is ROM disk device
 ;
 ; RAM/ROM disk sizes expressed as count of 2K blocks
 ;
@@ -66,3 +66,17 @@ MEMTOP	EQU	0FFE0H - 1	; Start of HBIOS 32 byte control block
 	ELSE
 MEMTOP	EQU	HBLOC - 1	; Start of HBIOS 512 byte proxy
 	ENDIF
+
+	IF INTPXY
+HB_EI	MACRO
+	ENDM
+HB_DI	MACRO
+	ENDM
+	ELSE
+HB_EI	MACRO
+	EI
+	ENDM
+HB_DI	MACRO
+	DI
+	ENDM
+	ENDIF
diff --git a/Source/BPBIOS/romwbw-sim.lib b/Source/BPBIOS/romwbw-sim.lib
index 61087ae5..d666295f 100644
--- a/Source/BPBIOS/romwbw-sim.lib
+++ b/Source/BPBIOS/romwbw-sim.lib
@@ -26,15 +26,15 @@ HBCLK	EQU	YES			; HBIOS clock driver
 ;
 ; Set HB_IODEV to appropriate console device
 ;
-HB_IODEV	EQU	0
+HB_IODEV	EQU	0		; Assume we want to use first HBIOS serial device
 ;
 ; Set HB_HDDEV to appropriate hard disk driver
 ;
-HB_HDDEV	EQU	2
+HB_HDDEV	EQU	2		; Assumes disk device #2 is first hard disk device
 ;
 ; Set HB_MDDEV to appropriate memory disk driver
 ;
-HB_MDDEV	EQU	0
+HB_MDDEV	EQU	0		; Assumes disk device #0 is ROM disk device
 ;
 ; RAM/ROM disk sizes expressed as count of 2K blocks
 ;
@@ -66,3 +66,17 @@ MEMTOP	EQU	0FFE0H - 1	; Start of HBIOS 32 byte control block
 	ELSE
 MEMTOP	EQU	HBLOC - 1	; Start of HBIOS 512 byte proxy
 	ENDIF
+
+	IF INTPXY
+HB_EI	MACRO
+	ENDM
+HB_DI	MACRO
+	ENDM
+	ELSE
+HB_EI	MACRO
+	EI
+	ENDM
+HB_DI	MACRO
+	DI
+	ENDM
+	ENDIF
diff --git a/Source/HBIOS/asci.asm b/Source/HBIOS/asci.asm
index 788a705a..26a71d87 100644
--- a/Source/HBIOS/asci.asm
+++ b/Source/HBIOS/asci.asm
@@ -520,8 +520,10 @@ ASCI_INITGO:
 	INC	C			; ... STAT REG, B IS STILL 0
 #IF (INTMODE > 0)
 	LD	A,$08			; SET RIE BIT ON
-	OUT	(C),A			; WRITE STAT REG
+#ELSE
+	XOR	A			; CLEAR RIE/TIE
 #ENDIF
+	OUT	(C),A			; WRITE STAT REG
 	LD	A,$0E			; BUMP TO
 	ADD	A,C			; ... ASEXT REG
 	LD	C,A			; PUT IN C FOR I/O, B IS STILL 0
diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm
index 7e879f51..fa3d5471 100644
--- a/Source/HBIOS/hbios.asm
+++ b/Source/HBIOS/hbios.asm
@@ -775,6 +775,7 @@ HB_START:
 	; MASK OFF TIMER INTERRUPTS
 	XOR	A
 	OUT0	(Z180_TCR),A
+	OUT0	(Z180_ITC),A
 
 	; SET DEFAULT CPU CLOCK MULTIPLIERS (XTAL / 2)
 	;
@@ -905,7 +906,7 @@ HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 	LD	($0039),HL
   #ELSE
 	; RETI ($ED, $4D) IF NON-INTERRUPT MODE
-	LD	HL,($0038)
+	LD	HL,$0038
 	LD	(HL),$ED
 	INC	HL
 	LD	(HL),$4D