Browse Source

Add EaZy80-512

pull/484/head
Wayne Warthen 1 year ago
parent
commit
f36a90afae
  1. 1
      Source/Build.cmd
  2. 4
      Source/BuildEZ512.cmd
  3. 16
      Source/EZ512/Bank Layout.txt
  4. 26
      Source/EZ512/Build.cmd
  5. 3
      Source/EZ512/Clean.cmd
  6. 22
      Source/EZ512/EZ512 Disk Layout.txt
  7. 27
      Source/EZ512/Makefile
  8. 1
      Source/HBIOS/Build.cmd
  9. 1
      Source/HBIOS/Build.sh
  10. 2
      Source/HBIOS/Config/GMZ180_std.asm
  11. 2
      Source/HBIOS/Config/MK4_std.asm
  12. 2
      Source/HBIOS/Config/N8_std.asm
  13. 2
      Source/HBIOS/Config/RCEZ80_std.asm
  14. 2
      Source/HBIOS/Config/RCZ80_std.asm
  15. 2
      Source/HBIOS/Config/S100_std.asm
  16. 2
      Source/HBIOS/Config/SBC_std.asm
  17. 2
      Source/HBIOS/Config/SCZ180_sc126_std.asm
  18. 2
      Source/HBIOS/Config/SCZ180_sc130_std.asm
  19. 2
      Source/HBIOS/Config/SCZ180_sc131_std.asm
  20. 2
      Source/HBIOS/Config/SCZ180_sc700_std.asm
  21. 4
      Source/HBIOS/cfg_DUO.asm
  22. 4
      Source/HBIOS/cfg_DYNO.asm
  23. 4
      Source/HBIOS/cfg_EPITX.asm
  24. 4
      Source/HBIOS/cfg_FZ80.asm
  25. 4
      Source/HBIOS/cfg_GMZ180.asm
  26. 4
      Source/HBIOS/cfg_HEATH.asm
  27. 4
      Source/HBIOS/cfg_MASTER.asm
  28. 4
      Source/HBIOS/cfg_MBC.asm
  29. 4
      Source/HBIOS/cfg_MK4.asm
  30. 4
      Source/HBIOS/cfg_MON.asm
  31. 4
      Source/HBIOS/cfg_N8.asm
  32. 4
      Source/HBIOS/cfg_NABU.asm
  33. 4
      Source/HBIOS/cfg_RCEZ80.asm
  34. 4
      Source/HBIOS/cfg_RCZ180.asm
  35. 4
      Source/HBIOS/cfg_RCZ280.asm
  36. 4
      Source/HBIOS/cfg_RCZ80.asm
  37. 4
      Source/HBIOS/cfg_RPH.asm
  38. 4
      Source/HBIOS/cfg_S100.asm
  39. 4
      Source/HBIOS/cfg_SBC.asm
  40. 4
      Source/HBIOS/cfg_SCZ180.asm
  41. 4
      Source/HBIOS/cfg_Z80RETRO.asm
  42. 4
      Source/HBIOS/cfg_ZETA.asm
  43. 4
      Source/HBIOS/cfg_ZETA2.asm
  44. 12
      Source/HBIOS/hbios.asm
  45. 24
      Source/HBIOS/sd.asm
  46. 2
      Source/HBIOS/std.asm
  47. 7
      Source/Makefile
  48. 2
      Source/ver.inc
  49. 2
      Source/ver.lib

1
Source/Build.cmd

@ -12,6 +12,7 @@ call BuildZ1RCC || exit /b
call BuildZZRCC || exit /b
call BuildZRC512 || exit /b
call BuildFZ80 || exit /b
call BuildEZ512 || exit /b
if "%1" == "dist" (
call Clean || exit /b

4
Source/BuildEZ512.cmd

@ -0,0 +1,4 @@
@echo off
setlocal
pushd EZ512 && call Build || exit /b & popd

16
Source/EZ512/Bank Layout.txt

@ -0,0 +1,16 @@
Eazy80_512 has a 64K ROM contains a monitor. The monitor command "b 4" loads RomWBW program
starting from SD sector 288 into first 4 banks of memory. RAM disk is not loaded, so drive A is
blank.
Bank Contents Description
-------- -------- -----------
0x0 BIOS HBIOS Bank (operating)
0x1 IMG0 ROM Loader, Monitor, ROM OSes
0x2 IMG1 ROM Applications
0x3 IMG2 Reserved
0x4-0xB RAMD RAM Disk Banks <- not loaded, blank
0xC BUF OS Buffers (CP/M3)
0xD AUX Aux Bank (CP/M 3, BPBIOS, etc.)
0xE USR User Bank (CP/M TPA, etc.)
0xF COM Common Bank, Upper 32KB

26
Source/EZ512/Build.cmd

@ -0,0 +1,26 @@
@echo off
setlocal
set TOOLS=../../Tools
set PATH=%TOOLS%\srecord;%PATH%
for %%f in (..\..\Binary\RCZ80_ez512_*.rom) do call :build %%~nf
goto :eof
:build
echo.
echo Creating %1 disk image...
echo.
srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x0 0x200 ez512_cfldr.bin -binary -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1B8 0x200 ez512_ptbl.bin -binary -offset 0x1B8 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1F000 0x20000 ez512_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x24000 0xA4000 ..\..\Binary\%1.rom -binary -offset 0x24000 -o temp.dat -binary
move temp.dat ..\..\Binary\%1_hd1k_prefix.dat
copy /b ..\..\Binary\%1_hd1k_prefix.dat + ..\..\Binary\hd1k_cpm22.img + ..\..\Binary\hd1k_zsdos.img + ..\..\Binary\hd1k_nzcom.img + ..\..\Binary\hd1k_cpm3.img + ..\..\Binary\hd1k_zpm3.img + ..\..\Binary\hd1k_ws4.img ..\..\Binary\%1_hd1k_combo.img || exit /b
goto :eof

3
Source/EZ512/Clean.cmd

@ -0,0 +1,3 @@
@echo off
setlocal

22
Source/EZ512/EZ512 Disk Layout.txt

@ -0,0 +1,22 @@
Eazy80_512 Disk Prefix Layout
=============================
---- Bytes ---- --- Sectors ---
Start Length Start Length Description
------- ------- ------- ------- ---------------------------
0x00000 0x001BE 0 1 CF Boot Loader
0x001B8 0x00048 RomWBW Partition Table
0x00200 0x1EE00 1 247 Unused
0x1F000 0x01000 248 8 EZ512 Monitor v0.3
0x20000 0x04000 256 32 Unused
0x24000 0x80000 288 1024 RomWBW
0xA4000 0x5C000 1312 736 Unused
0x100000 2048 Start of slices (partition 0x1E)
Notes
-----
- Eazy80_512 monitor reads the first 128KB of RomWBW stored started from sector 288 into banks 0-3
- Afterward Z80 jumps to location 0x0 to execute RomWBW

27
Source/EZ512/Makefile

@ -0,0 +1,27 @@
DEST=../../Binary
HD1KIMGS = $(DEST)/hd1k_cpm22.img $(DEST)/hd1k_zsdos.img $(DEST)/hd1k_nzcom.img \
$(DEST)/hd1k_cpm3.img $(DEST)/hd1k_zpm3.img $(DEST)/hd1k_ws4.img
ROMS := $(wildcard $(DEST)/RCZ80_ez512_*.rom)
ROMS := $(patsubst $(DEST)/%.rom,%,$(ROMS))
OBJECTS := $(patsubst %,%_hd1k_prefix.dat,$(ROMS))
OBJECTS += $(patsubst %,%_hd1k_combo.img,$(ROMS))
TOOLS = ../../Tools
include $(TOOLS)/Makefile.inc
DIFFPATH = $(DIFFTO)/Binary
%_hd1k_prefix.dat: $(DEST)/%.rom
srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x0 0x200 ez512_cfldr.bin -binary -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1B8 0x200 ez512_ptbl.bin -binary -offset 0x1B8 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1F000 0x20000 ez512_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x24000 0xA4000 $< -binary -offset 0x24000 -o temp.dat -binary
mv temp.dat $@
%_hd1k_combo.img: %_hd1k_prefix.dat $(HD1KIMGS)
cat $^ > $@

1
Source/HBIOS/Build.cmd

@ -234,6 +234,7 @@ call Build RCZ80 skz_std || exit /b
call Build RCZ80 zrc_std || exit /b
call Build RCZ80 zrc_ram_std || exit /b
call Build RCZ80 zrc512_std || exit /b
call Build RCZ80 ez512_std || exit /b
call Build RCZ180 ext_std || exit /b
call Build RCZ180 nat_std || exit /b
call Build RCZ180 z1rcc_std || exit /b

1
Source/HBIOS/Build.sh

@ -26,6 +26,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc_std"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc_ram_std"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc512_std"; bash Build.sh
ROM_PLATFORM="RCZ80"; ROM_CONFIG="ez512_std"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="ext_std"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="nat_std"; bash Build.sh
ROM_PLATFORM="RCZ180"; ROM_CONFIG="z1rcc_std"; bash Build.sh

2
Source/HBIOS/Config/GMZ180_std.asm

@ -82,7 +82,7 @@ FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_GM ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_GM ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

2
Source/HBIOS/Config/MK4_std.asm

@ -70,6 +70,6 @@ FDMODE .SET FDMODE_DIDE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
;
PRPENABLE .SET TRUE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

2
Source/HBIOS/Config/N8_std.asm

@ -61,6 +61,6 @@ FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDMODE .SET SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
;
AY38910ENABLE .SET TRUE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER

2
Source/HBIOS/Config/RCEZ80_std.asm

@ -69,7 +69,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80]
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
;

2
Source/HBIOS/Config/RCZ80_std.asm

@ -77,7 +77,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80]
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

2
Source/HBIOS/Config/S100_std.asm

@ -63,5 +63,5 @@ SCONENABLE .SET TRUE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY

2
Source/HBIOS/Config/SBC_std.asm

@ -66,6 +66,6 @@ FDMODE .SET FDMODE_DIO3 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|
IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
;
PRPENABLE .SET TRUE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

2
Source/HBIOS/Config/SCZ180_sc126_std.asm

@ -84,7 +84,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

2
Source/HBIOS/Config/SCZ180_sc130_std.asm

@ -85,7 +85,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

2
Source/HBIOS/Config/SCZ180_sc131_std.asm

@ -74,7 +74,7 @@ SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
;
CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT

2
Source/HBIOS/Config/SCZ180_sc700_std.asm

@ -84,7 +84,7 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

4
Source/HBIOS/cfg_DUO.asm

@ -68,7 +68,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPGSEL_0 .SET $50 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $51 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .SET $52 ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@ -287,7 +287,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80]
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_DYNO.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@ -302,7 +302,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_EPITX.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
;
Z180_BASE .SET $C0 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
@ -298,7 +298,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_EPITX ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_EPITX ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $40 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 2 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_FZ80.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@ -307,7 +307,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_FZ80 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_FZ80 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_GMZ180.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@ -303,7 +303,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_GM ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_GM ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_HEATH.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@ -307,7 +307,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_MASTER.asm

@ -69,7 +69,7 @@ DEFSERCFG .EQU SER_9600_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .EQU $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .EQU MM_NONE ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .EQU MM_NONE ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .EQU ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@ -360,7 +360,7 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_NONE ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .EQU SDMODE_NONE ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_MBC.asm

@ -68,7 +68,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_MBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_MBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPCL_RAM .SET $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .SET $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
;
@ -283,7 +283,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_MK4.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
;
Z180_BASE .SET $40 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
@ -292,7 +292,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_MK4 ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_MON.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_MON ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_MON ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
;
RTCIO .SET $C0 ; RTC LATCH REGISTER ADR
;
@ -302,7 +302,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_N8.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_N8 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_N8 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET 0 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
;
Z180_BASE .SET $40 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
@ -294,7 +294,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET N8_PPI0 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_NABU.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@ -307,7 +307,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_RCEZ80.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@ -307,7 +307,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_RCZ180.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@ -302,7 +302,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_RCZ280.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@ -312,7 +312,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_RCZ80.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@ -307,7 +307,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_RPH.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_RPH ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_RPH ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET 0 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
;
Z180_BASE .SET $40 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
@ -282,7 +282,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_CSIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET RPH_PPI0 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_S100.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_57600_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@ -302,7 +302,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_SBC.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPCL_RAM .SET $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .SET $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
;
@ -282,7 +282,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_SCZ180.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.AS
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
RAMBIAS .SET ROMSIZE ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@ -302,7 +302,7 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_SC ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_Z80RETRO.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPGSEL_0 .SET $60 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $61 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .SET $62 ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@ -262,7 +262,7 @@ PPIDE0A8BIT .SET FALSE ; PPIDE 0A (MASTER): 8 BIT XFER
PPIDE0B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_Z80R ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_Z80R ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE

4
Source/HBIOS/cfg_ZETA.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPCL_RAM .SET $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .SET $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
;
@ -231,7 +231,7 @@ PPIDE0A8BIT .SET FALSE ; PPIDE 0A (MASTER): 8 BIT XFER
PPIDE0B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

4
Source/HBIOS/cfg_ZETA2.asm

@ -67,7 +67,7 @@ DEFSERCFG .SET SER_38400_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON]
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512]
MPGSEL_0 .SET $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .SET $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .SET $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@ -242,7 +242,7 @@ PPIDE0A8BIT .SET FALSE ; PPIDE 0A (MASTER): 8 BIT XFER
PPIDE0B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM]
SDMODE .SET SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

12
Source/HBIOS/hbios.asm

@ -745,6 +745,18 @@ HBX_ROM:
RET ; DONE
#ENDIF
;
#IF (MEMMGR == MM_EZ512)
AND $F ; HCS mask off high nibble
BIT 3,A ; HCS if banks $8-$F, set bit 6
JR Z,MM_EZ512_BANK0TO7
AND 7 ; HCS clear bit 3
OR $40 ; HCS set bit 6 for banks $8-$F
MM_EZ512_BANK0TO7:
OR $80 ; HCS set bit 7 to keep RAM enabled
OUT ($0C),A ; HCS write to the bank control register
RET ; DONE
#ENDIF
;
#IF (MEMMGR == MM_MBC)
;
#IF (INTMODE == 1)

24
Source/HBIOS/sd.asm

@ -311,7 +311,6 @@ SD_INVCS .EQU FALSE ; INVERT CS
DEVECHO "MT"
#ENDIF
;
;
#IF (SDMODE == SDMODE_PIO) ; Z80 PIO
;
; These mappings work for the RCbus Gluino card with an Arduino
@ -344,7 +343,6 @@ SD_INVCS .EQU TRUE ; INVERT CS
DEVECHO "PIO"
#ENDIF
;
;
#IF (SDMODE == SDMODE_USR) ; USER DEFINED HARDWARE CONFIGURATION
;
; THIS MODE IS INTENDED TO ALLOW A USER TO EASILY CONFIGURE A CUSTOM
@ -391,7 +389,8 @@ SD_INVCS .EQU TRUE ; INVERT CS
#ENDIF
;
; FOR NOW WE JUST HOOK UP ONE UNIT. THERE ARE EIGHT PORTS FOR DIFFERENT
; THINGS BUT THIS WILL GET US GOING
; THINGS BUT THIS WILL GET US GOING.
;
#IF (SDMODE == SDMODE_EPITX) ; Z180 ITX - CSIO, 82C55 for CS
SD_DEVMAX .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_OPRREG .EQU $42 ; 82C55 PORT C, LOW 3 ARE \CS MUX
@ -436,6 +435,25 @@ SD_CS1 .EQU %00000010 ; SECONDARY DEVICE SELECT BIT
SD_INVCS .EQU TRUE ; INVERT CS
DEVECHO "FZ80"
#ENDIF
;
#IF (SDMODE == SDMODE_EZ512) ; Z80 PIO ON EAZY80-512
;
; Equivalent to PIO mode, but with different port addresses
;
SD_DEVMAX .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS)
SD_IOBASE .EQU $02 ; IO BASE ADDRESS FOR SD INTERFACE
SD_OPRREG .EQU SD_IOBASE ; OUTPUT PORT (OUTPUT: CS, CLK, DIN)
SD_OPRDEF .EQU %11101111 ; OUTPUT PORT DEFAULT STATE
SD_INPREG .EQU SD_IOBASE ; INPUT REGISTER
SD_CS0 .EQU %00001000 ; SELECT
SD_CLK .EQU %00010000 ; CLOCK
SD_DI .EQU %00000001 ; DATA IN (CARD <- CPU) MOSI
SD_DO .EQU %10000000 ; DATA OUT (CARD -> CPU) MISO
SD_CINIT .EQU TRUE ; INITIALIZE OUTPUT PORT
SD_DDR .EQU $03 ; DATA DIRECTION REGISTER
SD_DDRVAL .EQU %11100110 ; DATA DIRECTION REGISTER VALUE
SD_INVCS .EQU TRUE ; INVERT CS
#ENDIF
;
DEVECHO ", IO="
DEVECHO SD_IOBASE

2
Source/HBIOS/std.asm

@ -92,6 +92,7 @@ MM_ZRC .EQU 6 ; ZRC BANK SWITCHING
MM_MBC .EQU 7 ; MBC MEMORY MANAGER
MM_RPH .EQU 8 ; Z180 WITH RPH EXTENSIONS
MM_MON .EQU 9 ; MONSPUTER MMU
MM_EZ512 .EQU 10 ; EZ512 BANK SWITCHING
;
; BOOT STYLE
;
@ -241,6 +242,7 @@ SDMODE_Z80R .EQU 12 ; Z80 Retro
SDMODE_EPITX .EQU 13 ; Mini ITX Z180
SDMODE_FZ80 .EQU 14 ; S100 FPGA Z80
SDMODE_GM .EQU 15 ; Genesis SD Driver
SDMODE_EZ512 .EQU 16 ; EZ512 SD
;
; AY SOUND CHIP MODE SELECTIONS
;

7
Source/Makefile

@ -2,12 +2,12 @@
# order is actually important, because of build dependencies
#
.PHONY: doc prop shared bp images rom zrc z1rcc zzrcc zrc512 fz80
.PHONY: doc prop shared bp images rom zrc z1rcc zzrcc zrc512 fz80 ez512
.ONESHELL:
.SHELLFLAGS = -ce
all: prop shared bp images rom zrc z1rcc zzrcc zrc512 fz80
all: prop shared bp images rom zrc z1rcc zzrcc zrc512 fz80 ez512
doc:
$(MAKE) --directory Doc $(ACTION)
@ -57,6 +57,9 @@ zrc512:
fz80:
$(MAKE) --directory FZ80 $(ACTION)
ez512:
$(MAKE) --directory EZ512 $(ACTION)
clean: ACTION=clean
clean: all

2
Source/ver.inc

@ -2,7 +2,7 @@
#DEFINE RMN 5
#DEFINE RUP 0
#DEFINE RTP 0
#DEFINE BIOSVER "3.5.0-dev.100"
#DEFINE BIOSVER "3.5.0-dev.101"
#define rmj RMJ
#define rmn RMN
#define rup RUP

2
Source/ver.lib

@ -3,5 +3,5 @@ rmn equ 5
rup equ 0
rtp equ 0
biosver macro
db "3.5.0-dev.100"
db "3.5.0-dev.101"
endm

Loading…
Cancel
Save