diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt index 80ec7510..1d48213c 100644 --- a/Doc/ChangeLog.txt +++ b/Doc/ChangeLog.txt @@ -8,6 +8,7 @@ Version 3.1 - WBW: Support automatic clock hardware detection and fallback - WBW: Support use of CTC for SIO baud rate divisors - WBW: Updated IDE and PPIDE drivers to improve old CF Card compatibility +- WBW: Support TIMER mode in CTC driver Version 3.0.1 ------------- diff --git a/Source/HBIOS/Config/RCZ80_kio.asm b/Source/HBIOS/Config/RCZ80_kio.asm index 06cbd81e..d27d0a2d 100644 --- a/Source/HBIOS/Config/RCZ80_kio.asm +++ b/Source/HBIOS/Config/RCZ80_kio.asm @@ -33,6 +33,7 @@ INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2 KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT ; CTCENABLE .SET TRUE ; ENABLE ZILOG CTC SUPPORT +CTCTIMER .SET TRUE ; ENABLE CTC PERIODIC TIMER CTCBASE .SET KIOBASE+$04 ; CTC BASE I/O ADDRESS ; ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) diff --git a/Source/HBIOS/cfg_ezz80.asm b/Source/HBIOS/cfg_ezz80.asm index f46a39d1..9784be32 100644 --- a/Source/HBIOS/cfg_ezz80.asm +++ b/Source/HBIOS/cfg_ezz80.asm @@ -41,9 +41,13 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU TRUE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_EZ ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] +CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] +CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3) +CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3) +CTCOSC .EQU 921600 ; CTC CLOCK FREQUENCY ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_master.asm b/Source/HBIOS/cfg_master.asm index 72fb0604..52bd69d2 100644 --- a/Source/HBIOS/cfg_master.asm +++ b/Source/HBIOS/cfg_master.asm @@ -59,9 +59,13 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_ZP ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] +CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] +CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3) +CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3) +CTCOSC .EQU 614400 ; CTC CLOCK FREQUENCY ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_mk4.asm b/Source/HBIOS/cfg_mk4.asm index 82ef4709..6cfd61bc 100644 --- a/Source/HBIOS/cfg_mk4.asm +++ b/Source/HBIOS/cfg_mk4.asm @@ -46,9 +46,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_ZP ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_n8.asm b/Source/HBIOS/cfg_n8.asm index 1175c67c..26ff3331 100644 --- a/Source/HBIOS/cfg_n8.asm +++ b/Source/HBIOS/cfg_n8.asm @@ -49,9 +49,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_ZP ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm index f8a3dab6..f099c2cf 100644 --- a/Source/HBIOS/cfg_rcz180.asm +++ b/Source/HBIOS/cfg_rcz180.asm @@ -46,9 +46,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_RC ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_rcz80.asm b/Source/HBIOS/cfg_rcz80.asm index 3a4f7ade..f94c1694 100644 --- a/Source/HBIOS/cfg_rcz80.asm +++ b/Source/HBIOS/cfg_rcz80.asm @@ -40,9 +40,13 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_RC ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] +CTCMODE .EQU CTCMODE_TIM16 ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] +CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3) +CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3) +CTCOSC .EQU CPUOSC ; CTC CLOCK FREQUENCY ; DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_sbc.asm b/Source/HBIOS/cfg_sbc.asm index 70a6921c..0c7e2170 100644 --- a/Source/HBIOS/cfg_sbc.asm +++ b/Source/HBIOS/cfg_sbc.asm @@ -38,9 +38,13 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_ZP ; CTC TIMER MODE: CTCMODE_[ZP|Z2|EZ|RC] +CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] +CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3) +CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3) +CTCOSC .EQU 614400 ; CTC CLOCK FREQUENCY ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_scz180.asm b/Source/HBIOS/cfg_scz180.asm index c129bb1a..41af5fb4 100644 --- a/Source/HBIOS/cfg_scz180.asm +++ b/Source/HBIOS/cfg_scz180.asm @@ -41,9 +41,9 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_RC ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] ; DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $0D ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/cfg_zeta2.asm b/Source/HBIOS/cfg_zeta2.asm index 45fe1ced..1192d8d5 100644 --- a/Source/HBIOS/cfg_zeta2.asm +++ b/Source/HBIOS/cfg_zeta2.asm @@ -41,9 +41,13 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU TRUE ; ENABLE ZILOG CTC SUPPORT +CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT CTCBASE .EQU $20 ; CTC BASE I/O ADDRESS CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER -CTCMODE .EQU CTCMODE_Z2 ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC] +CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] +CTCPRECH .EQU 0 ; PRESCALE CHANNEL (0-3) +CTCTIMCH .EQU 1 ; TIMER CHANNEL (0-3) +CTCOSC .EQU 921600 ; CTC CLOCK FREQUENCY ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS diff --git a/Source/HBIOS/ctc.asm b/Source/HBIOS/ctc.asm index 011d3caa..0f056946 100644 --- a/Source/HBIOS/ctc.asm +++ b/Source/HBIOS/ctc.asm @@ -16,39 +16,51 @@ .ECHO "*** ERROR: CTC REQUIRES INTMODE 2!!!\n" !!! ; FORCE AN ASSEMBLY ERROR #ENDIF +; +CTC_PREIO .EQU CTCBASE + CTCPRECH +CTC_SCLIO .EQU CTCBASE + CTCTIMCH ; -; CONFIGURATION -; - #IF (CTCMODE == CTCMODE_ZP) -CTCPC .EQU CTCC ; PRESCALE CHANNEL -CTCPCC .EQU 0 ; PRESCALE CHANNEL CONSTANT -CTCTC .EQU CTCD ; TIMER CHANNEL -CTCTCC .EQU 48 ; TIMER CHANNEL CONSTANT -CTCTIVT .EQU INT_CTC0D ; TIMER CHANNEL IVT ENTRY + #IF (CTCMODE == CTCMODE_CTR) +CTC_DIV .EQU CTCOSC / 50 #ENDIF -; - #IF (CTCMODE == CTCMODE_Z2) -CTCPC .EQU CTCA ; PRESCALE CHANNEL -CTCPCC .EQU 0 ; PRESCALE CHANNEL CONSTANT -CTCTC .EQU CTCB ; TIMER CHANNEL -CTCTCC .EQU 72 ; TIMER CHANNEL CONSTANT -CTCTIVT .EQU INT_CTC0B ; TIMER CHANNEL IVT ENTRY + #IF (CTCMODE == CTCMODE_TIM16) +CTC_DIV .EQU CTCOSC / 16 / 50 #ENDIF -; - #IF (CTCMODE == CTCMODE_EZ) -CTCPC .EQU CTCC ; PRESCALE CHANNEL -CTCPCC .EQU 0 ; PRESCALE CHANNEL CONSTANT -CTCTC .EQU CTCD ; TIMER CHANNEL -CTCTCC .EQU 72 ; TIMER CHANNEL CONSTANT -CTCTIVT .EQU INT_CTC0D ; TIMER CHANNEL IVT ENTRY + #IF (CTCMODE == CTCMODE_TIM256) +CTC_DIV .EQU CTCOSC / 256 / 50 #ENDIF ; - #IF (CTCMODE == CTCMODE_RC) -CTCPC .EQU CTCC ; PRESCALE CHANNEL -CTCPCC .EQU 0 ; PRESCALE CHANNEL CONSTANT -CTCTC .EQU CTCD ; TIMER CHANNEL -CTCTCC .EQU 144 ; TIMER CHANNEL CONSTANT -CTCTIVT .EQU INT_CTC0D ; TIMER CHANNEL IVT ENTRY + .ECHO "CTC DIVISOR: " + .ECHO CTC_DIV + .ECHO "\n" +; +CTC_DIVHI .EQU ((CTC_DIV >> 8) & $FF) +CTC_DIVLO .EQU (CTC_DIV & $FF) +; +CTCTIVT .EQU INT_CTC0A + CTCTIMCH +; +CTC_DEFCFG .EQU %01010011 ; CTC DEFAULT CONFIG +CTC_CTRCFG .EQU %01010111 ; CTC COUNTER MODE CONFIG +CTC_TIM16CFG .EQU %00010111 ; CTC TIMER/16 MODE CONFIG +CTC_TIM256CFG .EQU %00110111 ; CTC TIMER/256 MODE CONFIG +CTC_TIMCFG .EQU %11010111 ; CTC TIMER CHANNEL CONFIG + ; |||||||+-- CONTROL WORD FLAG + ; ||||||+--- SOFTWARE RESET + ; |||||+---- TIME CONSTANT FOLLOWS + ; ||||+----- AUTO TRIGGER WHEN TIME CONST LOADED + ; |||+------ RISING EDGE TRIGGER + ; ||+------- TIMER MODE PRESCALER (0=16, 1=256) + ; |+-------- COUNTER MODE + ; +--------- INTERRUPT ENABLE +; + #IF (CTCMODE == CTCMODE_CTR) +CTC_PRECFG .EQU CTC_CTRCFG + #ENDIF + #IF (CTCMODE == CTCMODE_TIM16) +CTC_PRECFG .EQU CTC_TIM16CFG + #ENDIF + #IF (CTCMODE == CTCMODE_TIM256) +CTC_PRECFG .EQU CTC_TIM256CFG #ENDIF ; #ENDIF @@ -61,15 +73,7 @@ CTC_PREINIT: LD B,4 ; 4 CHANNELS LD C,CTCBASE ; FIRST CHANNEL PORT CTC_PREINIT1: - LD A,%01010011 ; CTCC CONTROL WORD VALUE - ; |||||||+-- 1=CONTROL WORD FLAG - ; ||||||+--- 1=SOFTWARE RESET - ; |||||+---- 0=TIME CONSTANT DOES NOT FOLLOW - ; ||||+----- 0=AUTO TRIGGER WHEN TIME CONST LOADED - ; |||+------ 1=RISING EDGE TRIGGER - ; ||+------- 0=PRESCALER OF 16 - ; |+-------- 1=COUNTER MODE - ; +--------- 0=NO INTERRUPTS + LD A,CTC_DEFCFG ; CTC DEFAULT CONFIG OUT (C),A ; CTC COMMAND INC C ; NEXT CHANNEL PORT DJNZ CTC_PREINIT1 @@ -82,7 +86,7 @@ CTC_PREINIT1: ; CTC USES 4 CONSECUTIVE VECTOR POSITIONS, ONE FOR ; EACH CHANNEL. BELOW WE SET THE BASE VECTOR TO THE ; START OF THE IVT, SO THE FIRST FOUR ENTIRES OF THE - ; IVT CORRESPOND TO CTC CHANNELS A-D + ; IVT CORRESPOND TO CTC CHANNELS A-D. LD A,0 OUT (CTCBASE),A ; SETUP CTC BASE INT VECTOR ; @@ -91,31 +95,15 @@ CTC_PREINIT1: ; CTC CHANNEL AS A PRESCALER AND ANOTHER AS THE ACTUAL ; TIMER INTERRUPT. THE PRESCALE CHANNEL OUTPUT MUST BE WIRED ; TO THE TIMER CHANNEL TRIGGER INPUT VIA HARDWARE. - LD A,%01010111 ; PRESCALE CHANNEL CONTROL WORD VALUE - ; |||||||+-- 1=CONTROL WORD FLAG - ; ||||||+--- 1=SOFTWARE RESET - ; |||||+---- 1=TIME CONSTANT FOLLOWS - ; ||||+----- 0=AUTO TRIGGER WHEN TIME CONST LOADED - ; |||+------ 1=RISING EDGE TRIGGER - ; ||+------- 0=PRESCALER OF 16 (NOT USED) - ; |+-------- 1=COUNTER MODE - ; +--------- 0=NO INTERRUPTS - OUT (CTCPC),A ; SETUP PRESCALE CHANNEL - LD A,CTCPCC ; PRESCALE CHANNEL CONSTANT - OUT (CTCPC),A ; SET PRESCALE CONSTANT - ; - LD A,%11010111 ; TIMER CHANNEL CONTROL WORD VALUE - ; |||||||+-- 1=CONTROL WORD FLAG - ; ||||||+--- 1=SOFTWARE RESET - ; |||||+---- 1=TIME CONSTANT FOLLOWS - ; ||||+----- 0=AUTO TRIGGER WHEN TIME CONST LOADED - ; |||+------ 1=RISING EDGE TRIGGER - ; ||+------- 0=PRESCALER OF 16 (NOT USED) - ; |+-------- 1=COUNTER MODE - ; +--------- 1=ENABLE INTERRUPTS - OUT (CTCTC),A ; SETUP TIMER CHANNEL - LD A,CTCTCC ; TIMER CHANNEL CONSTANT - OUT (CTCTC),A ; SET TIMER CONSTANT + LD A,CTC_PRECFG ; PRESCALE CHANNEL CONFIGURATION + OUT (CTC_PREIO),A ; SETUP PRESCALE CHANNEL + LD A,CTC_DIVHI ; PRESCALE CHANNEL CONSTANT + OUT (CTC_PREIO),A ; SET PRESCALE CONSTANT +; + LD A,CTC_TIMCFG ; TIMER CHANNEL CONTROL WORD VALUE + OUT (CTC_SCLIO),A ; SETUP TIMER CHANNEL + LD A,CTC_DIVLO ; TIMER CHANNEL CONSTANT + OUT (CTC_SCLIO),A ; SET TIMER CONSTANT ; #ENDIF ; @@ -129,28 +117,39 @@ CTC_PRTCFG: ; ANNOUNCE PORT CALL NEWLINE ; FORMATTING PRTS("CTC:$") ; FORMATTING +; + PRTS(" IO=0x$") ; FORMATTING + LD A,CTCBASE ; GET BASE PORT + CALL PRTHEXBYTE ; PRINT BASE PORT ; #IF (CTCTIMER) ; PRTS(" TIMER MODE=$") ; FORMATTING - #IF (CTCMODE == CTCMODE_ZP) - PRTS("ZP$") + #IF (CTCMODE == CTCMODE_CTR) + PRTS("COUNTER$") #ENDIF - #IF (CTCMODE == CTCMODE_Z2) - PRTS("Z2$") + #IF (CTCMODE == CTCMODE_TIM16) + PRTS("TIMER/16$") #ENDIF - #IF (CTCMODE == CTCMODE_EZ) - PRTS("EZ$") + #IF (CTCMODE == CTCMODE_TIM256) + PRTS("TIMER/256$") #ENDIF - #IF (CTCMODE == CTCMODE_RC) - PRTS("RC$") +; + #IF (CTCDEBUG) + PRTS(" PREIO=$") + LD A,CTC_PREIO + CALL PRTHEXBYTE +; + PRTS(" SCLIO=$") + LD A,CTC_SCLIO + CALL PRTHEXBYTE +; + PRTS(" DIV=$") + LD BC,CTC_DIV + CALL PRTHEXWORD #ENDIF ; #ENDIF -; - PRTS(" IO=0x$") ; FORMATTING - LD A,CTCBASE ; GET BASE PORT - CALL PRTHEXBYTE ; PRINT BASE PORT ; XOR A RET diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm index af024490..1ba9f27f 100644 --- a/Source/HBIOS/std.asm +++ b/Source/HBIOS/std.asm @@ -105,10 +105,9 @@ MID_FD111 .EQU 9 ; ZILOG CTC MODE SELECTIONS ; CTCMODE_NONE .EQU 0 ; NO CTC -CTCMODE_ZP .EQU 1 ; ZILOG PERIPHERALS ECB CTC -CTCMODE_Z2 .EQU 2 ; ZETA2 ONBOARD CTC -CTCMODE_EZ .EQU 3 ; EASY Z80 ONBOARD CTC -CTCMODE_RC .EQU 4 ; RC2014 CTC MODULE (ALSO KIO) +CTCMODE_CTR .EQU 1 ; CTC COUNTER +CTCMODE_TIM16 .EQU 2 ; CTC TIMER W/ DIV 16 +CTCMODE_TIM256 .EQU 3 ; CTC TIMER W/ DIV 256 ; ; DS RTC MODE SELECTIONS ; diff --git a/Source/ver.inc b/Source/ver.inc index 5f23cbdf..c6cdf73b 100644 --- a/Source/ver.inc +++ b/Source/ver.inc @@ -2,4 +2,4 @@ #DEFINE RMN 1 #DEFINE RUP 0 #DEFINE RTP 0 -#DEFINE BIOSVER "3.1-pre.8" +#DEFINE BIOSVER "3.1-pre.9" diff --git a/Source/ver.lib b/Source/ver.lib index 71115fb6..1524ad08 100644 --- a/Source/ver.lib +++ b/Source/ver.lib @@ -3,5 +3,5 @@ rmn equ 1 rup equ 0 rtp equ 0 biosver macro - db "3.1-pre.8" + db "3.1-pre.9" endm