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Initial RHYOPHYRE Support

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Wayne Warthen
2022-03-27 13:23:37 -07:00
parent e804326d54
commit f6d0e7fea4
26 changed files with 340 additions and 59 deletions
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9
Source/HBIOS/cfg_master.asm
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@@ -12,7 +12,7 @@
;
#INCLUDE "hbios.inc"
;
PLATFORM .EQU PLT_SBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
PLATFORM .EQU PLT_SBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
@@ -30,7 +30,7 @@ DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
MEMMGR .EQU MM_NONE ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
MEMMGR .EQU MM_NONE ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
@@ -60,6 +60,11 @@ N8_ACR .EQU $94 ; N8: AUXILLARY CONTROL REGISTER (ACR) ADR
N8_RMAP .EQU $96 ; N8: ROM PAGE REGISTER ADR
N8_DEFACR .EQU $1B ; N8: AUX CTL REGISTER DEFAULT VALUE (QUIESCIENT STATE)
;
RPH_PPI0 .EQU $88 ; RPH: FIRST PARALLEL PORT REGISTERS BASE ADR
RPH_RTC .EQU $84 ; RPH: RTC LATCH REGISTER ADR
RPH_ACR .EQU $80 ; RPH: AUXILLARY CONTROL REGISTER (ACR) ADR
RPH_DEFACR .EQU $00 ; RPH: AUX CTL REGISTER DEFAULT VALUE (QUIESCIENT STATE)
;
MK4_IDE .EQU $80 ; MK4: IDE REGISTERS BASE ADR
MK4_XAR .EQU $88 ; MK4: EXTERNAL ADDRESS REGISTER (XAR) ADR
MK4_SD .EQU $89 ; MK4: SD CARD CONTROL REGISTER ADR