ym2612 stub and hbios driver loading code cosmetics

Source/Doc/Architecture.md

@@ -921,7 +921,7 @@ device number assigned by the driver.
 Each RTC device is handled by an appropriate driver (DSRTC, BQRTC,
 etc.) which is identified by a device type id from the table below.
 
-**Type ID** | **Disk Device Type**
+**Type ID** | **RTC Device Type**
 ----------- | --------------------
 0x00        | DS1302
 0x10        | BQ4845P

Source/HBIOS/Config/SBC_max.asm

@@ -62,6 +62,8 @@ SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 ;
 PRPENABLE	.SET	TRUE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 ;
-AY38910ENABLE	.SET	TRUE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
+AY38910ENABLE	.SET	TRUE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER (AY38910.ASM)
 ;
-SN76489ENABLE	.SET	TRUE		; SN : SN76489 DRIVER
+SN76489ENABLE	.SET	TRUE		; SN: ENABLE SN76489 SOUND DRIVER (SN76489.ASM)
+;
+YM2612ENABLE	.SET	TRUE		; YM2612: ENABLE ECB VGM YM2612 SOUND DRIVER (YM2612.ASM)

Source/HBIOS/cfg_sbc.asm

@@ -258,3 +258,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_ECB	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/hbios.asm

@@ -2979,6 +2979,9 @@ HB_INITTBL:
 #IF (SN76489ENABLE)
 	.DW	SN76489_INIT
 #ENDIF
+#IF (YM2612ENABLE)
+	.DW	YM2612_INIT
+#ENDIF
 #IF (SPKENABLE)
 	.DW	SP_INIT			; AUDIBLE INDICATOR OF BOOT START
 #ENDIF
@@ -5752,217 +5755,113 @@ Z280_SYSCALL_GO:
 ;   DEVICE DRIVERS
 ;==================================================================================================
 ;
+DRV_ORG		.EQU	$
+DRV_SIZ		.EQU	0
+;
+#DEFINE	LOAD_DRV(driver) \
+#DEFCONT \DRV_ORG .SET $
+#DEFCONT \#INCLUDE "driver.asm"
+#DEFCONT \#IF (1) 
+#DEFCONT \DRV_SIZ .SET ($-DRV_ORG)
+#DEFCONT \.ECHO "driver occupies "
+#DEFCONT \.ECHO DRV_SIZ
+#DEFCONT \.ECHO " bytes.\n" 
+#DEFCONT \#ENDIF
+
 #IF (DSRTCENABLE)
-ORG_DSRTC	.EQU	$
-  #INCLUDE "dsrtc.asm"
-SIZ_DSRTC	.EQU	$ - ORG_DSRTC
-		.ECHO	"DSRTC occupies "
-		.ECHO	SIZ_DSRTC
-		.ECHO	" bytes.\n"
+LOAD_DRV(dsrtc)
 #ENDIF
 ;
 #IF (DS1501RTCENABLE)
-ORG_DS1501RTC	.EQU	$
-  #INCLUDE "ds1501rtc.asm"
-SIZ_DS1501RTC	.EQU	$ - ORG_DS1501RTC
-		.ECHO	"DS1501RTC occupies "
-		.ECHO	SIZ_DS1501RTC
-		.ECHO	" bytes.\n"
+LOAD_DRV(ds1501rtc)
 #ENDIF
 ;
 #IF (BQRTCENABLE)
-ORG_BQRTC	.EQU	$
-  #INCLUDE "bqrtc.asm"
-SIZ_BQRTC	.EQU	$ - ORG_BQRTC
-		.ECHO	"BQRTC occupies "
-		.ECHO	SIZ_BQRTC
-		.ECHO	" bytes.\n"
+LOAD_DRV(bqrtc)
 #ENDIF
+;
 #IF (SIMRTCENABLE)
-ORG_SIMRTC	.EQU	$
-  #INCLUDE "simrtc.asm"
-SIZ_SIMRTC	.EQU	$ - ORG_SIMRTC
-		.ECHO	"SIMRTC occupies "
-		.ECHO	SIZ_SIMRTC
-		.ECHO	" bytes.\n"
+LOAD_DRV(simrtc)
 #ENDIF
+
 #IF (DS7RTCENABLE & (DS7RTCMODE=DS7RTCMODE_PCF))
-ORG_PCF8584	.EQU	$
-  #INCLUDE "pcf8584.asm"
-SIZ_PCF8584	.EQU	$ - ORG_PCF8584
-		.ECHO	"PCF8584 occupies "
-		.ECHO	SIZ_PCF8584
-		.ECHO	" bytes.\n"
+LOAD_DRV(pcf8584)
 #ENDIF
 
 #IF (DS7RTCENABLE)
-ORG_DS7RTC	.EQU	$
-  #INCLUDE "ds7rtc.asm"
-SIZ_DS7RTC	.EQU	$ - ORG_DS7RTC
-		.ECHO	"DS7RTC occupies "
-		.ECHO	SIZ_DS7RTC
-		.ECHO	" bytes.\n"
+LOAD_DRV(ds7rtc)
 #ENDIF
 ;
 #IF (INTRTCENABLE)
-ORG_INTRTC	.EQU	$
-  #INCLUDE "intrtc.asm"
-SIZ_INTRTC	.EQU	$ - ORG_INTRTC
-		.ECHO	"INTRTC occupies "
-		.ECHO	SIZ_INTRTC
-		.ECHO	" bytes.\n"
+LOAD_DRV(intrtc)
 #ENDIF
 ;
 #IF (RP5RTCENABLE)
-ORG_RP5RTC	.EQU	$
-  #INCLUDE "rp5rtc.asm"
-SIZ_RP5RTC	.EQU	$ - ORG_RP5RTC
-		.ECHO	"RP5RTC occupies "
-		.ECHO	SIZ_RP5RTC
-		.ECHO	" bytes.\n"
+LOAD_DRV(rp5rtc)
 #ENDIF
+;
 #IF (ASCIENABLE)
-ORG_ASCI	.EQU	$
-  #INCLUDE "asci.asm"
-SIZ_ASCI	.EQU	$ - ORG_ASCI
-		.ECHO	"ASCI occupies "
-		.ECHO	SIZ_ASCI
-		.ECHO	" bytes.\n"
+LOAD_DRV(asci)
 #ENDIF
 ;
 #IF (Z2UENABLE)
-ORG_Z2U	.EQU	$
-  #INCLUDE "z2u.asm"
-SIZ_Z2U	.EQU	$ - ORG_Z2U
-		.ECHO	"Z2U occupies "
-		.ECHO	SIZ_Z2U
-		.ECHO	" bytes.\n"
+LOAD_DRV(z2u)
 #ENDIF
 ;
 #IF (UARTENABLE)
-ORG_UART	.EQU	$
-  #INCLUDE "uart.asm"
-SIZ_UART	.EQU	$ - ORG_UART
-		.ECHO	"UART occupies "
-		.ECHO	SIZ_UART
-		.ECHO	" bytes.\n"
+LOAD_DRV(uart)
 #ENDIF
 ;
 #IF (DUARTENABLE)
-ORG_DUART	.EQU	$
-  #INCLUDE "duart.asm"
-SIZ_DUART	.EQU	$ - ORG_DUART
-		.ECHO	"DUART occupies "
-		.ECHO	SIZ_DUART
-		.ECHO	" bytes.\n"
+LOAD_DRV(duart)
 #ENDIF
 ;
 #IF (SIOENABLE)
-ORG_SIO		.EQU	$
-  #INCLUDE "sio.asm"
-SIZ_SIO		.EQU	$ - ORG_SIO
-		.ECHO	"SIO occupies "
-		.ECHO	SIZ_SIO
-		.ECHO	" bytes.\n"
+LOAD_DRV(sio)
 #ENDIF
 ;
 #IF (ACIAENABLE)
-ORG_ACIA	.EQU	$
-  #INCLUDE "acia.asm"
-SIZ_ACIA	.EQU	$ - ORG_ACIA
-		.ECHO	"ACIA occupies "
-		.ECHO	SIZ_ACIA
-		.ECHO	" bytes.\n"
+LOAD_DRV(acia)
 #ENDIF
 ;
 #IF (PIOENABLE)
-ORG_PIO		.EQU	$
-  #INCLUDE "pio.asm"
-SIZ_PIO		.EQU	$ - ORG_PIO
-		.ECHO	"PIO occupies "
-		.ECHO	SIZ_PIO
-		.ECHO	" bytes.\n"
+LOAD_DRV(pio)
 #ENDIF
 ;
 #IF (LPTENABLE)
-ORG_LPT		.EQU	$
-  #INCLUDE "lpt.asm"
-SIZ_LPT		.EQU	$ - ORG_LPT
-		.ECHO	"LPT occupies "
-		.ECHO	SIZ_LPT
-		.ECHO	" bytes.\n"
+LOAD_DRV(lpt)
 #ENDIF
 ;
 #IF (PIO_4P | PIO_ZP | PIO_SBC)
-ORG_PIO		.EQU	$
-  #INCLUDE "pio.asm"
-SIZ_PIO		.EQU	$ - ORG_PIO
-		.ECHO	"PIO occupies "
-		.ECHO	SIZ_PIO
-		.ECHO	" bytes.\n"
+LOAD_DRV(pio)
 #ENDIF
 ;
 #IF (UFENABLE)
-ORG_UF	.EQU	$
-  #INCLUDE "uf.asm"
-SIZ_UF	.EQU	$ - ORG_UF
-		.ECHO	"UF occupies "
-		.ECHO	SIZ_UF
-		.ECHO	" bytes.\n"
+LOAD_DRV(uf)
 #ENDIF
 ;
 #IF (VGAENABLE)
-ORG_VGA	.EQU	$
-  #INCLUDE "vga.asm"
-SIZ_VGA	.EQU	$ - ORG_VGA
-		.ECHO	"VGA occupies "
-		.ECHO	SIZ_VGA
-		.ECHO	" bytes.\n"
+LOAD_DRV(vga)
 #ENDIF
 ;
 #IF (CVDUENABLE)
-ORG_CVDU	.EQU	$
-  #INCLUDE "cvdu.asm"
-SIZ_CVDU	.EQU	$ - ORG_CVDU
-		.ECHO	"CVDU occupies "
-		.ECHO	SIZ_CVDU
-		.ECHO	" bytes.\n"
+LOAD_DRV(cvdu)
 #ENDIF
 ;
 #IF (VDUENABLE)
-ORG_VDU		.EQU	$
-  #INCLUDE "vdu.asm"
-SIZ_VDU		.EQU	$ - ORG_VDU
-		.ECHO	"VDU occupies "
-		.ECHO	SIZ_VDU
-		.ECHO	" bytes.\n"
+LOAD_DRV(vdu)
 #ENDIF
 ;
 #IF (TMSENABLE)
-ORG_TMS		.EQU	$
-  #INCLUDE "tms.asm"
-SIZ_TMS		.EQU	$ - ORG_TMS
-		.ECHO	"TMS occupies "
-		.ECHO	SIZ_TMS
-		.ECHO	" bytes.\n"
+LOAD_DRV(tms)
 #ENDIF
 ;
 #IF (GDCENABLE)
-ORG_GDC	.EQU	$
-  #INCLUDE "gdc.asm"
-SIZ_GDC	.EQU	$ - ORG_GDC
-		.ECHO	"GDC occupies "
-		.ECHO	SIZ_GDC
-		.ECHO	" bytes.\n"
+LOAD_DRV(gdc)
 #ENDIF
 ;
 #IF (DMAENABLE)
-ORG_DMA	.EQU	$
-#INCLUDE "dma.asm"
-SIZ_DMA	.EQU	$ - ORG_DMA
-		.ECHO	"DMA occupies "
-		.ECHO	SIZ_DMA
-		.ECHO	" bytes.\n"
+LOAD_DRV(dma)
 #ENDIF
 ;
 ; FONTS AREA
@@ -6017,162 +5916,79 @@ SIZ_FONTS	.EQU	$ - ORG_FONTS
 		.ECHO	" bytes.\n"
 ;
 #IF (CVDUENABLE | VGAENABLE) | GDCENABLE | (TMSENABLE & ((TMSMODE == TMSMODE_RCKBD) | (TMSMODE == TMSMODE_MBC)))
-ORG_KBD		.EQU	$
-  #INCLUDE "kbd.asm"
-SIZ_KBD		.EQU	$ - ORG_KBD
-		.ECHO	"KBD occupies "
-		.ECHO	SIZ_KBD
-		.ECHO	" bytes.\n"
+LOAD_DRV(kbd)
 #ENDIF
 ;
 #IF (VDUENABLE | (TMSENABLE & (TMSMODE == TMSMODE_N8)))
-ORG_PPK		.EQU	$
-  #INCLUDE "ppk.asm"
-SIZ_PPK		.EQU	$ - ORG_PPK
-		.ECHO	"PPK occupies "
-		.ECHO	SIZ_PPK
-		.ECHO	" bytes.\n"
+LOAD_DRV(ppk)
 #ENDIF
 ;
 #IF (MKYENABLE)
-ORG_MKY		.EQU	$
-  #INCLUDE "mky.asm"
-SIZ_MKY		.EQU	$ - ORG_MKY
-		.ECHO	"MKY occupies "
-		.ECHO	SIZ_MKY
-		.ECHO	" bytes.\n"
+LOAD_DRV(mky)
 #ENDIF
 ;
 #IF (PRPENABLE)
-ORG_PRP		.EQU	$
-  #INCLUDE "prp.asm"
-SIZ_PRP		.EQU	$ - ORG_PRP
-		.ECHO	"PRP occupies "
-		.ECHO	SIZ_PRP
-		.ECHO	" bytes.\n"
+LOAD_DRV(prp)
 #ENDIF
 ;
 #IF (PPPENABLE)
-ORG_PPP		.EQU	$
-  #INCLUDE "ppp.asm"
-SIZ_PPP		.EQU	$ - ORG_PPP
-		.ECHO	"PPP occupies "
-		.ECHO	SIZ_PPP
-		.ECHO	" bytes.\n"
+LOAD_DRV(ppp)
 #ENDIF
 ;
 #IF (MDENABLE)
-ORG_MD		.EQU	$
-  #INCLUDE "md.asm"
-SIZ_MD		.EQU	$ - ORG_MD
-		.ECHO	"MD occupies "
-		.ECHO	SIZ_MD
-		.ECHO	" bytes.\n"
+LOAD_DRV(md)
 #ENDIF
 ;
 #IF (FDENABLE)
-ORG_FD		.EQU	$
-  #INCLUDE "fd.asm"
-SIZ_FD		.EQU	$ - ORG_FD
-		.ECHO	"FD occupies "
-		.ECHO	SIZ_FD
-		.ECHO	" bytes.\n"
+LOAD_DRV(fd)
 #ENDIF
 ;
 #IF (RFENABLE)
-ORG_RF	.EQU	$
-  #INCLUDE "rf.asm"
-SIZ_RF	.EQU	$ - ORG_RF
-		.ECHO	"RF occupies "
-		.ECHO	SIZ_RF
-		.ECHO	" bytes.\n"
+LOAD_DRV(rf)
 #ENDIF
 ;
 #IF (IDEENABLE)
-ORG_IDE		.EQU	$
-  #INCLUDE "ide.asm"
-SIZ_IDE		.EQU	$ - ORG_IDE
-		.ECHO	"IDE occupies "
-		.ECHO	SIZ_IDE
-		.ECHO	" bytes.\n"
+LOAD_DRV(ide)
 #ENDIF
 ;
 #IF (PPIDEENABLE)
-ORG_PPIDE	.EQU	$
-  #INCLUDE "ppide.asm"
-SIZ_PPIDE	.EQU	$ - ORG_PPIDE
-		.ECHO	"PPIDE occupies "
-		.ECHO	SIZ_PPIDE
-		.ECHO	" bytes.\n"
+LOAD_DRV(ppide)
 #ENDIF
 ;
 #IF (SDENABLE)
-ORG_SD		.EQU	$
-  #INCLUDE "sd.asm"
-SIZ_SD		.EQU	$ - ORG_SD
-		.ECHO	"SD occupies "
-		.ECHO	SIZ_SD
-		.ECHO	" bytes.\n"
+LOAD_DRV(sd)
 #ENDIF
 ;
 #IF (HDSKENABLE)
-ORG_HDSK	.EQU	$
-  #INCLUDE "hdsk.asm"
-SIZ_HDSK	.EQU	$ - ORG_HDSK
-		.ECHO	"HDSK occupies "
-		.ECHO	SIZ_HDSK
-		.ECHO	" bytes.\n"
+LOAD_DRV(hdsk)
 #ENDIF
 ;
 #IF (TERMENABLE)
-ORG_TERM	.EQU	$
-  #INCLUDE "term.asm"
-SIZ_TERM	.EQU	$ - ORG_TERM
-		.ECHO	"TERM occupies "
-		.ECHO	SIZ_TERM
-		.ECHO	" bytes.\n"
+LOAD_DRV(term)
 #ENDIF
 ;
-;#IF (SPKENABLE & DSRTCENABLE)
 #IF (SPKENABLE)
-ORG_SPK	.EQU	$
-  #INCLUDE "spk.asm"
-SIZ_SPK	.EQU	$ - ORG_SPK
-		.ECHO	"SPK occupies "
-		.ECHO	SIZ_SPK
-		.ECHO	" bytes.\n"
+LOAD_DRV(spk)
 #ENDIF
+;
 #IF (KIOENABLE)
-ORG_KIO	.EQU	$
-  #INCLUDE "kio.asm"
-SIZ_KIO	.EQU	$ - ORG_KIO
-		.ECHO	"KIO occupies "
-		.ECHO	SIZ_KIO
-		.ECHO	" bytes.\n"
+LOAD_DRV(kio)
 #ENDIF
+;
 #IF (CTCENABLE)
-ORG_CTC	.EQU	$
-  #INCLUDE "ctc.asm"
-SIZ_CTC	.EQU	$ - ORG_CTC
-		.ECHO	"CTC occupies "
-		.ECHO	SIZ_CTC
-		.ECHO	" bytes.\n"
+LOAD_DRV(ctc)
 #ENDIF
+;
 #IF (SN76489ENABLE)
-ORG_SN76489	.EQU	$
-  #INCLUDE "sn76489.asm"
-SIZ_SN76489	.EQU	$ - ORG_SN76489
-		.ECHO	"SN76489 occupies "
-		.ECHO	SIZ_SN76489
-		.ECHO	" bytes.\n"
+LOAD_DRV(sn76489)
 #ENDIF
+;
 #IF (AY38910ENABLE)
-ORG_AY38910	.EQU	$
-  #INCLUDE "ay38910.asm"
-SIZ_AY38910	.EQU	$ - ORG_AY38910
-		.ECHO	"AY38910 occupies "
-		.ECHO	SIZ_AY38910
-		.ECHO	" bytes.\n"
+LOAD_DRV(ay38910)
+#ENDIF
+;
+#IF (YM2612ENABLE)
+LOAD_DRV(ym2612)
 #ENDIF
 ;
 		.ECHO	"RTCDEF="
@@ -7031,6 +6847,7 @@ PS_SDSND	.TEXT	"SND$"
 PS_SDSN76489	.TEXT	"SN76489$"
 PS_SDAY38910	.TEXT	"AY-3-8910$"
 PS_SDBITMODE	.TEXT	"I/O PORT$"
+PS_SDAY2612	.TEXT	"YM2612$"
 ;
 ;			 0	   1	     2	       3	 4	   5	     6	       7
 ;			 01234567890123456789012345678901234567890123456789012345678901234567890123456789

Source/HBIOS/ym2612.asm

@@ -0,0 +1,308 @@
+;======================================================================
+;	YM2612 sound driver
+;
+;	WRITTEN BY: PHIL SUMMERS
+;======================================================================
+;
+; PRESENTLY THIS IS JUST A STUB TO MUTE OUTPUT
+;
+;======================================================================
+; 
+;======================================================================
+;
+YMSEL		.EQU	VGMBASE+00H		; Primary YM2162 11000000 a1=0 a0=0
+YMDAT		.EQU	VGMBASE+01H		; Primary YM2162 11000001 a1=0 a0=1
+YM2SEL		.EQU	VGMBASE+02H		; Secondary YM2162 11000010 a1=1 a0=0
+YM2DAT		.EQU	VGMBASE+03H		; Secondary YM2162 11000011 a1=1 a0=1
+;
+;------------------------------------------------------------------------------
+; YM2162 Mute
+;------------------------------------------------------------------------------
+;
+YM2612_INIT:
+		ld	hl,s1			; Start of register list to write
+
+		ld	b,s2-s1
+pt1:		call	set1			; [1]
+		djnz	pt1
+
+pt2:		ld	b,s3-s2
+		call	set2			; [2]
+		djnz	pt2
+
+pt3:		ld	b,s4-s3
+		call	set1			; [1]
+		djnz	pt3
+
+pt4:		ld	b,s5-s4
+		call	set2			; [2]
+		djnz	pt4
+
+		ret
+
+set1:		ld	a,(hl)			; YM2162 Register write
+		inc	hl			; Register bank [1]
+		out	(YMSEL),a
+		ld	a,(hl)
+		inc	hl
+		out	(YMDAT),a
+set1a:		in	a,(YMSEL)
+		rlca
+		jp	c,set1a
+		ret
+
+set2:		ld	a,(hl)			; YM2162 Register write
+		inc	hl			; Register Bank [2]
+		out	(YM2SEL),a
+		ld	a,(hl)
+		inc	hl
+		out	(YM2DAT),a
+set2a:		in	a,(YM2SEL)
+		rlca
+		jp	c,set2a
+		ret
+
+s1:		.db	$22,$00			; [1] lfo off
+
+		.db	$27,$00			; [1] Disable independant Channel 3
+		.db	$28,$00			; [1] note off ch 1
+		.db	$28,$01			; [1] note off ch 2
+		.db	$28,$02			; [1] note off ch 3
+		.db	$28,$04			; [1] note off ch 4
+		.db	$28,$05			; [1] note off ch 5
+		.db	$28,$06			; [1] note off ch 6
+		.db	$2b,$00			; [1] dac off
+
+		.db	$b4,$00			; [1] sound off ch 1-3
+		.db	$b5,$00	
+		.db	$b6,$00	
+
+s2:		.db	$b4,$00			; [2] sound off ch 4-6
+		.db	$b5,$00			; [2] 
+		.db	$b6,$00			; [2] 
+
+s3:		.db	$40,$7f			; [1] ch 1-3 total level minimum
+		.db	$41,$7f			; [1] 
+		.db	$42,$7f			; [1] 
+		.db	$44,$7f			; [1] 
+		.db	$45,$7f			; [1] 
+		.db	$46,$7f			; [1] 
+		.db	$48,$7f			; [1] 
+		.db	$49,$7f			; [1] 
+		.db	$4a,$7f			; [1] 
+		.db	$4c,$7f			; [1] 
+		.db	$4d,$7f			; [1] 
+		.db	$4e,$7f			; [1] 
+s4:
+		.db	$40,$7f			; [2] ch 4-6 total level minimum
+		.db	$41,$7f			; [2]
+		.db	$42,$7f			; [2]
+		.db	$44,$7f			; [2]
+		.db	$45,$7f			; [2]
+		.db	$46,$7f			; [2]
+		.db	$48,$7f			; [2]
+		.db	$49,$7f			; [2]
+		.db	$4a,$7f			; [2]
+		.db	$4c,$7f			; [2]
+		.db	$4d,$7f			; [2]
+		.db	$4e,$7f			; [2]
+s5:
+#IF (0)
+		.db	$2a,$00			; [1]	; dac value
+ 
+		.db	$24,$00			; [1]	; timer A frequency
+		.db	$25,$00			; [1]	; timer A frequency
+		.db	$26,$00			; [1]	; time B frequency
+
+		.db	$30,$00			; [1]	; ch 1-3 multiply & detune
+		.db	$31,$00	                ; [1]
+		.db	$32,$00	                ; [1]
+		.db	$34,$00	                ; [1]
+		.db	$35,$00	                ; [1]
+		.db	$36,$00	                ; [1]
+		.db	$38,$00	                ; [1]
+		.db	$39,$00	                ; [1]
+		.db	$3a,$00	                ; [1]
+		.db	$3c,$00	                ; [1]
+		.db	$3d,$00	                ; [1]
+		.db	$3e,$00	                ; [1]
+s6:
+		.db	$30,$00			; [2] ch 4-6 multiply & detune
+		.db	$31,$00			; [2]
+		.db	$32,$00			; [2]
+		.db	$34,$00			; [2]
+		.db	$35,$00			; [2]
+		.db	$36,$00			; [2]
+		.db	$38,$00			; [2]
+		.db	$39,$00			; [2]
+		.db	$3a,$00			; [2]
+		.db	$3c,$00			; [2]
+		.db	$3d,$00			; [2]
+		.db	$3e,$00			; [2]
+s7:                             			
+		.db	$50,$00	                ; [1] ch 1-3 attack rate and scaling
+		.db	$51,$00	                ; [1]
+		.db	$52,$00	                ; [1]
+		.db	$54,$00	                ; [1]
+		.db	$55,$00	                ; [1]
+		.db	$56,$00	                ; [1]
+		.db	$58,$00	                ; [1]
+		.db	$59,$00	                ; [1]
+		.db	$5a,$00	                ; [1]
+		.db	$5c,$00	                ; [1]
+		.db	$5d,$00	                ; [1]
+		.db	$5e,$00	                ; [1]
+s8:
+		.db	$50,$00			; [2] ch 4-6 attack rate and scaling
+		.db	$51,$00			; [2]
+		.db	$52,$00			; [2]
+		.db	$54,$00			; [2]
+		.db	$55,$00			; [2]
+		.db	$56,$00			; [2]
+		.db	$58,$00			; [2]
+		.db	$59,$00			; [2]
+		.db	$5a,$00			; [2]
+		.db	$5c,$00			; [2]
+		.db	$5d,$00			; [2]
+		.db	$5e,$00			; [2]
+s9:
+		.db	$60,$00	                ; [1] ch 1-3 decay rate and am enable
+		.db	$61,$00	                ; [1]
+		.db	$62,$00	                ; [1]
+		.db	$64,$00	                ; [1]
+		.db	$65,$00	                ; [1]
+		.db	$66,$00	                ; [1]
+		.db	$68,$00	                ; [1]
+		.db	$69,$00	                ; [1]
+		.db	$6a,$00	                ; [1]
+		.db	$6c,$00	                ; [1]
+		.db	$6d,$00	                ; [1]
+		.db	$6e,$00	                ; [1]
+s10:
+		.db	$60,$00			; [2] ch 4-6 decay rate and am enable
+		.db	$61,$00			; [2]
+		.db	$62,$00			; [2]
+		.db	$64,$00			; [2]
+		.db	$65,$00			; [2]
+		.db	$66,$00			; [2]
+		.db	$68,$00			; [2]
+		.db	$69,$00			; [2]
+		.db	$6a,$00			; [2]
+		.db	$6c,$00			; [2]
+		.db	$6d,$00			; [2]
+		.db	$6e,$00			; [2]
+s11:
+		.db	$70,$00	                ; [1] ch 1-3 sustain rate
+		.db	$71,$00	                ; [1]
+		.db	$72,$00	                ; [1]
+		.db	$74,$00	                ; [1]
+		.db	$75,$00	                ; [1]
+		.db	$76,$00	                ; [1]
+		.db	$78,$00	                ; [1]
+		.db	$79,$00	                ; [1]
+		.db	$7a,$00	                ; [1]
+		.db	$7c,$00	                ; [1]
+		.db	$7d,$00	                ; [1]
+		.db	$7e,$00	                ; [1]
+s12:
+		.db	$70,$00			; [2] ch 4-6 sustain rate
+		.db	$71,$00			; [2]
+		.db	$72,$00			; [2]
+		.db	$74,$00			; [2]
+		.db	$75,$00			; [2]
+		.db	$76,$00			; [2]
+		.db	$78,$00			; [2]
+		.db	$79,$00			; [2]
+		.db	$7a,$00			; [2]
+		.db	$7c,$00			; [2]
+		.db	$7d,$00			; [2]
+		.db	$7e,$00			; [2]
+s13:
+		.db	$80,$00	                ; [1] ch 1-3 release rate and sustain level
+		.db	$81,$00	                ; [1]
+		.db	$82,$00	                ; [1]
+		.db	$84,$00	                ; [1]
+		.db	$85,$00	                ; [1]
+		.db	$86,$00	                ; [1]
+		.db	$88,$00	                ; [1]
+		.db	$89,$00	                ; [1]
+		.db	$8a,$00	                ; [1]
+		.db	$8c,$00	                ; [1]
+		.db	$8d,$00	                ; [1]
+		.db	$8e,$00	                ; [1]
+s14:
+		.db	$80,$00			; [2] ch 4-6 release rate and sustain level
+		.db	$81,$00			; [2]
+		.db	$82,$00			; [2]
+		.db	$84,$00			; [2]
+		.db	$85,$00			; [2]
+		.db	$86,$00			; [2]
+		.db	$88,$00			; [2]
+		.db	$89,$00			; [2]
+		.db	$8a,$00			; [2]
+		.db	$8c,$00			; [2]
+		.db	$8d,$00			; [2]
+		.db	$8e,$00			; [2]
+s15:
+		.db	$90,$00	                ; [1] ch 1-3 ssg-eg
+		.db	$91,$00	                ; [1]
+		.db	$92,$00	                ; [1]
+		.db	$94,$00	                ; [1]
+		.db	$95,$00	                ; [1]
+		.db	$96,$00	                ; [1]
+		.db	$98,$00	                ; [1]
+		.db	$99,$00	                ; [1]
+		.db	$9a,$00	                ; [1]
+		.db	$9c,$00	                ; [1]
+		.db	$9d,$00	                ; [1]
+		.db	$9e,$00	                ; [1]
+s16:
+		.db	$90,$00			; [2] ch 4-6 ssg-eg
+		.db	$91,$00			; [2]
+		.db	$92,$00			; [2]
+		.db	$94,$00			; [2]
+		.db	$95,$00			; [2]
+		.db	$96,$00			; [2]
+		.db	$98,$00			; [2]
+		.db	$99,$00			; [2]
+		.db	$9a,$00			; [2]
+		.db	$9c,$00			; [2]
+		.db	$9d,$00			; [2]
+		.db	$9e,$00			; [2]
+s17:
+		.db	$a0,$00	                ; [1] ch 1-3 frequency
+		.db	$a1,$00	                ; [1]
+		.db	$a2,$00	                ; [1]
+		.db	$a4,$00	                ; [1]
+		.db	$a5,$00	                ; [1]
+		.db	$a6,$00	                ; [1]
+;		.db	$a8,$00	                ; [1] ch 3 special mode
+;		.db	$a9,$00	                ; [1]
+;		.db	$aa,$00	                ; [1]
+;		.db	$ac,$00	                ; [1]
+;		.db	$ad,$00	                ; [1]
+;		.db	$ae,$00	                ; [1]
+s18:
+		.db	$a0,$00			; [2] ch 4-6 frequency
+		.db	$a1,$00			; [2]
+		.db	$a2,$00			; [2]
+		.db	$a4,$00			; [2]
+		.db	$a5,$00			; [2]
+		.db	$a6,$00			; [2]
+;		.db	$a8,$00			; [2] ch 3 special mode
+;		.db	$a9,$00			; [2]
+;		.db	$aa,$00			; [2]
+;		.db	$ac,$00			; [2]
+;		.db	$ad,$00			; [2]
+;		.db	$ae,$00			; [2]
+s19:
+		.db	$b0,$00	                ; [1] ch 1-3 algorith + feedback
+		.db	$b1,$00	                ; [1]
+		.db	$b2,$00	                ; [1]
+s20:
+		.db	$b0,$00			; [2] ch 4-6 algorith + feedback
+		.db	$b1,$00			; [2]
+		.db	$b2,$00			; [2]
+s21:
+#ENDIF
+