Merge pull request #158 from wwarthen/dev

Resync

Source/Apps/RTC.asm

@@ -1331,9 +1331,6 @@ DELAY_LOOP:				; LOOP IS 26TS
 	OR	L			; 4TS
 	JR	NZ,DELAY_LOOP		; 12TS
 	; RESTART SYSTEM FROM ROM BANK 0, ADDRESS $0000
-	;LD	A,BID_BOOT		; BOOT BANK
-	;LD	HL,0			; ADDRESS ZERO
-	;CALL	HB_BNKCALL		; DOES NOT RETURN
 	LD	B,BF_SYSRESET		; SYSTEM RESTART
 	LD	C,BF_SYSRES_COLD	; COLD START
 	CALL	$FFF0			; CALL HBIOS

Source/CBIOS/config.asm

@@ -8,7 +8,7 @@ DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 CPM_LOC		.EQU	$D000		; LOCATION OF START OF CCP
 ;
 #IFDEF PLTWBW
-CPM_END		.EQU	$FE00		; ROMWBW HBIOS PROXY OCCUPIES TOP 2 PAGES OF MEMORY
+CPM_END		.EQU	$FD80		; ROMWBW HBIOS PROXY OCCUPIES TOP $280 BYTES OF MEMORY
 #ENDIF
 ;
 #IFDEF PLTUNA

Source/HBIOS/Config/RCZ280_nat.asm

@@ -0,0 +1,49 @@
+;
+;==================================================================================================
+;   RC2014 Z280 STANDARD CONFIGURATION (EXTERNAL 512K RAM/ROM BANKED MEMORY MODULE)
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#define	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_rcz280.asm"
+;
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;
+CPUOSC		.SET	24000000	; CPU OSC FREQ IN MHZ
+;
+MEMMGR		.SET	MM_Z280		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
+;
+INTMODE		.SET	3
+;
+Z280_MEMWAIT	.SET	0		; Z280: MEMORY WAIT STATES (0-3)
+Z280_IOWAIT	.SET	1		; Z280: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+Z280_INTWAIT	.SET	0		; Z280: INT ACK WAIT STATUS (0-3)
+;
+UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+;
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/SCZ180_140.asm

@@ -0,0 +1,56 @@
+;
+;==================================================================================================
+;   SC140 STANDARD CONFIGURATION
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE		PLATFORM_NAME	"SC140"
+;
+#include "cfg_scz180.asm"
+;
+CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
+;
+Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
+Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
+Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+;
+HBIOS_MUTEX	.SET	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
+;
+LEDENABLE	.SET	TRUE		; ENABLE STATUS LED (SINGLE LED)
+;
+DIAGENABLE	.SET	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
+;
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+;
+ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+;
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+;
+SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+;
+FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+;
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+;
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)

Source/HBIOS/Makefile

@@ -13,6 +13,7 @@ else
 	OBJECTS += RCZ180_ext.rom RCZ180_ext.com RCZ180_ext.upd
 	OBJECTS += RCZ180_nat.rom RCZ180_nat.com RCZ180_nat.upd
 	OBJECTS += RCZ280_ext.rom RCZ280_ext.com RCZ280_ext.upd
+	OBJECTS += RCZ280_nat.rom RCZ280_nat.com RCZ280_nat.upd
 	OBJECTS += RCZ80_kio.rom RCZ80_kio.com RCZ80_kio.upd
 	OBJECTS += RCZ80_mt.rom RCZ80_mt.com RCZ80_mt.upd
 	OBJECTS += RCZ80_duart.rom RCZ80_duart.com RCZ80_duart.upd
@@ -23,6 +24,7 @@ else
 	OBJECTS += SCZ180_126.rom SCZ180_126.com SCZ180_126.upd
 	OBJECTS += SCZ180_130.rom SCZ180_130.com SCZ180_130.upd
 	OBJECTS += SCZ180_131.rom SCZ180_131.com SCZ180_131.upd
+	OBJECTS += SCZ180_140.rom SCZ180_140.com SCZ180_140.upd
 	OBJECTS += UNA_std.rom
 	OBJECTS += ZETA_std.rom ZETA_std.com ZETA_std.upd
 	OBJECTS += ZETA2_std.rom ZETA2_std.com ZETA2_std.upd

Source/HBIOS/dbgmon.asm

@@ -1412,12 +1412,12 @@ MON_STACK	.EQU	$
 		.ECHO	SLACK
 		.ECHO	" bytes.\n"
 ;
-; DBGMON CURRENTLY OCCUPIES $F000-$FDFF BECAUSE THE
-; HBIOS PROXY OCCUPIES $FE00-$FFFF.  HOWEVER THE DBGMON
+; DBGMON CURRENTLY OCCUPIES $F000 TO START OF HBX PROXY BECAUSE THE
+; HBIOS PROXY OCCUPIES THE TOP OF COMMON RAM.  HOWEVER THE DBGMON
 ; IMAGE MUST OCCUPY A FULL $1000 BYTES IN THE ROM.
-; BELOW WE JUST PAD OUT THE IMAGE BY $200 SO IT
+; BELOW WE JUST PAD OUT THE IMAGE SO IT
 ; OCCUPIES THE FULL $1000 BYTES IN ROM.
 ;
-		.FILL	$200,$00
+		.FILL	HBX_SIZ			; PAD FOR HBX SIZE
 ;
 		.END

Source/HBIOS/hbios.asm

@@ -113,12 +113,12 @@ MODCNT	.SET	MODCNT + 1
 #DEFINE	HB_DI		;
 #DEFINE	HB_EI		;
 #ENDIF
-#IF ((INTMODE == 1) | (INTMODE == 2))
-; MODE 1 OR 2 INTERRUPT HANDLING
+#IF ((INTMODE == 1) | (INTMODE == 2) | (INTMODE == 3))
+; MODE 1 OR 2 OR 3 INTERRUPT HANDLING
 #DEFINE	HB_DI		DI
 #DEFINE	HB_EI		EI
 #ENDIF
-#IF (INTMODE > 2)
+#IF (INTMODE > 3)
 	.ECHO	"*** ERROR: INVALID INTMODE SETTING!!!\n"
 	!!!	; FORCE AN ASSEMBLY ERROR
 #ENDIF
@@ -247,6 +247,91 @@ CB_BIDROMDN	.DB	BID_ROMDN
 ;
 	.FILL	(HBX_IMG - $)		; FILL TO START OF PROXY IMAGE START
 	.ORG	HBX_LOC			; ADJUST FOR RELOCATION
+	
+;
+; Z280 BANK SELECTION (CALLED FROM PROXY)
+;
+#IF (MEMMGR == MM_Z280)
+;
+Z280_BNKSEL:
+	PUSH	HL
+	PUSH	DE
+	PUSH	BC
+	LD	L,$FF			; MMU PAGE I/O REG IS $FF
+	LD	C,8			; REG C POINTS TO I/O PAGE REGISTER
+	.DB	$ED,$6E			; OP CODE FOR LDCTL (C),HL
+	LD	E,0			; DE IS TEMPLATE
+	BIT	7,A
+	JR	Z,MMU_ROM		; TO ROM ROUTINE IF BIT 7 IS ZERO
+	RES	7,A
+	RR	A			; EXTRACT THE LSB
+	PUSH	AF			; SAVE THE CONDITION FLAG
+	OR	$08			; RAM BASE IS $080000
+	LD	D,A			; REG D CONTAINS THE HIGH BYTE TEMPLATE
+	POP	AF
+	JR	C,W_MMU1
+	JR	W_MMU0
+MMU_ROM:
+	OR	A			; CLEAR THE CARRY FLAG
+	RR	A			; EXTRACT THE LSB
+	LD	D,A			; REG D CONTAINS THE HIGH BYTE TEMPLATE
+	JR	C,W_MMU1
+W_MMU0:
+	LD	A,$10			; SYSTEM PAGE
+	OUT	(Z280_MMUPDRPTR),A
+	LD	C,Z280_MMUBLKMOV	; ACCESS BLOCK MOVE PORT SO POINTER WILL AUTOINCREM
+	LD	H,D			; GET TEMPLATE INTO HL
+	LD	L,$0A			; LOWEST 4K OF MEMORY
+	.DB	$ED,$BF			; OUTW (C),HL
+	LD	L,$1A			; MODIFY THE TEMPLATE FOR NEXT 4K
+	.DB	$ED,$BF			; OUTW (C),HL
+	LD	L,$2A			; MODIFY THE TEMPLATE FOR NEXT 4K
+	.DB	$ED,$BF			; OUTW (C),HL
+	LD	L,$3A			; MODIFY THE TEMPLATE FOR NEXT 4K
+	.DB	$ED,$BF			; OUTW (C),HL
+	LD	L,$4A			; MODIFY THE TEMPLATE FOR NEXT 4K
+	.DB	$ED,$BF			; OUTW (C),HL
+	LD	L,$5A			; MODIFY THE TEMPLATE FOR NEXT 4K
+	.DB	$ED,$BF			; OUTW (C),HL
+	LD	L,$6A			; MODIFY THE TEMPLATE FOR NEXT 4K
+	.DB	$ED,$BF			; OUTW (C),HL  
+	LD	L,$7A			; MODIFY THE TEMPLATE FOR NEXT 4K
+	.DB	$ED,$BF			; OUTW (C),HL  
+	JR	W_MMU2
+W_MMU1:
+	LD	A,$10			; SYSTEM PAGE
+	OUT	(Z280_MMUPDRPTR),A
+	LD	C,Z280_MMUBLKMOV	; ACCESS BLOCK MOVE PORT SO POINTER WILL AUTOINCREM
+	LD	H,D			; GET TEMPLATE INTO HL
+	LD	L,$8A			; LOWEST 4K OF MEMORY
+	.DB	$ED,$BF			; OUTW (C),HL
+	LD	L,$9A			; MODIFY THE TEMPLATE FOR NEXT 4K
+	.DB	$ED,$BF			; OUTW (C),HL        
+	LD	L,$AA			; MODIFY THE TEMPLATE FOR NEXT 4K
+	.DB	$ED,$BF			; OUTW (C),HL  
+	LD	L,$BA			; MODIFY THE TEMPLATE FOR NEXT 4K
+	.DB	$ED,$BF			; OUTW (C),HL  
+	LD	L,$CA			; MODIFY THE TEMPLATE FOR NEXT 4K
+	.DB	$ED,$BF			; OUTW (C),HL  
+	LD	L,$DA			; MODIFY THE TEMPLATE FOR NEXT 4K
+	.DB	$ED,$BF			; OUTW (C),HL  
+	LD	L,$EA			; MODIFY THE TEMPLATE FOR NEXT 4K
+	.DB	$ED,$BF			; OUTW (C),HL  
+	LD	L,$FA			; MODIFY THE TEMPLATE FOR NEXT 4K
+	.DB	$ED,$BF			; OUTW (C),HL        
+W_MMU2:        
+	.DB    $ED,$65			; PCACHE
+	LD	L,0                     ; RESTORE I/O PAGE REG TO 0
+	LD	C,8
+	.DB	$ED,$6E			; LDCTL (C),HL
+	POP	BC
+	POP	DE
+	POP	HL
+	RET
+;
+#ENDIF
+;
+	.FILL	($FE00 - $)
 ;
 ; MEMORY LAYOUT:
 ;
@@ -292,6 +377,25 @@ HBX_INVOKE:
 	POP	HL			; RESTORE HL
 #ENDIF
 
+;#IF (MEMMGR == MM_Z280)
+#IF 0
+
+	LD	A,(HB_CURBNK)		; GET CURRENT BANK
+	LD	(HB_INVBNK),A		; SAVE INVOCATION BANK
+
+	LD	A,BID_BIOS		; HBIOS BANK
+	LD	(HB_CURBNK),A		; SET AS CURRENT BANK
+
+	.DB	$ED,$71			; SC
+	.DW	HB_DISPATCH		; SC PARAMETER
+
+	PUSH	AF			; SAVE AF (FUNCTION RETURN)
+	LD	A,(HB_INVBNK)		; LOAD ORIGINAL BANK
+	LD	(HB_CURBNK),A
+	POP	AF			; RESTORE AF
+
+#ELSE
+
 	LD	(HBX_INVSP),SP		; SAVE ORIGINAL STACK FRAME
 	LD	SP,HBX_BUF_END		; BORROW HBX_BUF FOR TEMP STACK
 
@@ -313,6 +417,8 @@ HBX_INVOKE:
 	LD	SP,0			; RESTORE ORIGINAL STACK FRAME
 HBX_INVSP	.EQU	$ - 2
 
+#ENDIF
+
 #IF (HBIOS_MUTEX == TRUE)
 	PUSH	HL			; SAVE HL
 	LD	HL,HB_LOCK		; POINT TO LOCK
@@ -373,8 +479,7 @@ HBX_ROM:
 	INC	A			;
 	OUT	(MPGSEL_1),A		; BANK_1: 16K - 32K
 #IF (CPUFAM == CPU_Z280)
-	;PCACHE				; PURGE CACHES
-	.DB	$ED,$65
+	.DB	$ED,$65			; PCACHE
 #ENDIF
 	RET				; DONE
 #ENDIF
@@ -412,8 +517,17 @@ HBX_BNKSEL1:
 	RET				; DONE
 #ENDIF
 #IF (MEMMGR == MM_Z280)
-	; TBD
-	RET				; DONE
+	.DB	$ED,$71			; SC
+	.DW	Z280_BNKSEL		; SC PARAMETER
+	RET
+;
+Z280_SYSCALL:
+	EX	(SP),HL
+	LD	(Z280_SCADR),HL
+	POP	HL
+Z280_SCADR	.EQU	$ + 1
+	CALL	$FFFF
+	.DB	$ED,$55			; RETIL
 #ENDIF
 #IF (MEMMGR == MM_ZRC)
 	BIT	7,A			; BIT 7 SET REQUESTS RAM PAGE
@@ -441,21 +555,9 @@ HBX_ROM:
 ;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
 ;
 HBX_BNKCPY:
-#IF (CPUFAM == CPU_Z280)
-	PUSH	IY
-	PUSH	BC
-	;LD	C,$00
-	LD	C,Z280_MSR
-	;LDCTL	IY,(C)
-	.DB	$FD,$ED,$66
-	POP	BC
-	PUSH	IY
-	DI
-#ELSE
 	LD	A,I
 	DI
 	PUSH	AF
-#ENDIF
 	LD	(HBX_BC_SP),SP		; PUT STACK
 	LD	SP,HBX_TMPSTK		; ... IN HI MEM
 
@@ -485,19 +587,9 @@ HBX_BC_LAST:
 
 	LD	SP,$FFFF		; RESTORE STACK
 HBX_BC_SP	.EQU	$ - 2		; ... TO ORIGINAL VALUE
-#IF (CPUFAM == CPU_Z280)
-	POP	IY
-	PUSH	BC
-	LD	C,Z280_MSR
-	;LDCTL	(C),IY
-	.DB	$FD,$ED,$6E
-	POP	BC
-	POP	IY
-#ELSE
 	POP	AF
 	JP	PO,$+4
 	EI
-#ENDIF
 	RET
 ;
 HBX_BC_ITER:
@@ -598,7 +690,7 @@ HBX_INTSTK	.EQU	$
 	!!!	; FORCE AN ASSEMBLY ERROR
 #ENDIF
 ;
-#IF (INTMODE == 2)
+#IF ((INTMODE == 2) | (INTMODE == 3))
 ;
 ; HBIOS INTERRUPT SLOT ASSIGNMENTS
 ;
@@ -670,47 +762,83 @@ INT_IM1:
 ;
 #IF (INTMODE > 0)
 ;
-; COMMON INTERRUPT DISPATCHING CODE
-; SETUP AND CALL HANDLER IN BIOS BANK
-;
 HBX_INT:	; COMMON INTERRUPT ROUTING CODE
+;
+  #IF (MEMMGR == MM_Z280)
 ;
 	EX	(SP),HL			; SAVE HL AND GET INT JP TABLE OFFSET
+	
+	; SAVE STATE (HL SAVED PREVIOUSLY ON ORIGINAL STACK FRAME)
+	PUSH	AF			; SAVE AF
+	PUSH	BC			; SAVE BC
+	PUSH	DE			; SAVE DE
+	PUSH	IY			; SAVE IY
+;
+	; HANDLE INT VIA JP TABLE IN HBIOS
+	LD	L,(HL)			; OFFSET INTO JP TABLE FOR THIS INT
+	LD	H,HB_IVT >> 8		; MSB OF HBIOS INT JP TABLE
+	CALL	JPHL			; CALL HANDLER VIA INT JP TABLE
+;
+	; RESTORE STATE
+	POP	IY			; RESTORE IY
+	POP	DE			; RESTORE DE
+	POP	BC			; RESTORE BC
+	POP	AF			; RESTORE AF
+	POP	HL			; RESTORE HL
+;
+	; BURN THE REASON CODE
+	EX	(SP),HL			; HL TO STK, RC TO HL
+	POP	HL			; RESTORE HL
 
+	CALL	HBX_RETI		; RETI FOR Z80 PERIPHERALS
+	.DB	$ED,$55			; BACK TO USER LAND
+;
+HBX_RETI:	
+	RETI
+;
+  #ELSE
+;
+; COMMON INTERRUPT DISPATCHING CODE
+; SETUP AND CALL HANDLER IN BIOS BANK
+;
+	EX	(SP),HL			; SAVE HL AND GET INT JP TABLE OFFSET
+;
 	LD	(HBX_INT_SP),SP		; SAVE ORIGINAL STACK FRAME
 	LD	SP,HBX_INTSTK		; USE DEDICATED INT STACK FRAME IN HI MEM
-
+;
 	; SAVE STATE (HL SAVED PREVIOUSLY ON ORIGINAL STACK FRAME)
 	PUSH	AF			; SAVE AF
 	PUSH	BC			; SAVE BC
 	PUSH	DE			; SAVE DE
 	PUSH	IY			; SAVE IY
-
+;
 	LD	A,BID_BIOS		; HBIOS BANK
 	CALL	HBX_BNKSEL_INT		; SELECT IT
-
+;
 	LD	L,(HL)			; OFFSET INTO JP TABLE FOR THIS INT
 	LD	H,HB_IVT >> 8		; MSB OF HBIOS INT JP TABLE
-
+;
 	CALL	JPHL			; CALL HANDLER VIA INT JP TABLE
-
+;
 	LD	A,(HB_CURBNK)		; GET PRE-INT BANK
 	CALL	HBX_BNKSEL		; SELECT IT
-
+;
 	; RESTORE STATE
 	POP	IY			; RESTORE IY
 	POP	DE			; RESTORE DE
 	POP	BC			; RESTORE BC
 	POP	AF			; RESTORE AF
-
+;
 	LD	SP,$FFFF		; RESTORE ORIGINAL STACK FRAME
 HBX_INT_SP	.EQU	$ - 2
-
+;
 	POP	HL			; RESTORE HL
-
+;
 	HB_EI				; ENABLE INTERRUPTS
 	RETI				; AND RETURN
 ;
+  #ENDIF
+  
 #ENDIF
 ;
 ; SMALL TEMPORARY STACK FOR USE BY HBX_BNKCPY
@@ -769,7 +897,7 @@ HB_ENTRYTBL	.EQU	$
 	JP	HB_START		; HBIOS INITIALIZATION
 	JP	HB_DISPATCH		; VECTOR TO DISPATCHER
 ;
-HB_STKSIZ	.EQU	HB_ENTRYTBL + 256 - $
+HB_STKSIZ	.EQU	$100 - ($ & $FF)
 ;
 		.FILL	HB_STKSIZ,$FF	; USE REMAINDER OF PAGE FOR HBIOS STACK
 HB_STACK	.EQU	$		; TOP OF HBIOS STACK
@@ -819,7 +947,7 @@ HB_IVT:
 ; NOTE THAT EACH ENTRY HAS A FILLER BYTE OF VALUE ZERO.  THIS BYTE
 ; HAS NO FUNCTION.  IT IS JUST USED TO MAKE ENTRIES AN EVEN 4 BYTES.
 ;
-#IF (INTMODE == 2)
+#IF ((INTMODE == 2) | (INTMODE == 3))
 ;
 HB_IVT:
 HB_IVT00:	JP	HB_BADINT \ .DB 0
@@ -857,18 +985,144 @@ HB_START:
 	LD	SP,HBX_LOC		; SETUP INITIAL STACK JUST BELOW HBIOS PROXY
 ;
 #IF (CPUFAM == CPU_Z280)
-	;LD	C,Z280_CCR		; CACHE CONTROL REGISTER
-	;LD	HL,$0060		; DISABLE INSTRUCTION CACHE
-	;;LDCTL	(C),HL			; SET IT (8 BITS)
-	;.DB	$ED,$6E
-	;;PCACHE			; PURGE ANY REMNANTS OF CACHE
-	;.DB	$ED,$65
-;
+	; SET MAXIMUM I/O WAIT STATES FOR NOW
 	LD	C,Z280_BTCR		; BUS TIMING AND CONTROL REGISTER
 	LD	HL,$0033		; 3 I/O WAIT STATES ADDED
-	;LD	HL,$00F3		; 3 I/O W/S & 3 INT ACK W/S
-	;LDCTL	(C),HL			; SET IT (8 BITS)
-	.DB	$ED,$6E
+	.DB	$ED,$6E			; LDCTL	(C),HL
+
+  #IF (MEMMGR == MM_Z280)
+  
+	; INITIALIZE MMU
+	; START BY SELECTING I/O PAGE $FF
+	LD	L,$FF			; MMU AND DMA PAGE I/O REG IS $FF
+	LD	C,$08			; REG C POINTS TO I/O PAGE REGISTER
+	.DB	$ED,$6E			; LDCTL	(C),HL
+;
+	; INITIALIZE ALL OF THE SYSTEM PAGE DESCRIPTORS WITH BLOCK MOVE
+	XOR	A			; FIRST USER PDR
+	OUT	(Z280_MMUPDRPTR),A	; SET THE PDR POINTER
+	LD	HL,Z280_PDRTBL		; START OF PDR VALUES TABLE
+	LD	C,Z280_MMUBLKMOV	; PDR BLOCK MOVE PORT
+	LD	B,16			; PROGRAM 16 PDRS
+	.DB	$ED,$93			; OTIRW
+;
+	; INITIALIZE ALL OF THE USER PAGE DESCRIPTORS WITH BLOCK MOVE
+	LD	A,$10			; FIRST SYSTEM PDR
+	OUT	(Z280_MMUPDRPTR),A	; SET THE PDR POINTER
+	LD	HL,Z280_PDRTBL		; START OF PDR VALUES TABLE
+	LD	C,Z280_MMUBLKMOV	; PDR BLOCK MOVE PORT
+	LD	B,16			; PROGRAM 16 PDRS
+	.DB	$ED,$93			; OTIRW
+;
+	; ENABLE MMU (SYSTEM AND USER TRANSLATION)
+	LD	C,Z280_MMUMCR		; MMU MASTER CONTROL REGISTER
+	LD	HL,$BBFF		; ENABLE USER & SYSTEM TRANSLATE
+	.DB	$ED,$BF			; OUTW (C),HL
+; 	
+	; RESTORE I/O PAGE TO $00
+	LD	L,$00			; NORMAL I/O REG IS $00
+	LD	C,$08			; REG C POINTS TO I/O PAGE REGISTER
+	.DB	$ED,$6E			; LDCTL	(C),HL
+;;
+;	; COPY Z280 BANK SELECTION CODE TO $FD80
+;	LD	HL,Z280_BNKSEL		; SOURCE
+;	LD	DE,$FD80		; DESTINATION
+;	LD	BC,Z280_BNKSELZ-Z280_BNKSEL ; BYTE COUNT TO COPY
+;	LDIR				; COPY
+;
+
+	; CONFIGURE Z280 INT/TRAP VECTOR TABLE POINTER REGISTER
+	LD	C,Z280_VPR
+	LD	HL,$0010		; TOP 16 BITS OF PHYSICAL ADR OF IVT
+	.DB	$ED,$6E			; LDCTL	(C),HL
+
+	;; TEST SYSTEM CALL
+	;.DB	$ED,$71			; SC
+	;.DW	Z280_BNKSEL		; SC PARAMETER
+	;
+	;LD	A,%10101010
+	;OUT	(DIAGPORT),A
+	;DI
+	;HALT
+
+	JR	Z280_INITZ		; JUMP TO CODE CONTINUATION
+;
+Z280_PDRTBL:
+	; LOWER 32 K (BANKED)
+	.DW	($000 << 4) | $A
+	.DW	($001 << 4) | $A
+	.DW	($002 << 4) | $A
+	.DW	($003 << 4) | $A
+	.DW	($004 << 4) | $A
+	.DW	($005 << 4) | $A
+	.DW	($006 << 4) | $A
+	.DW	($007 << 4) | $A
+	; UPPER 32 K (COMMON)
+	.DW	($0F8 << 4) | $A
+	.DW	($0F9 << 4) | $A
+	.DW	($0FA << 4) | $A
+	.DW	($0FB << 4) | $A
+	.DW	($0FC << 4) | $A
+	.DW	($0FD << 4) | $A
+	.DW	($0FE << 4) | $A
+	.DW	($0FF << 4) | $A
+;
+Z280_PRIVINST:
+	EX	(SP),HL			; GET MSR, SAVE HL
+	LD	(HB_MSRSAV),HL		; SAVE IT
+	POP	HL			; RECOVER HL, POP STACK
+	EX	(SP),HL			; GET ADR, SAVE HL
+	
+	PUSH	AF
+	PUSH	BC
+	PUSH	DE
+	
+	LD	A,(HL)
+	INC	HL			; BUMP PAST PRIV INST
+	
+	; HANDLE DI
+	CP	$F3			; DI?
+	JR	NZ,Z280_PRIVINST2
+	DI				; DO THE DI
+	JR	Z280_PRIVINSTX
+
+Z280_PRIVINST2:
+	; HANDLE EI
+	CP	$FB			; EI?
+	JR	NZ,Z280_PRIVINST_HALT
+	EI				; DO THE EI
+	JR	Z280_PRIVINSTX
+
+Z280_PRIVINST_HALT:
+	; SOMETHING ELSE, DIAGNOSE & HALT SYSTEM
+	
+	CALL	NEWLINE
+	LD	DE,Z280_PRIVSTR
+	CALL	WRITESTR
+	CALL	PRTHEXWORDHL
+	
+	DI
+	HALT
+
+Z280_PRIVINSTX:	
+	POP	DE
+	POP	BC
+	POP	AF
+	
+	EX	(SP),HL			; RECOVER HL, ADR TO STK
+	PUSH	HL			; SAVE HL
+	LD	HL,(HB_MSRSAV)		; GET SAVED MSR
+	EX	(SP),HL			; MSR TO STK, RECOVER HL
+	.DB	$ED,$55			; RETIL
+;
+HB_MSRSAV	.DW	0
+;
+Z280_PRIVSTR	.TEXT	"\n\n*** Privileged Instruction @$"
+;
+Z280_INITZ:
+;
+  #ENDIF 
+;	
 #ENDIF
 ;
 #IF (CPUFAM == CPU_Z180)
@@ -1270,25 +1524,21 @@ HB_CPU2:
 #IF (CPUFAM == CPU_Z280)
 ;
 	LD	C,Z280_BTCR		; BUS TIMING AND CONTROL REG
-	;LDCTL	HL,(C)			; GET IT
-	.DB	$ED,$66
+	.DB	$ED,$66			; LDCTL	HL,(C)
 	LD	A,L			; PUT IN A
 	AND	%00111100		; CLEAR DC AND I/O FIELDS
 	OR	Z280_INTWAIT << 6	; SET INT ACK WAIT STATES
 	OR	Z280_IOWAIT		; SET I/O WAIT STATES
 	LD	L,A			; BACK TO L
-	;LDCTL	(C),HL			; SET IT
-	.DB	$ED,$6E
+	.DB	$ED,$6E			; LDCTL	(C),HL
 ;
 	LD	C,Z280_BTIR		; BUS TIMING AND INIT REG
-	;LDCTL	HL,(C)			; GET IT
-	.DB	$ED,$66
+	.DB	$ED,$66			; LDCTL	HL,(C)
 	LD	A,L			; PUT IN A
 	AND	%11110011		; CLEAR DC AND I/O FIELDS
 	OR	Z280_MEMWAIT << 2	; SET LOW MEM WAIT STATES
 	LD	L,A			; BACK TO L
-	;LDCTL	(C),HL			; SET IT
-	.DB	$ED,$6E
+	.DB	$ED,$6E			; LDCTL	(C),HL
 ;
 #ENDIF
 ;
@@ -1306,6 +1556,17 @@ HB_CPU2:
 	IM	2			; SWITCH TO INT MODE 2
 #ENDIF
 ;
+#IF (INTMODE == 3)
+;
+	; SETUP Z280 INT A FOR VECTORED INTERRUPTS
+	LD	HL,%0010000000000000
+	LD	C,Z280_ISR
+	.DB	$ED,$6E			; LDCTL (C),HL
+;
+	.DB	$ED,$4E			; IM 3
+;
+#ENDIF
+;
 #IF (PLATFORM == PLT_SBC)
 ;
   #IF (HTIMENABLE)			; SIMH TIMER
@@ -1555,8 +1816,7 @@ HB_SPDTST:
 	CALL	PRTSTRD
 	.TEXT	", BUS @ $"
 	LD	C,Z280_BTIR		; BUS TIMING AND CTL REG
-	;LDCTL	HL,(C)			; GET IT
-	.DB	$ED,$66
+	.DB	$ED,$66			; LDCTL	HL,(C)
 	LD	A,L			; MOVE TO A
 	AND	%00000011		; ISOLATE CS FIELD
 	LD	HL,(CB_CPUKHZ)		; GET CPU SPEED
@@ -1634,26 +1894,22 @@ HB_Z280BUS1:
 	PRTS("Z280: $")
 	PRTS("MSR=$")
 	LD	C,Z280_MSR		; MASTER STATUS REGISTER
-	;LDTCL	HL,(C)			; GET VALUE
-	.DB	$ED,$66
+	.DB	$ED,$66			; LDCTL	HL,(C)
 	CALL	PRTHEXWORDHL
 	CALL	PC_SPACE
 	PRTS("BTCR=$")
 	LD	C,Z280_BTCR		; BUS TIMING AND CONTROL REGISTER
-	;LDTCL	HL,(C)			; GET VALUE
-	.DB	$ED,$66
+	.DB	$ED,$66			; LDTCL	HL,(C)
 	CALL	PRTHEXWORDHL
 	CALL	PC_SPACE
 	PRTS("BTIR=$")
 	LD	C,Z280_BTIR		; BUS TIMING AND CONTROL REGISTER
-	;LDTCL	HL,(C)			; GET VALUE
-	.DB	$ED,$66
+	.DB	$ED,$66			; LDTCL	HL,(C)
 	CALL	PRTHEXWORDHL
 	CALL	PC_SPACE
 	PRTS("CCR=$")
 	LD	C,Z280_CCR		; CACHE CONTROL REGISTER
-	;LDTCL	HL,(C)			; GET VALUE
-	.DB	$ED,$66
+	.DB	$ED,$66			; LDTCL	HL,(C)
 	CALL	PRTHEXWORDHL
 #ENDIF
 ;
@@ -1726,6 +1982,63 @@ IS_REC_M1:
 #ENDIF
 ;
 INITSYS3:
+;
+#IF (MEMMGR == MM_Z280)
+	; LEAVE SYSTEM MODE STACK POINTING TO AN OK PLACE
+	LD	SP,HB_STACK - $40	; *** FIX ***
+	
+	HB_DI
+
+	; FIXUP BNKSEL TO WORK ON USER MODE PDRS
+	XOR	A
+	LD	(W_MMU0+1),A
+	LD	(W_MMU1+1),A
+
+	;DIAG(%10000001)
+	;DI
+	;HALT
+
+	; MAKE USER MODE BANK CORRECT
+	LD	A,(HB_CURBNK)		; GET CURRENT BANK
+	CALL	HBX_BNKSEL
+	
+	;DIAG(%10000011)
+	;DI
+	;HALT
+	
+	;LD	C,Z280_TCR
+	;.DB	$ED,$66		; LDCTL HL,(C)
+	;LD	A,L
+	;CALL	PC_SPACE
+	;CALL	PRTHEXBYTE
+	
+	LD	HL,HBX_LOC
+	.DB	$ED,$8F		; LDCTL	USP,HL
+
+	;DIAG(%10000111)
+	;DI
+	;HALT
+
+	HB_EI
+
+	; SWITCH TO USER MODE NOW
+	LD	C,Z280_MSR
+	LD	HL,$407F
+	.DB	$ED,$6E			; LDCTL	(C),HL
+	;LD	A,%10001111
+	;OUT	(DIAGPORT),A
+	
+	;DI
+	;HALT
+	LD	SP,HBX_LOC		; SETUP INITIAL STACK JUST BELOW HBIOS PROXY
+	
+	;DIAG(%10001111)
+	;CALL	LDELAY
+	
+	;DIAG(%10011111)
+	;CALL	LDELAY
+	
+#ENDIF
 ;
 	CALL	PRTSUM			; PRINT UNIT/DEVICE SUMMARY TABLE
 ;
@@ -1975,6 +2288,11 @@ IDLE:
 ;
 HB_DISPATCH:
 ;
+#IF (MEMMGR == MM_Z280)
+	HB_EI
+#ENDIF
+;
+;
 #IF 0	; *DEBUG* START
 ;
 	CALL	HB_DISPATCH1	; DO THE WORK
@@ -2953,10 +3271,8 @@ SYS_PEEK:
 #IF (INTMODE == 1)
   #IF (CPUFAM == CPU_Z280)
 	PUSH	IY
-	;LD	C,$00
 	LD	C,Z280_MSR
-	;LDCTL	IY,(C)
-	.DB	$FD,$ED,$66
+	.DB	$FD,$ED,$66		; LDCTL	IY,(C)
 	PUSH	IY
 	DI
   #ELSE
@@ -2968,11 +3284,9 @@ SYS_PEEK:
 	CALL	HBX_PEEK		; IMPLEMENTED IN PROXY
 #IF (INTMODE == 1)
   #IF (CPUFAM == CPU_Z280)
-	;LD	C,$00
 	LD	C,Z280_MSR
 	POP	IY
-	;LDCTL	(C),IY
-	.DB	$FD,$ED,$6E
+	.DB	$FD,$ED,$6E		; LDCTL	(C),IY
 	POP	IY
   #ELSE
 	POP	AF
@@ -2995,8 +3309,7 @@ SYS_POKE:
   #IF (CPUFAM == CPU_Z280)
 	PUSH	IY
 	LD	C,Z280_MSR
-	;LDCTL	IY,(C)
-	.DB	$FD,$ED,$66
+	.DB	$FD,$ED,$66		; LDCTL	IY,(C)
 	PUSH	IY
 	DI
   #ELSE
@@ -3010,8 +3323,7 @@ SYS_POKE:
   #IF (CPUFAM == CPU_Z280)
 	LD	C,Z280_MSR
 	POP	IY
-	;LDCTL	(C),IY
-	.DB	$FD,$ED,$6E
+	.DB	$FD,$ED,$6E		; LDCTL	(C),IY
 	POP	IY
   #ELSE
 	POP	AF
@@ -3415,6 +3727,46 @@ HB_TMPSZ	.DW	0
 HB_TMPREF	.DW	0
 ;
 ;==================================================================================================
+;   Z280 INTERRUPT VECTOR TABLE
+;==================================================================================================
+;
+#IF (MEMMGR = MM_Z280)
+;
+	.FILL	$1000 - ($ & $FFF)	; MUST BE 4K ALIGNED!
+;
+Z280_IVT:
+	.DW	0, 0			; RESERVED
+	.DW	0			; NMI MSR
+	.DW	0			; NMI VECTOR
+	.DW	$0000			; INT A MSR
+	.DW	0			; INT A VECTOR
+	.FILL	$50 - ($ - Z280_IVT),0	; SKIP TO SYS CALL TRAP VECTOR
+	.DW	$0000			; SYS CALL, NEW MSR
+	.DW	Z280_SYSCALL		; SYS CALL, VECTOR ADR
+	.DW	$0000			; PRIV INST TRAP, NEW MSR
+	.DW	Z280_PRIVINST		; PRIV INST, VECTOR ADR
+	.FILL	$70 - ($ - Z280_IVT),0	; SKIP TO START OF NMI/INTA VECTORS
+	.DW	HBX_IV00
+	.DW	HBX_IV01
+	.DW	HBX_IV02
+	.DW	HBX_IV03
+	.DW	HBX_IV04
+	.DW	HBX_IV05
+	.DW	HBX_IV06
+	.DW	HBX_IV07
+	.DW	HBX_IV08
+	.DW	HBX_IV09
+	.DW	HBX_IV0A
+	.DW	HBX_IV0B
+	.DW	HBX_IV0C
+	.DW	HBX_IV0D
+	.DW	HBX_IV0E
+	.DW	HBX_IV0F
+	.FILL	$370 - ($ - Z280_IVT),0	; FILL REMAINDER OF Z280 IVT
+;
+#ENDIF
+;
+;==================================================================================================
 ;   DEVICE DRIVERS
 ;==================================================================================================
 ;

Source/HBIOS/romldr.asm

@@ -571,13 +571,9 @@ reboot:
 	call	DSKY_SHOWSEG		; display message
 #endif
 ;
-	;; switch to rom bank 0 and jump to address 0
-	;ld	a,BID_BOOT		; boot bank
-	;ld	ix,0			; address zero
-	;call	HB_BNKCALL		; does not return
 	; cold boot system
-	LD	B,BF_SYSRESET		; SYSTEM RESTART
-	LD	C,BF_SYSRES_COLD	; COLD START
+	ld	b,BF_SYSRESET		; system restart
+	ld	c,BF_SYSRES_COLD	; cold start
 	rst	08			; do it, no return
 #endif
 ;

Source/HBIOS/sio.asm

@@ -30,7 +30,7 @@ SIO_WR1VAL	.EQU	$00		; WR1 VALUE FOR NO INTS
 SIO_WR1VAL	.EQU	$18		; WR1 VALUE FOR INT ON RECEIVED CHARS
 #ENDIF
 ;
-#IF (INTMODE == 2)
+#IF ((INTMODE == 2) | (INTMODE == 3))
 ;
 SIO0_IVT	.EQU	IVT(INT_SIO0)
 SIO1_IVT	.EQU	IVT(INT_SIO1)
@@ -144,7 +144,7 @@ SIO_PREINIT2:
 	CALL	HB_ADDIM1		; ADD TO IM1 CALL LIST
   #ENDIF
 ;
-  #IF (INTMODE == 2)
+  #IF ((INTMODE == 2) | (INTMODE == 3))
 	; SETUP IM2 VECTORS
 	LD	HL,SIO_INT0
 	LD	(SIO0_IVT),HL		; IVT INDEX
@@ -831,7 +831,7 @@ SIO_INITGO:
 ;
 ; SET INTERRUPT VECTOR OFFSET WR2
 ;
-#IF (INTMODE == 2)
+#IF ((INTMODE == 2) | (INTMODE == 3))
 	LD	A,(IY+2)		; CHIP / CHANNEL
 	SRL	A			; SHIFT AWAY CHANNEL BIT
 	LD	L,SIO0_VEC		; ASSUME CHIP 0

Source/HBIOS/std.asm

@@ -443,7 +443,8 @@ BID_COM		.EQU	BID_RAMN	; COMMON BANK, UPPER 32K
 ;
 SYS_SIZ		.EQU	$3000			; COMBINED SIZE OF SYSTEM AREA (OS + HBIOS PROXY)
 HBBUF_SIZ	.EQU	1024			; INVARIANT HBIOS PHYSICAL DISK BUFFER, 1K
-HBX_SIZ		.EQU	$200			; HBIOS PROXY SIZE (SUBJECT TO CHANGE)
+;HBX_SIZ	.EQU	$200			; HBIOS PROXY SIZE (SUBJECT TO CHANGE)
+HBX_SIZ		.EQU	$200 + $80		; HBIOS PROXY SIZE (TEMP)
 CPM_SIZ		.EQU	SYS_SIZ - HBX_SIZ	; NET SIZE OF ALL OS COMPONENTS (EXCLUDING HBIOS PROXY)
 CCP_SIZ		.EQU	$800			; INVARIANT SIZE OF CCP
 BDOS_SIZ	.EQU	$E00			; INVARIANT SIZE OF BDOS
@@ -468,7 +469,7 @@ CPM_ENT		.EQU	CBIOS_LOC		; CPM ENTRY POINT (IN CBIOS)
 LDR_SIZ		.EQU	$0E00
 
 MON_LOC		.EQU	$F000			; LOCATION OF MONITOR FOR RUNNING SYSTEM
-MON_SIZ		.EQU	$0E00			; SIZE OF MONITOR BINARY IMAGE
+MON_SIZ		.EQU	$1000 - HBX_SIZ		; SIZE OF MONITOR BINARY IMAGE
 MON_END		.EQU	MON_LOC + MON_SIZ	; END OF MONITOR
 
 BAS_LOC		.EQU	$0200			; NASCOM BASIC
@@ -500,9 +501,9 @@ MON_SERIAL	.EQU	MON_LOC + (1 * 3)	; MONITOR ENTRY (SERIAL PORT)
 ;
 ; INTERRUPT MODE 2 SLOT ASSIGNMENTS
 ;
-#IF (INTMODE == 2)
+#IF ((INTMODE == 2) | (INTMODE == 3))
 
-  #IF (CPUFAM == CPU_Z180)
+  #IF ((CPUFAM == CPU_Z180) | (CPUFAM == CPU_Z280))
 
 ; Z180-BASED SYSTEMS
 

Source/HBIOS/z280.inc

@@ -1,5 +1,5 @@
 ;
-; Z280 REGISTERS
+; Z280 CPU CONTROL REGISTERS (VIA LDCTL)
 ;
 Z280_MSR	.EQU	$00	; MASTER STATUS REG
 Z280_ISR	.EQU	$16	; INTERRUPT STATUS REG
@@ -11,3 +11,11 @@ Z280_SLR	.EQU	$04	; STACK LIMIT REG
 Z280_TCR	.EQU	$10	; TRAP CONTROL REG
 Z280_CCR	.EQU	$12	; CACHE CONTROL REG
 Z280_LAR	.EQU	$14	; LOCAL ADDRESS REG
+;
+; Z280 MMU REGISTERS (I/O PAGE $FF, I/O ADDRESS $FF**NN)
+;
+Z280_MMUMCR	.EQU	$F0	; Z280 MMU MASTER CONTROL REG
+Z280_MMUPDRPTR	.EQU	$F1	; Z280 MMU PDR POINTER REG
+Z280_MMUINV	.EQU	$F2	; Z280 MMU INVALIDATION PORT
+Z280_MMUBLKMOV	.EQU	$F4	; Z280 MMU BLOCK MOVE PORT
+Z280_MMUPDR	.EQU	$F5	; Z280 MMU PDR PORT

Source/ver.inc

@@ -2,4 +2,4 @@
 #DEFINE	RMN	1
 #DEFINE	RUP	1
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.1.1-pre.28"
+#DEFINE BIOSVER	"3.1.1-pre.29"

Source/ver.lib

@@ -3,5 +3,5 @@ rmn	equ	1
 rup	equ	1
 rtp	equ	0
 biosver	macro
-	db	"3.1.1-pre.28"
+	db	"3.1.1-pre.29"
 	endm