Browse Source

Merge pull request #178 from wwarthen/dev

Dev
pull/198/head
b1ackmai1er 5 years ago
committed by GitHub
parent
commit
fdae83e0a2
No known key found for this signature in database GPG Key ID: 4AEE18F83AFDEB23
  1. 3
      Doc/ChangeLog.txt
  2. 13
      Source/BPBIOS/diskdefs
  3. 63
      Source/CBIOS/cbios.asm
  4. 138
      Source/CPM3/boot.z80
  5. 49
      Source/HBIOS/Build.ps1
  6. 68
      Source/HBIOS/Build.sh
  7. 2
      Source/HBIOS/Config/RCZ280_nat_zz.asm
  8. 44
      Source/HBIOS/Config/RCZ280_nat_zzr.asm
  9. 2
      Source/HBIOS/Makefile
  10. 4
      Source/HBIOS/cfg_dyno.asm
  11. 4
      Source/HBIOS/cfg_ezz80.asm
  12. 8
      Source/HBIOS/cfg_master.asm
  13. 4
      Source/HBIOS/cfg_mk4.asm
  14. 4
      Source/HBIOS/cfg_n8.asm
  15. 4
      Source/HBIOS/cfg_rcz180.asm
  16. 4
      Source/HBIOS/cfg_rcz280.asm
  17. 4
      Source/HBIOS/cfg_rcz80.asm
  18. 4
      Source/HBIOS/cfg_sbc.asm
  19. 4
      Source/HBIOS/cfg_scz180.asm
  20. 2
      Source/HBIOS/cfg_una.asm
  21. 4
      Source/HBIOS/cfg_zeta.asm
  22. 4
      Source/HBIOS/cfg_zeta2.asm
  23. 13
      Source/HBIOS/diskdefs
  24. 6
      Source/HBIOS/game.asm
  25. 48
      Source/HBIOS/hbios.asm
  26. 58
      Source/HBIOS/md.asm
  27. 10
      Source/HBIOS/std.asm
  28. 13
      Source/HBIOS/usrrom.asm
  29. 13
      Source/Images/diskdefs
  30. BIN
      Source/Images/hd1024_prefix.dat
  31. BIN
      Source/RomDsk/ROM_256KB/ASM.COM
  32. BIN
      Source/RomDsk/ROM_256KB/CLRDIR.COM
  33. BIN
      Source/RomDsk/ROM_256KB/DDT.COM
  34. BIN
      Source/RomDsk/ROM_256KB/DDTZ.COM
  35. BIN
      Source/RomDsk/ROM_256KB/DUMP.COM
  36. BIN
      Source/RomDsk/ROM_256KB/ED.COM
  37. BIN
      Source/RomDsk/ROM_256KB/FLASH.COM
  38. BIN
      Source/RomDsk/ROM_256KB/LOAD.COM
  39. BIN
      Source/RomDsk/ROM_256KB/PIP.COM
  40. BIN
      Source/RomDsk/ROM_256KB/RELOG.COM
  41. BIN
      Source/RomDsk/ROM_256KB/STAT.COM
  42. BIN
      Source/RomDsk/ROM_256KB/SUBMIT.COM
  43. BIN
      Source/RomDsk/ROM_256KB/XSUB.COM
  44. 10
      Source/ZRC/ZRC Disk Layout.txt
  45. BIN
      Source/ZRC/zrc_ptbl.bin
  46. 2
      Source/ver.inc
  47. 2
      Source/ver.lib
  48. 13
      Tools/cpmtools/diskdefs

3
Doc/ChangeLog.txt

@ -19,6 +19,9 @@ Version 3.1.1
- WBW: Add support Z80-512K (watchdog and LED) - WBW: Add support Z80-512K (watchdog and LED)
- WBW: Add support for ZZ80MB address map - WBW: Add support for ZZ80MB address map
- PLS: Add support for Z180 invalid opcode trap - PLS: Add support for Z180 invalid opcode trap
- WBW: Add support for ZZRCC
- WBW: Allow selection of RAM/ROM disk individually in build
- WBW: Support 256KB ROM size
Version 3.1 Version 3.1
----------- -----------

13
Source/BPBIOS/diskdefs

@ -271,6 +271,19 @@ diskdef interak
os 2.2 os 2.2
end end
# RomWBW 256KB ROM (128KB reserved, 128KB ROM Disk)
diskdef wbw_rom256
seclen 512
tracks 4
sectrk 64
blocksize 2048
maxdir 256
skew 0
boottrk 0
os 2.2
end
# RomWBW 512KB ROM (128KB reserved, 384KB ROM Disk) # RomWBW 512KB ROM (128KB reserved, 384KB ROM Disk)
diskdef wbw_rom512 diskdef wbw_rom512

63
Source/CBIOS/cbios.asm

@ -2166,6 +2166,37 @@ INIT2:
CALL MD_INIT ; INITIALIZE MEMORY DISK DRIVER (RAM/ROM) CALL MD_INIT ; INITIALIZE MEMORY DISK DRIVER (RAM/ROM)
CALL DRV_INIT ; INITIALIZE DRIVE MAP CALL DRV_INIT ; INITIALIZE DRIVE MAP
CALL DPH_INIT ; INITIALIZE DPH TABLE AND BUFFERS CALL DPH_INIT ; INITIALIZE DPH TABLE AND BUFFERS
;
; SET THE DEFAULT DRIVE
XOR A ; ZERO ACCUM
LD (DEFDRIVE),A ; SET DEFAULT DRIVE TO A: TO START
;
#IFDEF PLTWBW
;
; IF WE HAVE MULTIPLE DRIVES AND THE FIRST DRIVE IS RAM DRIVE
; THEN MAKE OUR DEFAULT STARTUP DRIVE THE SECOND DRIVE (B:)
LD HL,(DRVMAPADR) ; POINT TO DRIVE MAP
DEC HL ; BUMP BACK TO DRIVE COUNT
LD A,(HL) ; GET IT
CP 2 ; COMPARE TO 2
JR C,INIT2X ; IF LESS THAN 2, THEN DONE
;
LD B,BF_DIODEVICE ; HBIOS FUNC: REPORT DEVICE INFO
INC HL ; POINT TO UNIT FIELD
LD C,(HL) ; ... OF FIRST DRIVE
RST 08 ; CALL HBIOS
LD A,D ; DEVICE TYPE TO A
CP DIODEV_MD ; MEMORY DISK DEVICE?
JR NZ,INIT2X ; IF NOT, THEN DONE
LD A,C ; GET ATTRIBUTES
CP %00101000 ; TYPE = RAM?
JR NZ,INIT2X ; IF NOT THEN DONE
LD A,1 ; USE SECOND DRIVE AS DEFAULT
LD (DEFDRIVE),A ; RECORD DEFAULT DRIVE
;
INIT2X:
;
#ENDIF
; ;
#IFDEF PLTUNA #IFDEF PLTUNA
; USE A DEDICATED BUFFER FOR UNA PHYSICAL DISK I/O ; USE A DEDICATED BUFFER FOR UNA PHYSICAL DISK I/O
@ -2419,7 +2450,7 @@ MD_INIT4:
LD BC,$01FB ; UNA FUNC = SET BANK LD BC,$01FB ; UNA FUNC = SET BANK
LD DE,(BNKRAMD) ; FIRST BANK OF RAM DISK LD DE,(BNKRAMD) ; FIRST BANK OF RAM DISK
CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE) CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE)
;
#IF (CLRRAMDISK == CLR_AUTO) #IF (CLRRAMDISK == CLR_AUTO)
; CHECK FIRST 32 DIRECTORY ENTRIES. IF ANY START WITH AN INVALID ; CHECK FIRST 32 DIRECTORY ENTRIES. IF ANY START WITH AN INVALID
; VALUE, INIT THE RAM DISK. VALID ENTRIES ARE E5 (EMPTY ENTRY) OR ; VALUE, INIT THE RAM DISK. VALID ENTRIES ARE E5 (EMPTY ENTRY) OR
@ -2444,15 +2475,15 @@ CLRRAM2:
LD BC,$01FB ; UNA FUNC = SET BANK LD BC,$01FB ; UNA FUNC = SET BANK
LD DE,(BNKUSER) ; SWITCH BACK TO EXEC BANK FOR WRITESTR LD DE,(BNKUSER) ; SWITCH BACK TO EXEC BANK FOR WRITESTR
CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE) CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE)
;
CALL NEWLINE2 ; FORMATTING CALL NEWLINE2 ; FORMATTING
LD DE,STR_INITRAMDISK ; RAM DISK INIT MESSAGE LD DE,STR_INITRAMDISK ; RAM DISK INIT MESSAGE
CALL WRITESTR ; DISPLAY IT CALL WRITESTR ; DISPLAY IT
;
LD BC,$01FB ; UNA FUNC = SET BANK LD BC,$01FB ; UNA FUNC = SET BANK
LD DE,(BNKRAMD) ; FIRST BANK OF RAM DISK LD DE,(BNKRAMD) ; FIRST BANK OF RAM DISK
CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE) CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE)
;
LD HL,0 ; SOURCE ADR FOR FILL LD HL,0 ; SOURCE ADR FOR FILL
LD BC,$2000 ; LENGTH OF FILL IS 8K LD BC,$2000 ; LENGTH OF FILL IS 8K
LD A,$E5 ; FILL VALUE LD A,$E5 ; FILL VALUE
@ -2462,17 +2493,19 @@ CLRRAM3:
LD DE,(BNKUSER) ; SWITCH BACK TO EXEC BANK LD DE,(BNKUSER) ; SWITCH BACK TO EXEC BANK
CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE) CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE)
EI ; RESUME INTERRUPTS EI ; RESUME INTERRUPTS
;
#ENDIF #ENDIF
;
#ELSE #ELSE
; ;
; INITIALIZE RAM DISK BY FILLING DIRECTORY WITH 'E5' BYTES ; INITIALIZE RAM DISK BY FILLING DIRECTORY WITH 'E5' BYTES
; FILL FIRST 8K OF RAM DISK TRACK 1 WITH 'E5' ; FILL FIRST 8K OF RAM DISK TRACK 1 WITH 'E5'
; ;
#IF (CLRRAMDISK != CLR_NEVER) #IF (CLRRAMDISK != CLR_NEVER)
DI ; NO INTERRUPTS
LD A,(BNKRAMD) ; FIRST BANK OF RAM DISK LD A,(BNKRAMD) ; FIRST BANK OF RAM DISK
CP $FF ; $FF SIGNIFIES NO RAM DISK
RET Z ; BAIL OUT IF NO RAM DISK
DI ; NO INTERRUPTS
CALL HB_BNKSEL ; SELECT BANK CALL HB_BNKSEL ; SELECT BANK
#IF (CLRRAMDISK == CLR_AUTO) #IF (CLRRAMDISK == CLR_AUTO)
@ -2679,14 +2712,14 @@ DRV_INIT:
; GET BOOT UNIT/SLICE INFO ; GET BOOT UNIT/SLICE INFO
LD DE,(HCB + HCB_BOOTVOL) ; BOOT VOLUME (UNIT, SLICE) LD DE,(HCB + HCB_BOOTVOL) ; BOOT VOLUME (UNIT, SLICE)
LD (BOOTVOL),DE ; D -> UNIT, E -> SLICE LD (BOOTVOL),DE ; D -> UNIT, E -> SLICE
;
; INIT DEFAULT
LD A,D ; BOOT UNIT?
CP 1 ; IF ROM BOOT, DEF DRIVE SHOULD BE B:
JR Z,DRV_INIT1 ; ... SO LEAVE AS IS AND SKIP AHEAD
XOR A ; ELSE FORCE TO DRIVE A:
DRV_INIT1:
LD (DEFDRIVE),A ; STORE IT
;;
; ; INIT DEFAULT
; LD A,D ; BOOT UNIT?
; CP 1 ; IF ROM BOOT, DEF DRIVE SHOULD BE B:
; JR Z,DRV_INIT1 ; ... SO LEAVE AS IS AND SKIP AHEAD
; XOR A ; ELSE FORCE TO DRIVE A:
;DRV_INIT1:
; LD (DEFDRIVE),A ; STORE IT
; ;
; SETUP THE DRVMAP STRUCTURE ; SETUP THE DRVMAP STRUCTURE
LD HL,(HEAPTOP) ; GET CURRENT HEAP TOP LD HL,(HEAPTOP) ; GET CURRENT HEAP TOP

138
Source/CPM3/boot.z80

@ -250,25 +250,6 @@ dinit6:
djnz dinit6 ; loop as needed djnz dinit6 ; loop as needed
ret ret
; ; zero out remaining dph table entries
; ld a,16 ; dph table entries
; sub l ; subtract entries used
; ret z ; return if all entries used
; ld b,a ; save as loop counter
; ld a,l ; current dph to accum
; rlca ; *2 for word entry
; ld hl,@dtbl ; start of dtbl
; call addhla ; hl now points to entry
;
;dinit6a:
; xor a ; zero accum
; ld (hl),a ; zero lsb
; inc hl ; next byte
; ld (hl),a ; zero msb
; inc hl ; next byte
; djnz dinit6a
; ret ; finished
dinit7: ; process a unit (all slices) dinit7: ; process a unit (all slices)
ld e,0 ; initialize slice index ld e,0 ; initialize slice index
ld b,1 ; default loop counter ld b,1 ; default loop counter
@ -518,10 +499,6 @@ time$get:
rst 08 ; do it rst 08 ; do it
ret nz ; bail out on error ret nz ; bail out on error
ld a,(datehack)
or a
jr nz,time$get1
; convert yymmss in time buffer -> cpm3 epoch date offset ; convert yymmss in time buffer -> cpm3 epoch date offset
call date2cpm ; time buf (yr, mon, day) -> SCB (@date) call date2cpm ; time buf (yr, mon, day) -> SCB (@date)
@ -540,24 +517,8 @@ time$set:
; CPM date/time in SCB -> RTC ; CPM date/time in SCB -> RTC
; convert CPM3 epoch date offset in SCB -> yymmss in time buffer ; convert CPM3 epoch date offset in SCB -> yymmss in time buffer
;call cpm2date ; SCB (@date) -> time buf (yr, mon, day)
call cpm2date ; SCB (@date) -> time buf (yr, mon, day)
; this is a temporary hack!!!
; since we cannot actually set the date on the RTC, we
; just read the current RTC date and use that so that we
; don't clobber a potentially good date.
; read time from RTC
ld b,020h ; HBIOS func: get time
ld hl,tim$buf ; time buffer
rst 08 ; do it
ret nz ; bail out on error
;
; now we set a hack active flag so that future time$get
; calls do not update the date field in the SCB
;
ld a,0FFh ; true value
ld (datehack),a ; save it
; copy CPM3 time values from SCB -> time buffer ; copy CPM3 time values from SCB -> time buffer
ld a,(@hour) ; get hour from SCB ld a,(@hour) ; get hour from SCB
ld (tim$hr),a ; ... and put in tim$hr ld (tim$hr),a ; ... and put in tim$hr
@ -565,7 +526,7 @@ time$set:
ld (tim$min),a ; ... and put in tim$min ld (tim$min),a ; ... and put in tim$min
ld a,(@sec) ; get second from SCB ld a,(@sec) ; get second from SCB
ld (tim$sec),a ; ... and put in tim$sec ld (tim$sec),a ; ... and put in tim$sec
; send time to RTC ; send time to RTC
ld b,021h ; HBIOS func: set time ld b,021h ; HBIOS func: set time
ld hl,tim$buf ; ... from time buffer ld hl,tim$buf ; ... from time buffer
@ -577,7 +538,7 @@ date2cpm:
; Convert YYMMSS from time buffer at HL ; Convert YYMMSS from time buffer at HL
; into offset from CPM epoch and store ; into offset from CPM epoch and store
; result in SCB. ; result in SCB.
ld hl,0 ; initialize day counter ld hl,0 ; initialize day counter
; Add in days for elapsed years ; Add in days for elapsed years
ld a,(tim$yr) ; get current year ld a,(tim$yr) ; get current year
@ -638,12 +599,75 @@ cpm2date:
; Convert CPM epoch date offset in SCB ; Convert CPM epoch date offset in SCB
; into YYMMSS values and store result in ; into YYMMSS values and store result in
; time buffer at HL. ; time buffer at HL.
ld a,019h
ld (tim$yr),a
ld a,001h
ld (tim$mon),a
ld a,001h
ld (tim$day),a
; We start by subtracting years keeping a count
; of the number of years. Every fourth year is a leap
; year, so we account for that as we go.
ld hl,(@date) ; get the count of days since epoch
dec hl ; because we want 1/1/78 to be offset 0
ld c,78 ; init the years value
c2d1:
ld de,365 ; normal number of days per year
ld a,c
ld b,0 ; init leap year flag
and 03h ; check for leap year
jr nz,c2d2 ; if not zero, no need to adjust
inc de ; add a day for leap year
ld b,1 ; leap year flag for later
c2d2:
or a ; clear carry
sbc hl,de ; subtract
jr c,c2d3 ; get out if we went too far
inc c ; add a year to year value
ld a,c ; to accum
cp 100 ; century rollover?
jr nz,c2d1 ; nope, loop
ld c,0 ; reset for start of century
jr c2d1 ; loop
c2d3:
ld a,c ; years to accum
call bin2bcd ; convert to bcd
ld (tim$yr),a ; ... and save it
;
; Now we use the days per month table to find the
; month.
add hl,de ; restore days remaining
ld c,0 ; init month value (zero offset)
c2d4:
ld a,c ; get month value
rlca ; times 2 for entry size
push hl ; save hl (days remaining)
ld hl,daysmon ; point to start of table
call addhla ; point to month entry
ld e,(hl) ; get count
inc hl ; recover hl (days remaining)
ld d,(hl) ; de := cum days at end of month
pop hl
ld a,c ; month value to accum
cp 1 ; possible leap month?
jr nz,c2d5 ; no, leave alone
ld a,b ; get leap year flag (set above)
or a ; leap year?
jr z,c2d5 ; if not, skip ahead
inc de ; account for leap year
c2d5:
or a ; clear carry
sbc hl,de ; subtract days for the month
jr c,c2d6 ; get out if we went too far
inc c ; next month
jr c2d4 ; continue
c2d6:
inc c ; switch from 0 to 1 offset
ld a,c ; move to accum
call bin2bcd ; convert to bcd
ld (tim$mon),a ; save it
;
; Leftover days is day value
add hl,de ; restore days remaining
ld a,l ; only need lsb
inc a ; switch from 0 to 1 offset
call bin2bcd ; convert to bcd
ld (tim$day),a ; save it
ret ret
@ -662,6 +686,22 @@ daystbl:
dw 304 ; November dw 304 ; November
dw 334 ; December dw 334 ; December
daysmon:
; days per month (non-leap year)
dw 31 ; January
dw 28 ; February (non-leap)
dw 31 ; March
dw 30 ; April
dw 31 ; May
dw 30 ; June
dw 31 ; July
dw 31 ; August
dw 30 ; September
dw 31 ; October
dw 30 ; November
dw 31 ; December
; RTC time buffer (all values packed bcd) ; RTC time buffer (all values packed bcd)
tim$buf: tim$buf:
tim$yr db 80h tim$yr db 80h
@ -671,8 +711,6 @@ tim$hr db 01h
tim$min db 02h tim$min db 02h
tim$sec db 03h tim$sec db 03h
datehack db 00h
open: open:
ld c,15 ld c,15
jp bdos jp bdos

49
Source/HBIOS/Build.ps1

@ -1,4 +1,4 @@
param([string]$Platform = "", [string]$Config = "", [string]$RomSize = "512", [string]$RomName = "")
param([string]$Platform = "", [string]$Config = "", [int]$RomSize = 512, [string]$RomName = "")
# #
# This PowerShell script performs the heavy lifting in the build of RomWBW. It handles the assembly # This PowerShell script performs the heavy lifting in the build of RomWBW. It handles the assembly
@ -65,8 +65,8 @@ while ($true)
# #
while ($true) while ($true)
{ {
if (($RomSize -eq "512") -or ($RomSize -eq "1024")) {break}
$RomSize = (Read-Host -prompt "ROM Size [512|1024]").Trim()
if (($RomSize -eq 128) -or ($RomSize -eq 256) -or ($RomSize -eq 512) -or ($RomSize -eq 1024)) {break}
$RomSize = (Read-Host -prompt "ROM Size [128|256|512|1024]").Trim()
} }
# #
@ -114,7 +114,11 @@ $UpdFile = "${OutDir}/${RomName}.upd" # Final name of System ROM image
if ($Platform -eq "UNA") {$Bios = 'una'} else {$Bios = 'wbw'} if ($Platform -eq "UNA") {$Bios = 'una'} else {$Bios = 'wbw'}
# List of RomWBW proprietary apps to imbed in ROM disk. # List of RomWBW proprietary apps to imbed in ROM disk.
$RomApps = "assign","fdu","format","mode","rtc","survey","syscopy","sysgen","talk","timer","xm","inttest"
$RomApps = "assign","mode","rtc","syscopy","xm"
if ($RomSize -gt "256")
{
$RomApps += "fdu","format","survey","sysgen","talk","timer","inttest"
}
"" ""
"Building ${RomName} ${ROMSize}KB ROM configuration ${Config} for Z${CPUType}..." "Building ${RomName} ${ROMSize}KB ROM configuration ${Config} for Z${CPUType}..."
@ -211,27 +215,30 @@ if ($Platform -ne "UNA")
# Create a blank ROM disk image to create a working ROM disk image # Create a blank ROM disk image to create a working ROM disk image
Set-Content -Value ([byte[]](0xE5) * (([int]${RomSize} * 1KB) - 128KB)) -Encoding byte -Path $RomDiskFile Set-Content -Value ([byte[]](0xE5) * (([int]${RomSize} * 1KB) - 128KB)) -Encoding byte -Path $RomDiskFile
# Copy all files from the appropriate directory to the working ROM disk image
cpmcp -f $RomFmt $RomDiskFile ../RomDsk/ROM_${RomSize}KB/*.* 0:
# Add any platform specific files to the working ROM disk image
if (Test-Path "../RomDsk/${Platform}/*.*")
if ($RomSize -gt 128)
{ {
cpmcp -f $RomFmt $RomDiskFile ../RomDsk/${Platform}/*.* 0:
}
# Copy all files from the appropriate directory to the working ROM disk image
cpmcp -f $RomFmt $RomDiskFile ../RomDsk/ROM_${RomSize}KB/*.* 0:
# Add the proprietary RomWBW applications to the working ROM disk image
foreach ($App in $RomApps)
{
cpmcp -f $RomFmt $RomDiskFile ../../Binary/Apps/$App.com 0:
}
# Add any platform specific files to the working ROM disk image
if (Test-Path "../RomDsk/${Platform}/*.*")
{
cpmcp -f $RomFmt $RomDiskFile ../RomDsk/${Platform}/*.* 0:
}
# Add the proprietary RomWBW applications to the working ROM disk image
foreach ($App in $RomApps)
{
cpmcp -f $RomFmt $RomDiskFile ../../Binary/Apps/$App.com 0:
}
# Add the CP/M and ZSystem system images to the ROM disk (used by SYSCOPY)
cpmcp -f $RomFmt $RomDiskFile ..\cpm22\cpm_${Bios}.sys 0:cpm.sys
cpmcp -f $RomFmt $RomDiskFile ..\zsdos\zsys_${Bios}.sys 0:zsys.sys
# Add the CP/M and ZSystem system images to the ROM disk (used by SYSCOPY)
cpmcp -f $RomFmt $RomDiskFile ..\cpm22\cpm_${Bios}.sys 0:cpm.sys
cpmcp -f $RomFmt $RomDiskFile ..\zsdos\zsys_${Bios}.sys 0:zsys.sys
# Set all the files in the ROM disk image to read only for extra protection under flash file system.
cpmchattr -f $RomFmt $RomDiskFile r 0:*.*
# Set all the files in the ROM disk image to read only for extra protection under flash file system.
cpmchattr -f $RomFmt $RomDiskFile r 0:*.*
}
# #
# Finally, the individual binary components are concatenated together to produce # Finally, the individual binary components are concatenated together to produce

68
Source/HBIOS/Build.sh

@ -42,7 +42,7 @@ while ! echo ${configs[@]} | grep -s -w -q "$config" ; do
done done
configfile=Config/${platform}_${config}.asm configfile=Config/${platform}_${config}.asm
while [ ! '(' "$romsize" = 1024 -o "$romsize" = 512 ')' ] ; do
while [ ! '(' "$romsize" = 1024 -o "$romsize" = 512 -o "$romsize" = 256 -o "$romsize" = 128 ')' ] ; do
echo -n "Romsize :" echo -n "Romsize :"
read romsize read romsize
done done
@ -58,7 +58,10 @@ else
BIOS=wbw BIOS=wbw
fi fi
Apps=(assign fdu format mode rtc survey syscopy sysgen talk timer xm inttest)
Apps=(assign mode rtc syscopy xm)
if [ $romsize -gt 256 ] ; then
Apps+=(fdu format survey sysgen talk timer inttest)
fi
blankfile=Blank${romsize}KB.dat blankfile=Blank${romsize}KB.dat
romdiskfile=RomDisk.tmp romdiskfile=RomDisk.tmp
@ -113,40 +116,43 @@ fi
echo "Building ${romsize}KB $romname ROM disk data file..." echo "Building ${romsize}KB $romname ROM disk data file..."
cp $blankfile $romdiskfile cp $blankfile $romdiskfile
if [ $romsize -gt 128 ] ; then
echo placing files into $romdiskfile
for file in $(ls -1 ../RomDsk/ROM_${romsize}KB/* | sort -V) ; do
echo " " $file
$CPMCP -f $romfmt $romdiskfile $file 0:
done
if [ -d ../RomDsk/$platform ] ; then
for file in ../RomDsk/$platform/* ; do
echo placing files into $romdiskfile
for file in $(ls -1 ../RomDsk/ROM_${romsize}KB/* | sort -V) ; do
echo " " $file echo " " $file
$CPMCP -f $romfmt $romdiskfile $file 0: $CPMCP -f $romfmt $romdiskfile $file 0:
done done
fi
echo "adding apps to $romdiskfile"
for i in ${Apps[@]} ; do
set +e
f=$(../../Tools/unix/casefn.sh ../../Binary/Apps/$i.com)
set -e
if [ -z "$f" ] ; then
echo " " $i "not found"
else
echo " " $f
$CPMCP -f $romfmt $romdiskfile $f 0:
if [ -d ../RomDsk/$platform ] ; then
for file in ../RomDsk/$platform/* ; do
echo " " $file
$CPMCP -f $romfmt $romdiskfile $file 0:
done
fi fi
done
echo "copying systems to $romdiskfile"
$CPMCP -f $romfmt $romdiskfile ../CPM22/cpm_$BIOS.sys 0:cpm.sys
$CPMCP -f $romfmt $romdiskfile ../ZSDOS/zsys_$BIOS.sys 0:zsys.sys
echo "setting files in the ROM disk image to read only"
$CPMCH -f $romfmt $romdiskfile r 0:*.*
echo "adding apps to $romdiskfile"
for i in ${Apps[@]} ; do
set +e
f=$(../../Tools/unix/casefn.sh ../../Binary/Apps/$i.com)
set -e
if [ -z "$f" ] ; then
echo " " $i "not found"
else
echo " " $f
$CPMCP -f $romfmt $romdiskfile $f 0:
fi
done
echo "copying systems to $romdiskfile"
$CPMCP -f $romfmt $romdiskfile ../CPM22/cpm_$BIOS.sys 0:cpm.sys
$CPMCP -f $romfmt $romdiskfile ../ZSDOS/zsys_$BIOS.sys 0:zsys.sys
echo "setting files in the ROM disk image to read only"
$CPMCH -f $romfmt $romdiskfile r 0:*.*
fi
if [ $platform = UNA ] ; then if [ $platform = UNA ] ; then
cp osimg.bin $outdir/UNA_WBW_SYS.bin cp osimg.bin $outdir/UNA_WBW_SYS.bin

2
Source/HBIOS/Config/RCZ280_nat_zz.asm

@ -22,6 +22,8 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO ; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE). ; DIRECTORIES ABOVE THIS ONE).
; ;
#DEFINE PLATFORM_NAME "ZZ80MB"
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT #DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
; ;
#include "Config/RCZ280_nat.asm" #include "Config/RCZ280_nat.asm"

44
Source/HBIOS/Config/RCZ280_nat_zzr.asm

@ -0,0 +1,44 @@
;
;==================================================================================================
; RC2014 Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY ON ZZRCC)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "ZZRCC"
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "Config/RCZ280_nat.asm"
;
;CPUOSC .SET 29491200 ; CPU OSC FREQ IN MHZ
CPUOSC .SET 24000000 ; CPU OSC FREQ IN MHZ
;
RAMSIZE .SET 384 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .SET 128 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .SET 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
;
RAMLOC .SET 23 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .SET (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
;
MDROM .SET FALSE ; MD: ENABLE ROM DISK
MDRAM .SET TRUE ; MD: ENABLE RAM DISK
;
Z2U0HFC .SET TRUE ; Z2U 0: ENABLE HARDWARE FLOW CONTROL

2
Source/HBIOS/Makefile

@ -15,6 +15,7 @@ else
OBJECTS += RCZ280_ext.rom RCZ280_ext.com RCZ280_ext.upd OBJECTS += RCZ280_ext.rom RCZ280_ext.com RCZ280_ext.upd
OBJECTS += RCZ280_nat.rom RCZ280_nat.com RCZ280_nat.upd OBJECTS += RCZ280_nat.rom RCZ280_nat.com RCZ280_nat.upd
OBJECTS += RCZ280_nat_zz.rom RCZ280_nat_zz.com RCZ280_nat_zz.upd OBJECTS += RCZ280_nat_zz.rom RCZ280_nat_zz.com RCZ280_nat_zz.upd
OBJECTS += RCZ280_nat_zzr.rom RCZ280_nat_zzr.com RCZ280_nat_zzr.upd
OBJECTS += RCZ80_kio.rom RCZ80_kio.com RCZ80_kio.upd OBJECTS += RCZ80_kio.rom RCZ80_kio.com RCZ80_kio.upd
OBJECTS += RCZ80_mt.rom RCZ80_mt.com RCZ80_mt.upd OBJECTS += RCZ80_mt.rom RCZ80_mt.com RCZ80_mt.upd
OBJECTS += RCZ80_duart.rom RCZ80_duart.com RCZ80_duart.upd OBJECTS += RCZ80_duart.rom RCZ80_duart.com RCZ80_duart.upd
@ -53,6 +54,7 @@ DIFFPATH = $(DIFFTO)/Binary
ROMSIZE=512 ROMSIZE=512
N8_std.rom: ROMSIZE=512 N8_std.rom: ROMSIZE=512
RCZ280_nat_zzr.rom: ROMSIZE=256
%.rom: %.rom:
bash Build.sh $(DIFFBUILD) $(shell echo $* | sed 's/_/ /') $(ROMSIZE) bash Build.sh $(DIFFBUILD) $(shell echo $* | sed 's/_/ /') $(ROMSIZE)

4
Source/HBIOS/cfg_dyno.asm

@ -28,6 +28,8 @@ INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
; ;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280] MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@ -107,6 +109,8 @@ TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
; ;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
; ;

4
Source/HBIOS/cfg_ezz80.asm

@ -28,6 +28,8 @@ INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
; ;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280] MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@ -138,6 +140,8 @@ TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
; ;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
; ;

8
Source/HBIOS/cfg_master.asm

@ -25,7 +25,9 @@ INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
; ;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .SET MM_NONE ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_NONE ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY) MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
@ -189,8 +191,10 @@ VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43] VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
; ;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
; ;
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_NONE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC] FDMODE .EQU FDMODE_NONE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]

4
Source/HBIOS/cfg_mk4.asm

@ -28,6 +28,8 @@ INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
; ;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280] MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@ -125,6 +127,8 @@ VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43] VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
; ;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
; ;

4
Source/HBIOS/cfg_n8.asm

@ -28,6 +28,8 @@ INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
; ;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_N8 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280] MEMMGR .EQU MM_N8 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
RAMBIAS .EQU 0 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .EQU 0 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
RAMLOC .EQU 0 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE RAMLOC .EQU 0 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
@ -128,6 +130,8 @@ VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43] VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
; ;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
; ;

4
Source/HBIOS/cfg_rcz180.asm

@ -28,6 +28,8 @@ INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
; ;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280] MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@ -143,6 +145,8 @@ TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
; ;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
; ;

4
Source/HBIOS/cfg_rcz280.asm

@ -28,6 +28,8 @@ INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
; ;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280] MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@ -160,6 +162,8 @@ TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
; ;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
; ;

4
Source/HBIOS/cfg_rcz80.asm

@ -28,6 +28,8 @@ INTMODE .EQU 1 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
; ;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280] MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@ -150,6 +152,8 @@ TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
; ;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
; ;

4
Source/HBIOS/cfg_sbc.asm

@ -28,6 +28,8 @@ INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
; ;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280] MEMMGR .EQU MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY) MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY) MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@ -128,6 +130,8 @@ VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43] VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
; ;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
; ;

4
Source/HBIOS/cfg_scz180.asm

@ -28,6 +28,8 @@ INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
; ;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280] MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@ -138,6 +140,8 @@ TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
; ;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
; ;

2
Source/HBIOS/cfg_una.asm

@ -22,6 +22,8 @@ CPUOSC .EQU 18432000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2 INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
; ;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
; ;
RTCIO .EQU $70 ; RTC LATCH REGISTER ADR RTCIO .EQU $70 ; RTC LATCH REGISTER ADR
; ;

4
Source/HBIOS/cfg_zeta.asm

@ -28,6 +28,8 @@ INTMODE .EQU 0 ; INTERRUPT MODE: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
; ;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280] MEMMGR .EQU MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY) MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY) MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@ -103,6 +105,8 @@ TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
; ;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
; ;

4
Source/HBIOS/cfg_zeta2.asm

@ -28,6 +28,8 @@ INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
; ;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0)
ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280] MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@ -114,6 +116,8 @@ TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
; ;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .EQU TRUE ; MD: ENABLE ROM DISK
MDRAM .EQU TRUE ; MD: ENABLE RAM DISK
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
; ;

13
Source/HBIOS/diskdefs

@ -271,6 +271,19 @@ diskdef interak
os 2.2 os 2.2
end end
# RomWBW 256KB ROM (128KB reserved, 128KB ROM Disk)
diskdef wbw_rom256
seclen 512
tracks 4
sectrk 64
blocksize 2048
maxdir 256
skew 0
boottrk 0
os 2.2
end
# RomWBW 512KB ROM (128KB reserved, 384KB ROM Disk) # RomWBW 512KB ROM (128KB reserved, 384KB ROM Disk)
diskdef wbw_rom512 diskdef wbw_rom512

6
Source/HBIOS/game.asm

@ -1182,10 +1182,12 @@ PRTSTR:
COUT: PUSH AF COUT: PUSH AF
PUSH BC PUSH BC
PUSH DE PUSH DE
PUSH HL
LD B,01H LD B,01H
LD C,0 LD C,0
LD E,A LD E,A
RST 08 RST 08
POP HL
POP DE POP DE
POP BC POP BC
POP AF POP AF
@ -1202,10 +1204,14 @@ COUTE: PUSH AF
; WAIT FOR A CHARACTER FROM THE CONSOLE DEVICE AND RETURN IT IN A ; WAIT FOR A CHARACTER FROM THE CONSOLE DEVICE AND RETURN IT IN A
; ;
CIN: PUSH BC CIN: PUSH BC
PUSH DE
PUSH HL
LD B,00H LD B,00H
LD C,00H LD C,00H
RST 08 RST 08
LD A,E LD A,E
POP HL
POP DE
POP BC POP BC
RET RET

48
Source/HBIOS/hbios.asm

@ -666,6 +666,30 @@ HBX_PPRET:
HBX_PPSP .EQU $ - 2 HBX_PPSP .EQU $ - 2
RET RET
; ;
; SPECIAL ROUTINE IN HIGH MEMORY TO PERFORM A COLD START ON Z280
; THIS REQUIRES US TO REMAP LOW MEMORY, THEN JUMP TO ZERO
;
#IF (MEMMGR == MM_Z280)
;
Z280_RESTART:
DI ; KILL INTERRUPTS
LD SP,HBX_LOC ; STACK IN HIGH MEMORY
;
; COPY Z280 BANK SELECT ROUTINE TO HIGH MEMORY
LD HL,Z280_BNKSEL
LD DE,$8000
LD BC,Z280_BNKSEL_LEN
LDIR
;
; MAKE ROM BOOT BANK ACTIVE IN LOW SYS MEM
LD A,BID_BOOT
LD B,$10 ; FIRST SYS PDR
CALL $8000 ; DO IT
;
; NOW JUST JUMP TO START OF ROM BOOT CODE
JP 0
#ENDIF
;
; PRIVATE STACK AT END OF HBIOS CODE ; PRIVATE STACK AT END OF HBIOS CODE
; OCCUPIES SPACE BEFORE IVT ; OCCUPIES SPACE BEFORE IVT
; ;
@ -2178,6 +2202,9 @@ HB_PCINITTBL:
#IF (ASCIENABLE) #IF (ASCIENABLE)
.DW ASCI_PREINIT .DW ASCI_PREINIT
#ENDIF #ENDIF
#IF (Z2UENABLE)
.DW Z2U_PREINIT
#ENDIF
#IF (UARTENABLE) #IF (UARTENABLE)
.DW UART_PREINIT .DW UART_PREINIT
#ENDIF #ENDIF
@ -2190,9 +2217,6 @@ HB_PCINITTBL:
#IF (ACIAENABLE) #IF (ACIAENABLE)
.DW ACIA_PREINIT .DW ACIA_PREINIT
#ENDIF #ENDIF
#IF (Z2UENABLE)
.DW Z2U_PREINIT
#ENDIF
#IF (PIO_4P | PIO_ZP) #IF (PIO_4P | PIO_ZP)
.DW PIO_PREINIT .DW PIO_PREINIT
#ENDIF #ENDIF
@ -2224,6 +2248,9 @@ HB_INITTBL:
#IF (ASCIENABLE) #IF (ASCIENABLE)
.DW ASCI_INIT .DW ASCI_INIT
#ENDIF #ENDIF
#IF (Z2UENABLE)
.DW Z2U_INIT
#ENDIF
#IF (UARTENABLE) #IF (UARTENABLE)
.DW UART_INIT .DW UART_INIT
#ENDIF #ENDIF
@ -2236,9 +2263,6 @@ HB_INITTBL:
#IF (ACIAENABLE) #IF (ACIAENABLE)
.DW ACIA_INIT .DW ACIA_INIT
#ENDIF #ENDIF
#IF (Z2UENABLE)
.DW Z2U_INIT
#ENDIF
#IF (DSRTCENABLE) #IF (DSRTCENABLE)
.DW DSRTC_INIT .DW DSRTC_INIT
#ENDIF #ENDIF
@ -2944,11 +2968,15 @@ SYS_RESWARM:
; RESTART SYSTEM AS THOUGH POWER HAD JUST BEEN TURNED ON ; RESTART SYSTEM AS THOUGH POWER HAD JUST BEEN TURNED ON
; ;
SYS_RESCOLD: SYS_RESCOLD:
#IF (MEMMGR == MM_Z280)
JP Z280_RESTART
#ELSE
DI DI
LD SP,HBX_LOC ; STACK JUST BELOW HBIOS PROXY LD SP,HBX_LOC ; STACK JUST BELOW HBIOS PROXY
LD A,BID_BOOT ; BOOT BANK LD A,BID_BOOT ; BOOT BANK
LD IX,0 ; ADDRESS ZERO LD IX,0 ; ADDRESS ZERO
CALL HB_BNKCALL ; DOES NOT RETURN CALL HB_BNKCALL ; DOES NOT RETURN
#ENDIF
; ;
; HOOK CALLED WHEN A USERLAND RESET IS INVOKED, TYPICALLY VIA A JUMP ; HOOK CALLED WHEN A USERLAND RESET IS INVOKED, TYPICALLY VIA A JUMP
; TO LOGICAL CPU ADDRESS $0000 ; TO LOGICAL CPU ADDRESS $0000
@ -4193,8 +4221,11 @@ Z280_IVT:
; REG A HAS BANK ID, REG B HAS INITIAL PDR TO PROGRAM ; REG A HAS BANK ID, REG B HAS INITIAL PDR TO PROGRAM
; REGISTERS AF, BC, HL DESTROYED ; REGISTERS AF, BC, HL DESTROYED
; ;
; THIS ROUTINE MAY BE RELOCATED TO RUN IN HIGH MEMORY IN CERTAIN CASES
; LIKE A SYSTEM RESTART. IT MUST BE KEPT ENTIRELY RELOCATABLE.
;
Z280_BNKSEL: Z280_BNKSEL:
; *DEBUG*
;; *DEBUG*
;CALL PC_LBKT ;CALL PC_LBKT
;CALL PRTHEXBYTE ;CALL PRTHEXBYTE
;CALL PC_RBKT ;CALL PC_RBKT
@ -4259,6 +4290,9 @@ Z280_BNKSEL3:
LDCTL (C),HL LDCTL (C),HL
; ;
RET RET
;
Z280_BNKSEL_LEN .EQU $ - Z280_BNKSEL
;
#ENDIF #ENDIF
; ;
; Z280 BANK COPY (CALLED FROM PROXY) ; Z280 BANK COPY (CALLED FROM PROXY)

58
Source/HBIOS/md.asm

@ -12,7 +12,7 @@
; 0x00 MEMORY DISK 0x01 ROM DRIVE %00100000 HD STYLE, NON-REMOVABLE, TYPE-ROM ; 0x00 MEMORY DISK 0x01 ROM DRIVE %00100000 HD STYLE, NON-REMOVABLE, TYPE-ROM
; 0x00 MEMORY DISK 0x01 ROM DRIVE %00111000 HD STYLE, NON-REMOVABLE, TYPE-FLASH ; 0x00 MEMORY DISK 0x01 ROM DRIVE %00111000 HD STYLE, NON-REMOVABLE, TYPE-FLASH
; ;
MD_DEVCNT .EQU 2 ; NUMBER OF MD DEVICES SUPPORTED
;MD_DEVCNT .EQU 2 ; NUMBER OF MD DEVICES SUPPORTED
MD_CFGSIZ .EQU 8 ; SIZE OF CFG TBL ENTRIES MD_CFGSIZ .EQU 8 ; SIZE OF CFG TBL ENTRIES
; ;
MD_DEV .EQU 0 ; OFFSET OF DEVICE NUMBER (BYTE) MD_DEV .EQU 0 ; OFFSET OF DEVICE NUMBER (BYTE)
@ -32,18 +32,25 @@ MD_FVAR .EQU 1 ; FLASH VERIFY AFTER WRITE
; DEVICE CONFIG TABLE (RAM DEVICE FIRST TO MAKE IT ALWAYS FIRST DRIVE) ; DEVICE CONFIG TABLE (RAM DEVICE FIRST TO MAKE IT ALWAYS FIRST DRIVE)
; ;
MD_CFGTBL: MD_CFGTBL:
#IF (MDRAM)
; DEVICE 1 (RAM) ; DEVICE 1 (RAM)
.DB 1 ; DRIVER DEVICE NUMBER .DB 1 ; DRIVER DEVICE NUMBER
.DB 0 ; DEVICE STATUS .DB 0 ; DEVICE STATUS
.DW 0,0 ; CURRENT LBA .DW 0,0 ; CURRENT LBA
.DB MID_MDRAM ; DEVICE MEDIA ID .DB MID_MDRAM ; DEVICE MEDIA ID
.DB MD_ARAM ; DEVICE ATTRIBUTE .DB MD_ARAM ; DEVICE ATTRIBUTE
#ENDIF
;
#IF (MDROM)
; DEVICE 0 (ROM) ; DEVICE 0 (ROM)
.DB 0 ; DEVICE NUMBER .DB 0 ; DEVICE NUMBER
.DB 0 ; DEVICE STATUS .DB 0 ; DEVICE STATUS
.DW 0,0 ; CURRENT LBA .DW 0,0 ; CURRENT LBA
.DB MID_MDROM ; DEVICE MEDIA ID .DB MID_MDROM ; DEVICE MEDIA ID
.DB MD_AROM ; DEVICE ATTRIBUTE .DB MD_AROM ; DEVICE ATTRIBUTE
#ENDIF
;
MD_DEVCNT .EQU ($ - MD_CFGTBL) / MD_CFGSIZ
; ;
#IF ($ - MD_CFGTBL) != (MD_DEVCNT * MD_CFGSIZ) #IF ($ - MD_CFGTBL) != (MD_DEVCNT * MD_CFGSIZ)
.ECHO "*** INVALID MD CONFIG TABLE ***\n" .ECHO "*** INVALID MD CONFIG TABLE ***\n"
@ -59,35 +66,54 @@ MD_INIT:
#ENDIF #ENDIF
CALL NEWLINE ; FORMATTING CALL NEWLINE ; FORMATTING
PRTS("MD: UNITS=2 $")
PRTS("ROMDISK=$")
PRTS("MD: UNITS=$")
LD A,MD_DEVCNT
CALL PRTDECB
;
#IF (MDROM)
PRTS(" ROMDISK=$")
LD HL,ROMSIZE - 128 LD HL,ROMSIZE - 128
CALL PRTDEC CALL PRTDEC
PRTS("KB RAMDISK=$")
PRTS("KB$")
#ENDIF
;
#IF (MDRAM)
PRTS(" RAMDISK=$")
LD HL,RAMSIZE - 256 LD HL,RAMSIZE - 256
CALL PRTDEC CALL PRTDEC
PRTS("KB$") PRTS("KB$")
#ENDIF
; ;
; SETUP THE DIO TABLE ENTRIES ; SETUP THE DIO TABLE ENTRIES
; ;
#IF (MDFFENABLE)
#IF (MDROM & MDFFENABLE)
LD A,(MD_FFSEN) ; IF FLASH LD A,(MD_FFSEN) ; IF FLASH
OR A ; FILESYSTEM OR A ; FILESYSTEM
JR NZ,MD_IN1 ; CAPABLE,
JR NZ,MD_INIT1 ; CAPABLE,
LD A,MD_AFSH ; UPDATE ROM DIO LD A,MD_AFSH ; UPDATE ROM DIO
LD (MD_CFGTBL + MD_CFGSIZ + MD_ATTRIB),A LD (MD_CFGTBL + MD_CFGSIZ + MD_ATTRIB),A
MD_IN1:
MD_INIT1:
#ENDIF #ENDIF
LD BC,MD_FNTBL
;
LD DE,MD_CFGTBL LD DE,MD_CFGTBL
PUSH BC
CALL DIO_ADDENT ; ADD FIRST ENTRY
POP BC
LD DE,MD_CFGTBL + MD_CFGSIZ
CALL DIO_ADDENT ; ADD SECOND ENTRY
XOR A ; INIT SUCCEEDED
RET ; RETURN
;
MD_INIT2:
LD A,(DE) ; FIRST BYTE OF CONFIG
CP $FF ; END OF TABLE?
JR NZ,MD_INIT3 ; IF NOT END OF TABLE, CONTINUE
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
;
MD_INIT3:
LD BC,MD_FNTBL ; BC IS FUNT TBL
PUSH DE ; SAVE CFG PTR
CALL DIO_ADDENT ; ADD DIO TBL ENTRY
POP DE ; RECOVER CFG PTR
EX DE,HL ; CFG PTR TO HL
LD BC,MD_CFGSIZ ; ENTRY SIZ TO BC
ADD HL,BC ; BUMP TO NEXT ENTRY
EX DE,HL ; CFG PTR BACK TO DE
JR MD_INIT2 ; REPEAT
; ;
; ;
; ;

10
Source/HBIOS/std.asm

@ -454,21 +454,19 @@ SYSTIM .SET TM_Z280
; MEMORY BANK CONFIGURATION ; MEMORY BANK CONFIGURATION
; ;
#IF (BIOS == BIOS_UNA) #IF (BIOS == BIOS_UNA)
BID_ROM0 .EQU $0000
BID_RAM0 .EQU $8000
BID_ROM0 .EQU $0000 + (ROM_RESERVE / 32)
BID_RAM0 .EQU $8000 + (RAM_RESERVE / 32)
#ENDIF #ENDIF
; ;
#IF (BIOS == BIOS_WBW) #IF (BIOS == BIOS_WBW)
BID_ROM0 .EQU $00
BID_RAM0 .EQU $80
BID_ROM0 .EQU $00 + (ROM_RESERVE / 32)
BID_RAM0 .EQU $80 + (RAM_RESERVE / 32)
#ENDIF #ENDIF
BID_ROMN .EQU (BID_ROM0 + ((ROMSIZE / 32) - 1)) BID_ROMN .EQU (BID_ROM0 + ((ROMSIZE / 32) - 1))
BID_RAMN .EQU (BID_RAM0 + ((RAMSIZE / 32) - 1)) BID_RAMN .EQU (BID_RAM0 + ((RAMSIZE / 32) - 1))
BID_BOOT .EQU BID_ROM0 ; BOOT BANK BID_BOOT .EQU BID_ROM0 ; BOOT BANK
;BID_BIOSIMG .EQU BID_ROM0 + 1 ; BIOS IMAGE BANK
;BID_OSIMG .EQU BID_ROM0 + 2 ; ROM LOADER AND IMAGES BANK
BID_IMG0 .EQU BID_ROM0 + 1 ; ROM LOADER AND FIRST IMAGES BANK BID_IMG0 .EQU BID_ROM0 + 1 ; ROM LOADER AND FIRST IMAGES BANK
BID_IMG1 .EQU BID_ROM0 + 2 ; SECOND IMAGES BANK BID_IMG1 .EQU BID_ROM0 + 2 ; SECOND IMAGES BANK
BID_FSFAT .EQU BID_ROM0 + 3 ; FAT FILESYSTEM DRIVER BANK BID_FSFAT .EQU BID_ROM0 + 3 ; FAT FILESYSTEM DRIVER BANK

13
Source/HBIOS/usrrom.asm

@ -7,10 +7,12 @@ CR .EQU 0DH
LF .EQU 0AH LF .EQU 0AH
; ;
.ORG USR_LOC .ORG USR_LOC
;
;
LD SP,USR_END
;
LD HL,BOOTMSG ; INTRODUCTION LD HL,BOOTMSG ; INTRODUCTION
CALL PRTSTR CALL PRTSTR
;
CALL CIN ; DO STUFF CALL CIN ; DO STUFF
; ;
LD B,BF_SYSRESET ; SYSTEM RESTART LD B,BF_SYSRESET ; SYSTEM RESTART
@ -40,10 +42,13 @@ PRTSTR: LD A,(HL)
COUT: PUSH AF COUT: PUSH AF
PUSH BC PUSH BC
PUSH DE PUSH DE
PUSH HL
LD B,01H LD B,01H
LD C,0 LD C,0
LD E,A LD E,A
RST 08 RST 08
CALL $FFF0
POP HL
POP DE POP DE
POP BC POP BC
POP AF POP AF
@ -60,10 +65,14 @@ COUTE: PUSH AF
; WAIT FOR A CHARACTER FROM THE CONSOLE DEVICE AND RETURN IT IN A ; WAIT FOR A CHARACTER FROM THE CONSOLE DEVICE AND RETURN IT IN A
; ;
CIN: PUSH BC CIN: PUSH BC
PUSH DE
PUSH HL
LD B,00H LD B,00H
LD C,00H LD C,00H
RST 08 RST 08
LD A,E LD A,E
POP HL
POP DE
POP BC POP BC
RET RET
; ;

13
Source/Images/diskdefs

@ -271,6 +271,19 @@ diskdef interak
os 2.2 os 2.2
end end
# RomWBW 256KB ROM (128KB reserved, 128KB ROM Disk)
diskdef wbw_rom256
seclen 512
tracks 4
sectrk 64
blocksize 2048
maxdir 256
skew 0
boottrk 0
os 2.2
end
# RomWBW 512KB ROM (128KB reserved, 384KB ROM Disk) # RomWBW 512KB ROM (128KB reserved, 384KB ROM Disk)
diskdef wbw_rom512 diskdef wbw_rom512

BIN
Source/Images/hd1024_prefix.dat

Binary file not shown.

BIN
Source/RomDsk/ROM_256KB/ASM.COM

Binary file not shown.

BIN
Source/RomDsk/ROM_256KB/CLRDIR.COM

Binary file not shown.

BIN
Source/RomDsk/ROM_256KB/DDT.COM

Binary file not shown.

BIN
Source/RomDsk/ROM_256KB/DDTZ.COM

Binary file not shown.

BIN
Source/RomDsk/ROM_256KB/DUMP.COM

Binary file not shown.

BIN
Source/RomDsk/ROM_256KB/ED.COM

Binary file not shown.

BIN
Source/RomDsk/ROM_256KB/FLASH.COM

Binary file not shown.

BIN
Source/RomDsk/ROM_256KB/LOAD.COM

Binary file not shown.

BIN
Source/RomDsk/ROM_256KB/PIP.COM

Binary file not shown.

BIN
Source/RomDsk/ROM_256KB/RELOG.COM

Binary file not shown.

BIN
Source/RomDsk/ROM_256KB/STAT.COM

Binary file not shown.

BIN
Source/RomDsk/ROM_256KB/SUBMIT.COM

Binary file not shown.

BIN
Source/RomDsk/ROM_256KB/XSUB.COM

Binary file not shown.

10
Source/ZRC/ZRC Disk Layout.txt

@ -13,4 +13,12 @@ Start Length Description
0x20000 0x04000 Filler 0x20000 0x04000 Filler
0x24000 0x80000 RomWBW 0x24000 0x80000 RomWBW
0xA4000 0x5C000 Filler 0xA4000 0x5C000 Filler
0x100000: Start of slices (partition 0x1E)
0x100000: Start of slices (partition 0x1E)
Notes
-----
- At startup CPLD ROM is mapped to Z80 CPU address space 0x0000-0x003F, CPU begins execution at 0x0000
- CPLD ROM (CF bootstrap mode) reads CF Boot Loader (256B) from start of CF (MBR) to 0xB000 and runs it
- CF Boot Loader reads ZRC Monitor (4KB) from sectors 0xF8-0xFF of CF to 0xB400 and runs it
- ZRC Monitor reads 512KB (RomWBW) from sectors 0x120-0x51F of CF into first 512KB of RAM

BIN
Source/ZRC/zrc_ptbl.bin

Binary file not shown.

2
Source/ver.inc

@ -2,4 +2,4 @@
#DEFINE RMN 1 #DEFINE RMN 1
#DEFINE RUP 1 #DEFINE RUP 1
#DEFINE RTP 0 #DEFINE RTP 0
#DEFINE BIOSVER "3.1.1-pre.55"
#DEFINE BIOSVER "3.1.1-pre.59"

2
Source/ver.lib

@ -3,5 +3,5 @@ rmn equ 1
rup equ 1 rup equ 1
rtp equ 0 rtp equ 0
biosver macro biosver macro
db "3.1.1-pre.55"
db "3.1.1-pre.59"
endm endm

13
Tools/cpmtools/diskdefs

@ -271,6 +271,19 @@ diskdef interak
os 2.2 os 2.2
end end
# RomWBW 256KB ROM (128KB reserved, 128KB ROM Disk)
diskdef wbw_rom256
seclen 512
tracks 4
sectrk 64
blocksize 2048
maxdir 256
skew 0
boottrk 0
os 2.2
end
# RomWBW 512KB ROM (128KB reserved, 384KB ROM Disk) # RomWBW 512KB ROM (128KB reserved, 384KB ROM Disk)
diskdef wbw_rom512 diskdef wbw_rom512

Loading…
Cancel
Save