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Diagnostic LED Refinements

pull/48/head
Wayne Warthen 6 years ago
parent
commit
ff851d36d6
  1. 1
      Source/HBIOS/cfg_ezz80.asm
  2. 1
      Source/HBIOS/cfg_master.asm
  3. 1
      Source/HBIOS/cfg_mk4.asm
  4. 1
      Source/HBIOS/cfg_n8.asm
  5. 1
      Source/HBIOS/cfg_rcz180.asm
  6. 1
      Source/HBIOS/cfg_rcz80.asm
  7. 1
      Source/HBIOS/cfg_sbc.asm
  8. 1
      Source/HBIOS/cfg_sc126.asm
  9. 1
      Source/HBIOS/cfg_zeta.asm
  10. 1
      Source/HBIOS/cfg_zeta2.asm
  11. 9
      Source/HBIOS/hbios.asm
  12. 18
      Source/HBIOS/romldr.asm

1
Source/HBIOS/cfg_ezz80.asm

@ -45,6 +45,7 @@ CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
;

1
Source/HBIOS/cfg_master.asm

@ -63,6 +63,7 @@ CTCBASE .EQU $20 ; CTC BASE I/O ADDRESS
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
;

1
Source/HBIOS/cfg_mk4.asm

@ -49,6 +49,7 @@ CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
;

1
Source/HBIOS/cfg_n8.asm

@ -52,6 +52,7 @@ CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
;

1
Source/HBIOS/cfg_rcz180.asm

@ -49,6 +49,7 @@ CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
;
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
;

1
Source/HBIOS/cfg_rcz80.asm

@ -44,6 +44,7 @@ CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS
;
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
;

1
Source/HBIOS/cfg_sbc.asm

@ -41,6 +41,7 @@ CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
;

1
Source/HBIOS/cfg_sc126.asm

@ -44,6 +44,7 @@ CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
;
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $0D ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
;

1
Source/HBIOS/cfg_zeta.asm

@ -41,6 +41,7 @@ CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
;

1
Source/HBIOS/cfg_zeta2.asm

@ -45,6 +45,7 @@ CTCBASE .EQU $20 ; CTC BASE I/O ADDRESS
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
;

9
Source/HBIOS/hbios.asm

@ -1280,7 +1280,7 @@ HB_CPU1:
LD DE,(CPUOSC / 2) / 1000
;
#IF (Z180_CLKDIV >= 1)
LD (HB_CPUTYPE),A ; CPU TYPE
LD A,(HB_CPUTYPE) ; GET CPU TYPE
CP 2 ; Z8S180 REV K OR BETTER?
JR C,HB_CPU2 ; IF NOT, NOT POSSIBLE!
; SET CLOCK DIVIDE TO 1 RESULTING IN FULL XTAL SPEED
@ -1588,7 +1588,6 @@ HB_SPDTST:
#ENDIF
;
INITSYS3:
DIAG(0)
;
CALL PRTSUM ; PRINT UNIT/DEVICE SUMMARY TABLE
;
@ -2145,14 +2144,16 @@ HB_DSKIOX:
;
HB_DSKFN:
PUSH BC ; SAVE COUNTERS
#IF (DIAGENABLE)
#IF (DIAGENABLE & DIAGDISKIO)
LD A,(HB_DSKBIT) ; LOAD UNIT DISK BIT MASK
OUT (DIAGPORT),A ; DISPLAY ON DIAG LEDS
#ENDIF
LD E,1 ; ONE SECTOR
HB_DSKFNADR .EQU $+1
CALL PANIC ; READ ONE SECTOR
DIAG(0) ; CLEAR DIAG DISPLAY
#IF (DIAGENABLE & DIAGDISKIO)
DIAG(0) ; CLEAR DIAG LEDS
#ENDIF
POP BC ; RESTORE COUNTERS
RET ; RETURN
;

18
Source/HBIOS/romldr.asm

@ -211,6 +211,12 @@ SEL:
CALL CST ; CHECK CONSOLE INPUT
OR A ; ZERO?
JR Z,SEL1 ; IF NOT, CONTINUE
#IF (BIOS == BIOS_WBW)
#IF (DIAGENABLE)
XOR A ; ZERO ACCUM
OUT (DIAGPORT),A ; CLEAR DIAG LEDS
#ENDIF
#ENDIF
CALL CINUC ; GET THE KEY
CALL COUT ; ECHO KEY
JR MATS ; AND HANDLE IT
@ -221,6 +227,12 @@ SEL1:
CALL DSKY_STAT ; CHECK DSKY INPUT
OR A ; TEST FOR ZERO
JR Z,SEL2 ; IF ZERO, NO KEY PRESSED
#IF (BIOS == BIOS_WBW)
#IF (DIAGENABLE)
XOR A ; ZERO ACCUM
OUT (DIAGPORT),A ; CLEAR DIAG LEDS
#ENDIF
#ENDIF
CALL DSKY_GETKEY ; GET PENDING KEY PRESS
JR MATK ; AND HANDLE IT
#ENDIF
@ -237,6 +249,12 @@ SEL2:
OR C
JP NZ,SEL3
;
#IF (BIOS == BIOS_WBW)
#IF (DIAGENABLE)
XOR A ; ZERO ACCUM
OUT (DIAGPORT),A ; CLEAR DIAG LEDS
#ENDIF
#ENDIF
LD A,BOOT_DEFAULT ; TIMEOUT EXPIRED,
JR MATS ; PERFORM DEFAULT BOOT ACTION
#ENDIF

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