Reintegrate wbw -> trunk

This commit is contained in:
wayne
2012-12-30 07:01:37 +00:00
parent 0f1aafd0ae
commit ff94854ccf
29 changed files with 4213 additions and 183 deletions

View File

@@ -12,29 +12,28 @@ UART0_DIV .EQU (1843200 / (16 * BAUDRATE))
; B: FUNCTION (IN)
; C: CHARACTER (IN/OUT)
; E: DEVICE/UNIT (IN)
;
;
;
UART_DISPATCH:
#IF (PLATFORM == PLT_N8)
LD A,C ; GET DEVICE/UNIT
AND $0F ; ISOLATE UNIT
JR Z,UART0
JP Z,UART0
DEC A
JR Z,UART1
JP Z,UART1
CALL PANIC
#ENDIF
;
UART0:
; LD C,E ; FIX: COMPAT W/OLD DRIVERS, GET CHAR INTO C
LD A,B ; GET REQUESTED FUNCTION
AND $0F ; ISOLATE SUB-FUNCTION
JR Z,UART0_IN
JP Z,UART0_IN
DEC A
JR Z,UART0_OUT
JP Z,UART0_OUT
DEC A
JR Z,UART0_IST
JP Z,UART0_IST
DEC A
JR Z,UART0_OST
JP Z,UART0_OST
CALL PANIC
;
;
@@ -42,14 +41,49 @@ UART0:
UART_INIT:
#IF (PLATFORM == PLT_N8)
; ASCI0
PRTS("ASCI0: IO=0x$")
LD A,CPU_TDR0
CALL PRTHEXBYTE
CALL PC_COMMA
LD A,CPU_RDR0
CALL PRTHEXBYTE
PRTS(" BAUD=$")
#IF ((BAUDRATE / 100) > 0)
LD HL,BAUDRATE / 100
CALL PRTDEC
#ENDIF
#IF ((BAUDRATE % 100) < 10)
PRTC("0")
#ENDIF
LD HL,BAUDRATE % 100
CALL PRTDEC
LD A,66H
OUT0 (CPU_ASEXT0),A
LD A,64H
OUT0 (CPU_CNTLA0),A
LD A,Z180_CNTLB0
OUT0 (CPU_CNTLB0),A
; ASCI1
CALL NEWLINE
PRTS("ASCI1: IO=0x$")
LD A,CPU_TDR1
CALL PRTHEXBYTE
CALL PC_COMMA
LD A,CPU_RDR1
CALL PRTHEXBYTE
PRTS(" BAUD=$")
#IF ((BAUDRATE / 100) > 0)
LD HL,BAUDRATE / 100
CALL PRTDEC
#ENDIF
#IF ((BAUDRATE % 100) < 10)
PRTC("0")
#ENDIF
LD HL,BAUDRATE % 100
CALL PRTDEC
LD A,66H
OUT0 (CPU_ASEXT1),A
LD A,64H
@@ -57,6 +91,22 @@ UART_INIT:
LD A,Z180_CNTLB1
OUT0 (CPU_CNTLB1),A
#ELSE
PRTS("UART0: IO=0x$")
LD A,SIO_BASE
CALL PRTHEXBYTE
PRTS(" BAUD=$")
#IF ((BAUDRATE / 100) > 0)
LD HL,BAUDRATE / 100
CALL PRTDEC
#ENDIF
#IF ((BAUDRATE % 100) < 10)
PRTC("0")
#ENDIF
LD HL,BAUDRATE % 100
CALL PRTDEC
CALL PC_SPACE
LD A,80H
OUT (SIO_LCR),A ; DLAB ON
LD A,UART0_DIV
@@ -65,8 +115,9 @@ UART_INIT:
OUT (SIO_DLM),A ; SET DIVISOR (MS)
LD B,03H ; B = DEFAULT SETTING FOR MCR (DTR + RTS)
#IF (UARTAFC)
PRTS(" AFC$")
LD A,$55 ; TEST VALUE
OUT (SIO_SCR),A ; SET SCRATCH REG TO TEST VALUE
LD A,0BFH
@@ -76,12 +127,12 @@ UART_INIT:
JR NZ,UART_AFC1 ; NZ, HAVE EFR, DO IT
SET 5,B ; ENABLE AUTO FLOW CONTROL
JR UART_AFC2
UART_AFC1:
UART_AFC1:
LD A,0C0H ; ENABLE CTS/RTS FLOW CONTROL
OUT (SIO_EFR),A ; SAVE IT
UART_AFC2:
#ENDIF
LD A,03H
OUT (SIO_LCR),A ; DLAB OFF, 8 DATA, 1 STOP, NO PARITY
@@ -89,8 +140,10 @@ UART_AFC2:
OUT (SIO_MCR),A ; SAVE IT
#IF (UARTFIFO)
LD A,07H ; ENABLE AND RESET FIFOS
OUT (SIO_FCR),A
; LD A,07H ; ENABLE AND RESET FIFOS
LD A,01H ; ENABLE AND RESET FIFOS
OUT (SIO_FCR),A ; ENABLE FIFOS
PRTS(" FIFO$")
#ENDIF
#ENDIF
@@ -103,7 +156,7 @@ UART0_IN:
OR A
JR Z,UART0_IN
#IF (PLATFORM == PLT_N8)
IN0 A,(CPU_RDR0) ; READ THE CHAR FROM THE UART
IN0 A,(CPU_RDR0) ; READ THE CHAR FROM THE UART
#ELSE
IN A,(SIO_RBR) ; READ THE CHAR FROM THE UART
#ENDIF
@@ -118,7 +171,7 @@ UART0_IST:
IN0 A,(CPU_STAT0)
AND 70H ; PARITY, FRAMING, OR OVERRUN ERROR
JR Z,UART0_IST1 ; ALL IS WELL, CHECK FOR DATA
; CLEAR ERROR(S) OR NOTHING FURTHER CAN BE RECEIVED!!!
IN0 A,(CPU_CNTLA0)
RES 3,A ; CLEAR EFR (ERROR FLAG RESET)
@@ -126,7 +179,7 @@ UART0_IST:
UART0_IST1: ; CHECK FOR STAT0.RDRF (DATA READY)
IN0 A,(CPU_STAT0) ; READ LINE STATUS REGISTER
AND $80 ; TEST IF DATA IN RECEIVE BUFFER
AND $80 ; TEST IF DATA IN RECEIVE BUFFER
#ELSE
IN A,(SIO_LSR) ; READ LINE STATUS REGISTER
AND $01 ; TEST IF DATA IN RECEIVE BUFFER
@@ -196,7 +249,7 @@ UART1_IST:
IN0 A,(CPU_STAT1)
AND 70H ; PARITY, FRAMING, OR OVERRUN ERROR
JR Z,UART1_IST1 ; ALL IS WELL, CHECK FOR DATA
; CLEAR ERROR(S) OR NOTHING FURTHER CAN BE RECEIVED!!!
IN0 A,(CPU_CNTLA1)
RES 3,A ; CLEAR EFR (ERROR FLAG RESET)
@@ -204,7 +257,7 @@ UART1_IST:
UART1_IST1: ; CHECK FOR STAT0.RDRF (DATA READY)
IN0 A,(CPU_STAT1) ; READ LINE STATUS REGISTER
AND $80 ; TEST IF DATA IN RECEIVE BUFFER
AND $80 ; TEST IF DATA IN RECEIVE BUFFER
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL CHAR READY, A = 1