Support QP/M TIMDAT Routine

QP/M is a CP/M 2.2 replacement for BDOS/CCP.  However, it adds it's own concept of date/time stamping.  Support for the QP/M date/time routine has been added.  You can configure QP/M to find the vector at address 0x0010.

A sidenote on QP/M.  By default, it uses 2 bytes at address 0x0008 to store the current drive/user.  This will conflict with RomWBW's use of RST 08 for API function calls.  I recommend using address 0x000E when configuring QP/M for the location of the current drive/user.

Source/Apps/Test/ps2info/ps2info.asm

@@ -6,12 +6,21 @@
 ; Simple utility that performs simple tests of an 8242 PS/2 controller,
 ; keyboard, and mouse.
 ;
+; WBW 2022-03-28: Add menu driven port selection
+;                 Add support for RHYOPHYRE
+; WBW 2022-04-01: Add menu for test functions
+; WBW 2022-04-02: Fix prtchr register saving/recovery
+;
 ;=======================================================================
 ;
 ; PS/2 Keyboard/Mouse controller port addresses (adjust as needed)
 ;
-iocmd	.equ	$E3	; PS/2 controller command port address
-iodat	.equ	$E2	; PS/2 controller data port address
+; MBC:
+iocmd_mbc	.equ	$E3	; PS/2 controller command port address
+iodat_mbc	.equ	$E2	; PS/2 controller data port address
+; RPH:
+iocmd_rph	.equ	$8D	; PS/2 controller command port address
+iodat_rph	.equ	$8C	; PS/2 controller data port address
 ;
 cpumhz	.equ	8	; for time delay calculations (not critical)
 ;
@@ -37,6 +46,8 @@ bdos	.equ	$0005			; BDOS invocation vector
 	call	crlf
 	ld	de,str_banner		; banner
 	call	prtstr
+;
+	call	setup
 ;
 	call	main			; do the real work
 ;
@@ -50,52 +61,95 @@ exit:
 	ld	sp,(stksav)		; restore stack
 	jp	restart			; return to CP/M via restart
 ;
+;=======================================================================
+; Select and setup for hardware
+;=======================================================================
+;
+setup:
+	call	crlf2
+	ld	de,str_hwmenu
+	call	prtstr
+setup1:
+	ld	c,$06			; BDOS direct console I/O
+	ld	e,$FF			; Subfunction = read
+	call	bdos
+	cp	0
+	jr	z,setup1
+	call	upcase
+	call	prtchr
+	cp	'1'			; MBC
+	jr	z,setup_mbc
+	cp	'2'			; RHYOPHYRE
+	jr	z,setup_rph
+	cp	'X'
+	jr	z,exit
+	jr	setup
+;
+setup_mbc:
+	ld	a,iocmd_mbc
+	ld	(iocmd),a
+	ld	a,iodat_mbc
+	ld	(iodat),a
+	ld	de,str_mbc
+	jr	setup2
+;
+setup_rph:
+	ld	a,iocmd_rph
+	ld	(iocmd),a
+	ld	a,iodat_rph
+	ld	(iodat),a
+	ld	de,str_rph
+	jr	setup2
+;
+setup2:
+	call	prtstr
+	call	crlf2
+	ld	de,str_cmdport
+	call	prtstr
+	;ld	a,iocmd
+	ld	a,(iocmd)
+	call	prthex
+	call	crlf
+	ld	de,str_dataport
+	call	prtstr
+	;ld	a,iodat
+	ld	a,(iodat)
+	call	prthex
+;
+	xor	a
+	ret
 ;
 ;=======================================================================
 ; Main Program
 ;=======================================================================
 ;
 main:
-;
-; Display active controller port addresses
-;
 	call	crlf2
-	ld	de,str_cmdport
+	ld	de,str_menu
 	call	prtstr
-	ld	a,iocmd
-	call	prthex
-	call	crlf
-	ld	de,str_dataport
-	call	prtstr
-	ld	a,iodat
-	call	prthex
-;
-	call	test_ctlr
-	jr	z,main0			; continue if ctlr OK
-	ld	de,str_kbd_failed
-	call	crlf2
-	call	prtstr
-	jr	mainz			; bail out if ctlr fails
-;
-main0:
-	call	test_kbd
-	jr	z,main1			; completed all tests, continue
-	ld	de,str_kbd_failed
-	call	crlf2
-	call	prtstr
-;
 main1:
-	call	test_mse
-	jr	z,main2			; completed all tests, continue
-	ld	de,str_mse_failed
-	call	crlf2
-	call	prtstr
+	ld	c,$06			; BDOS direct console I/O
+	ld	e,$FF			; Subfunction = read
+	call	bdos
+	cp	0
+	jr	z,main1
+	call	upcase
+	call	prtchr
+	cp	'X'
+	jp	z,exit
+	call	main2
+	jr	main
 ;
 main2:
-	call	test_kbdmse
-;
-mainz:
-	xor	a
+	; Dispatch to test functions
+	cp	'C'			; Test Controller
+	jp	z,test_ctlr
+	cp	'K'			; Test Keyboard
+	jp	z,test_kbd
+	cp	'M'			; Test Mouse
+	jp	z,test_mse
+	cp	'B'			; Test Both
+	jp	z,test_kbdmse
 	ret
 ;
 ; Test 8242 PS/2 Controller
@@ -109,10 +163,8 @@ test_ctlr:
 	ret	nz
 ;
 	call	ctlr_test_p1
-	;ret	nz
 ;
 	call	ctlr_test_p2
-	;ret	nz
 ;
 	ret
 ;
@@ -123,13 +175,15 @@ test_kbd:
 ; First, we attempt to contact the controller and keyboard, then
 ; print the keyboard identity and scan codes supported
 ;
-	; Run test series with translation off
 	call	crlf2
 	ld	de,str_basic
 	call	prtstr
+;
+	call	ctlr_test
+	jr	nz,test_kbd_fail
 ;
 	call	test_kbd_basic
-	ret	nz
+	jr	nz,test_kbd_fail
 ;
 ; We make two passes through the test series with different controller
 ; setup values.  The first time is with scan code translation off and
@@ -155,59 +209,83 @@ test_kbd:
 ;
 	ret
 ;
+test_kbd_fail:
+	ld	de,str_kbd_failed
+	call	crlf2
+	call	prtstr
+	ret
+;
 ; Test Mouse
 ;
 test_mse:
 	call	crlf2
 	ld	de,str_basic_mse
 	call	prtstr
+;
+	call	ctlr_test
+	jr	nz,test_mse_fail
 ;
 	ld	a,$10			; kbd disabled, mse enabled, no ints
 	call	ctlr_setup
-	ret	nz
+	jr	nz,test_mse_fail
 ;
 	call	mse_reset
-	ret	nz
+	jr	nz,test_mse_fail
 ;
 	call	mse_ident
-	ret	nz
+	jr	nz,test_mse_fail
 ;
 	call	mse_stream
-	ret	nz
+	jr	nz,test_mse_fail
 ;
 	call	mse_echo
 ;	
 	xor	a			; signal success
 	ret
 ;
+test_mse_fail:
+	ld	de,str_mse_failed
+	call	crlf2
+	call	prtstr
+	ret
+;
 ; Test Everything
 ;
 test_kbdmse:
 	call	crlf2
 	ld	de,str_kbdmse
 	call	prtstr
+;
+	call	ctlr_test
+	jr	nz,test_kbdmse_fail
 ;
 	ld	a,$00			; kbd enabled, mse enabled, no ints
 	call	ctlr_setup
-	ret	nz
+	jr	nz,test_kbdmse_fail
 ;
 	call	kbd_reset
-	ret	nz
+	jr	nz,test_kbdmse_fail
 ;
 	ld	a,2
 	call	kbd_setsc
 ;
 	call	mse_reset
-	ret	nz
+	jr	nz,test_kbdmse_fail
 ;
 	call	mse_stream
-	ret	nz
+	jr	nz,test_kbdmse_fail
 ;
 	call	kbdmse_echo
 ;	
 	xor	a			; signal success
 	ret
 ;
+test_kbdmse_fail:
+	ld	de,str_kbdmse_failed
+	call	crlf2
+	call	prtstr
+	ret
+;
 ; Perform basic keyboard tests, display keyboard identity, and
 ; inventory the supported scan code sets.
 ;
@@ -782,7 +860,9 @@ wait_write:
 	ld	a,(timeout)		; setup timeout constant
 	ld	b,a
 wait_write1:
-	in	a,(iocmd)		; get status
+	ld	a,(iocmd)		; cmd port
+	ld	c,a			; ... to C
+	in	a,(c)			; get status
 	ld	c,a			; save status
 	and	$02			; isolate input buf status bit
 	ret	z			; 0 means ready, all done
@@ -804,7 +884,9 @@ wait_read:
 	ld	a,(timeout)		; setup timeout constant
 	ld	b,a
 wait_read1:
-	in	a,(iocmd)		; get status
+	ld	a,(iocmd)		; cmd port
+	ld	c,a			; ... to C
+	in	a,(c)			; get status
 	ld	c,a			; save status
 	and	$01			; isolate input buf status bit
 	xor	$01			; invert so 0 means ready
@@ -824,7 +906,9 @@ check_read:
 ; Check for data ready to read
 ;   A=0 indicates data available (ZF set)
 ;
-	in	a,(iocmd)		; get status
+	ld	a,(iocmd)		; cmd port
+	ld	c,a			; ... to C
+	in	a,(c)			; get status
 	and	$01			; isolate input buf status bit
 	xor	$01			; invert so 0 means ready
 	ret
@@ -834,7 +918,9 @@ check_read_kbd:
 ; Check for keyboard data ready to read
 ;   A=0 indicates data available (ZF set)
 ;
-	in	a,(iocmd)		; get status
+	ld	a,(iocmd)		; cmd port
+	ld	c,a			; ... to C
+	in	a,(c)			; get status
 	and	%00100001		; isolate input buf status bit
 	cp	%00000001		; data ready, not mouse
 	ret
@@ -844,7 +930,9 @@ check_read_mse:
 ; Check for mouse data ready to read
 ;   A=0 indicates data available (ZF set)
 ;
-	in	a,(iocmd)		; get status
+	ld	a,(iocmd)		; cmd port
+	ld	c,a			; ... to C
+	in	a,(c)			; get status
 	and	%00100001		; isolate input buf status bit
 	cp	%00100001		; data ready, is mouse
 	ret
@@ -860,8 +948,10 @@ put_cmd:
 	scf				; else, signal timeout error
 	ret				; and bail out
 put_cmd1:
+	ld	a,(iocmd)		; cmd port
+	ld	c,a			; ... to C
 	ld	a,e			; recover value to write
-	out	(iocmd),a		; write it
+	out	(c),a			; write it
 	or	a			; clear CF for success
 	ret
 ;
@@ -889,8 +979,10 @@ put_data:
 	scf				; else, signal timeout error
 	ret				; and bail out
 put_data1:
+	ld	a,(iodat)		; data port
+	ld	c,a			; ... to C
 	ld	a,e			; recover value to write
-	out	(iodat),a		; write it
+	out	(c),a			; write it
 	or	a			; clear CF for success
 	ret
 ;
@@ -947,7 +1039,9 @@ get_data:
 	scf				; else signal timeout error
 	ret				; and bail out
 get_data1:
-	in	a,(iodat)		; get data byte
+	ld	a,(iodat)		; data port
+	ld	c,a			; ... to C
+	in	a,(c)			; get data byte
 	or	a			; clear CF for success
 	ret
 ;
@@ -1020,11 +1114,11 @@ err_ret:
 ; Utility Routines
 ;=======================================================================
 ;
-;
 ; Print character in A without destroying any registers
 ;
 prtchr:
-	push	bc		; save registers
+	push	af		; save registers
+	push	bc
 	push	de
 	push	hl
 	ld	e,a		; character to print in E
@@ -1033,6 +1127,7 @@ prtchr:
 	pop	hl		; restore registers
 	pop	de
 	pop	bc
+	pop	af
 	ret
 ;
 prtdot:
@@ -1044,6 +1139,16 @@ prtdot:
 	pop	af		; restore af
 	ret			; done
 ;
+; Uppercase character in A
+;
+upcase:
+	cp	'a'			; below 'a'?
+	ret	c			; if so, nothing to do
+	cp	'z'+1			; above 'z'?
+	ret	nc			; if so, nothing to do
+	and	~$20			; convert character to lower
+	ret				; done
+;
 ; Print a zero terminated string at (de) without destroying any registers
 ;
 prtstr:
@@ -1239,7 +1344,21 @@ delay1:
 ; Constants
 ;=======================================================================
 ;
-str_banner		.db	"PS/2 Keyboard/Mouse Information v0.4, 7-Jan-2022",0
+str_banner		.db	"PS/2 Keyboard/Mouse Information v0.6a, 2-Apr-2022",0
+str_hwmenu		.db	"PS/2 Controller Port Options:\r\n\r\n"
+			.db	"  1 - MBC\r\n"
+			.db	"  2 - RHYOPHYRE\r\n"
+			.db	"  X - Exit Application\r\n"
+			.db	"\r\nSelection? ",0
+str_mbc			.db	"MBC",0
+str_rph			.db	"RHYOPHYRE",0
+str_menu		.db	"PS/2 Testing Options:\r\n\r\n"
+			.db	"  C - Test PS/2 Controller\r\n"
+			.db	"  K - Test PS/2 Keyboard\r\n"
+			.db	"  M - Test PS/2 Mouse\r\n"
+			.db	"  B - Test Both PS/2 Keyboard and Mouse Together\r\n"
+			.db	"  X - Exit Application\r\n"
+			.db	"\r\nSelection? ",0
 str_exit		.db	"Done, Thank you for using PS/2 Keyboard/Mouse Information!",0
 str_cmdport		.db	"Controller Command Port: ",0
 str_dataport		.db	"Controller Data Port: ",0
@@ -1312,6 +1431,11 @@ str_mse_failed		.db	"***** MOUSE HARDWARE ERROR *****",13,10,13,10
 			.db	"the completion of the full set of mouse tests.",13,10
 			.db	"Check your hardware and verify the port",13,10
 			.db	"addresses being used for the controller",0
+str_kbdmse_failed	.db	"***** KEYBOARD/MOUSE HARDWARE ERROR *****",13,10,13,10
+			.db	"A basic hardware or configuration issue prevented",13,10
+			.db	"the completion of the full set of keyboard/mouse tests.",13,10
+			.db	"Check your hardware and verify the port",13,10
+			.db	"addresses being used for the controller",0
 ;
 ;=======================================================================
 ; Working data
@@ -1321,6 +1445,9 @@ stksav		.dw	0		; stack pointer saved at start
 		.fill	stksiz,0	; stack
 stack		.equ	$		; stack top
 ;
+iocmd		.db	0
+iodat		.db	0
+;
 workbuf		.fill	8
 workbuf_len	.db	0
 ;

Source/Apps/rtc.asm

@@ -29,6 +29,8 @@
 ;
 ;[2021/07/10] v1.7 Support MBC (AJL)
 ;
+;[2022/03/27] v1.8 Support RHYOPHYRE
+;
 ; Constants
 ;
 mask_data	.EQU	%10000000	; RTC data line
@@ -46,6 +48,7 @@ PORT_SCZ180	.EQU	$0C		; RTC port for SCZ180
 PORT_DYNO	.EQU	$0C		; RTC port for DYNO
 PORT_RCZ280	.EQU	$C0		; RTC port for RCZ280
 PORT_MBC	.EQU	$70		; RTC port for MBC
+PORT_RPH	.EQU	$84		; RTC port for RHYOPHYRE
 
 
 BDOS		.EQU	5		; BDOS invocation vector
@@ -1126,6 +1129,11 @@ HINIT:
 	LD	DE,PLT_MBC
 	CP	13		; MBC
 	JR	Z,RTC_INIT2
+;
+	LD	C,PORT_RPH
+	LD	DE,PLT_RPH
+	CP	14		; RHYOPHYRE
+	JR	Z,RTC_INIT2
 ;
 	; Unknown platform
 	LD	DE,PLTERR	; BIOS error message
@@ -1622,7 +1630,7 @@ TESTING_BIT_DELAY_OVER:
 
 RTC_HELP_MSG:
 	.DB	0Ah, 0Dh		; line feed and carriage return
-	.TEXT	"RTC: Version 1.7"
+	.TEXT	"RTC: Version 1.8"
 	.DB	0Ah, 0Dh		; line feed and carriage return
 	.TEXT	"Commands: E)xit T)ime st(A)rt S)et R)aw L)oop C)harge N)ocharge D)elay I)nit G)et P)ut B)oot W)arm-start H)elp"
 	.DB	0Ah, 0Dh		; line feed and carriage return
@@ -1751,6 +1759,7 @@ PLT_SCZ180	.TEXT	", SC Z180 RTC Module Latch Port 0x0C\r\n$"
 PLT_DYNO	.TEXT	", DYNO RTC Module Latch Port 0x0C\r\n$"
 PLT_RCZ280	.TEXT	", RC2014 Z280 RTC Module Latch Port 0xC0\r\n$"
 PLT_MBC		.TEXT	", MBC RTC Latch Port 0x70\r\n$"
+PLT_RPH		.TEXT	", RHYOPHYRE RTC Latch Port 0x84\r\n$"
 
 ;
 ; Generic FOR-NEXT loop algorithm

Source/CBIOS/cbios.asm

@@ -144,6 +144,43 @@ CBXSIZ	.EQU	$ - CBX
 	.ECHO	" bytes.\n"
 ;
 ;==================================================================================================
+; TIMDAT ROUTINE FOR QP/M
+;==================================================================================================
+;
+#IFDEF PLTWBW
+  #IF QPMTIMDAT
+;
+TIMDAT:
+	; GET CURRENT DATE/TIME FROM RTC INTO BUFFER
+	LD	B,BF_RTCGETTIM		; HBIOS GET TIME FUNCTION
+	LD	HL,CLKDAT		; POINTER TO BUFFER
+	RST	08			; DO IT
+;
+	; CONVERT ALL BYTES FROM BCD TO BINARY
+	LD	HL,CLKDAT		; BUFFER
+	LD	B,7			; DO 7 BYTES
+TIMDAT1:
+	LD	A,(HL)
+	CALL	BCD2BYTE
+	LD	(HL),A
+	INC	HL
+	DJNZ	TIMDAT1
+;
+	; SWAP BYTES 0 & 2 TO MAKE BUFFER INTO QP/M ORDER
+	LD	A,(CLKDAT+0)
+	PUSH	AF
+	LD	A,(CLKDAT+2)
+	LD	(CLKDAT+0),A
+	POP	AF
+	LD	(CLKDAT+2),A
+;
+	LD	HL,CLKDAT		; RETURN BUFFER ADDRESS
+	RET
+;
+  #ENDIF
+#ENDIF
+;
+;==================================================================================================
 ; CHARACTER DEVICE MAPPING
 ;==================================================================================================
 ;
@@ -346,11 +383,13 @@ BOOT:
 #ENDIF
 	CALL	RESCPM		; RESET CPM
 ;
-#IF DEBUG
+#IF AUTOSUBMIT
+  #IF DEBUG
 	CALL	PRTSTRD
 	.DB	"\r\nPerforming Auto Submit...$"
-#ENDIF
+  #ENDIF
 	CALL	AUTOSUB		; PREP AUTO SUBMIT, IF APPROPRIATE
+#ENDIF
 ;
 #IF DEBUG
 	CALL	PRTSTRD
@@ -1718,6 +1757,12 @@ SLICE		.DB	0		; CURRENT SLICE
 SPS		.DW	0		; SECTORS PER SLICE
 STKSAV		.DW	0		; TEMP SAVED STACK POINTER
 ;
+#IFDEF PLTWBW
+  #IF QPMTIMDAT
+CLKDAT		.FILL	7,0		; RTC CLOCK DATA BUFFER
+  #ENDIF
+#ENDIF
+;
 #IFDEF PLTWBW
 BNKBIOS		.DB	0		; BIOS BANK ID
 BNKUSER		.DB	0		; USER BANK ID
@@ -2317,6 +2362,17 @@ INIT3:
 	LD	DE,STR_TPA2		; AND TPA SUFFIX
 	CALL	WRITESTR
 	CALL	NEWLINE			; FORMATTING
+;
+; SETUP QP/M TIMDAT ROUTINE VECTOR IN ZERO PAGE AT 0x0010
+;
+#IFDEF PLTWBW
+  #IF QPMTIMDAT
+	LD	A,$C3			; JP INSTRUCTION
+	LD	($0010),A		; STORE AT 0x0008
+	LD	HL,TIMDAT		; ROUTINE ADDRESS
+	LD	($0011),HL		; SET VECTOR
+  #ENDIF
+#ENDIF
 ;
 	RET				; DONE
 ;
@@ -2328,6 +2384,9 @@ ERR_BIOMEM:
 ;
 ;
 ;__________________________________________________________________________________________________
+;
+#IF AUTOSUBMIT
+;
 AUTOSUB:
 ;
 	; SETUP AUTO SUBMIT COMMAND (IF REQUIRED FILES EXIST)
@@ -2359,6 +2418,8 @@ AUTOSUB:
 	LDIR				; PATCH COMMAND LINE INTO CCP
 	RET				; DONE
 ;
+#ENDIF
+;
 ;
 ;__________________________________________________________________________________________________
 DEV_INIT:

Source/CBIOS/config.asm

@@ -2,6 +2,8 @@
 ; CBIOS BUILD CONFIGURATION OPTIONS
 ;
 CLRRAMDISK	.EQU	CLR_AUTO	; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA)
+AUTOSUBMIT	.EQU	TRUE		; PROCESS PROFILE.SUB AT STARTUP
+QPMTIMDAT	.EQU	TRUE		; SUPPORT QP/M TIMDAT ROUTINE
 WRTCACHE	.EQU	TRUE		; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM
 DSKTRACE	.EQU	FALSE		; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
 DEBUG		.EQU	FALSE		; MISCELLANEOUS DEBUG TRACING

Source/CBIOS/util.asm

@@ -460,7 +460,52 @@ HEXCONV:
 	DAA	
 	ADC	A,40H
 	DAA	
-	RET	
+	RET
+;
+;****************************
+;	A(BCD) => A(BIN)
+;	[00H..99H] -> [0..99]
+;****************************
+;
+BCD2BYTE:
+	PUSH	BC
+	LD	C,A
+	AND	0F0H
+	SRL	A
+	LD	B,A
+	SRL	A
+	SRL	A
+	ADD	A,B
+	LD	B,A
+	LD	A,C
+	AND	0FH
+	ADD	A,B
+	POP	BC
+	RET
+;
+;*****************************
+;	 A(BIN) =>  A(BCD)
+;	[0..99] => [00H..99H]
+;*****************************
+;
+BYTE2BCD:
+	PUSH	BC
+	LD	B,10
+	LD	C,-1
+BYTE2BCD1:
+	INC	C
+	SUB	B
+	JR	NC,BYTE2BCD1
+	ADD	A,B
+	LD	B,A
+	LD	A,C
+	ADD	A,A
+	ADD	A,A
+	ADD	A,A
+	ADD	A,A
+	OR	B
+	POP	BC
+	RET
 ;
 ; PRINT A BYTE BUFFER IN HEX POINTED TO BY DE
 ; REGISTER A HAS SIZE OF BUFFER

Source/Fonts/fonts.txt

@@ -1,15 +1,27 @@
 Font files for ROMWBW.
 
+8x8: 8x8 cell, mostly IBM CGA, first 16 differ, thin font
+8x11: 8x11 cell, possibly VT-100?
+8x16: 8x16 cell, IBM MDA
+CGA: 8x16 cell, IBM CGA, normal (thick) CGA font, rows 8-15 are unused padding
+
 There are three fonts associated with ROMWBW supported hardware - ECB-SCG, ECB-CVDU and the ECB-VGA3.
 
 Name            Format      Size    Board & Display Mode
 ------------------------------------------------------------------------------------
-font8x8u.bin    8x8         2048    ECB-SCG, ECB-VGA3 (80x60)     
+font8x8u.bin    8x8         2048    ECB-SCG, ECB-VGA3 (80x60), MBC-VDP
 font8x11u.bin   8x11        2816    ECB-VGA3 (80x43)
 font8x16u.bin   8x16        4096    ECB-CVDU (80x25), ECB-VGA3 (80x24, 80x25, 80x30), MBC-VDC
-fontcgau.bin	8x8         4096    ECB-CVDU (80x25), MBC-VDC
+fontcgau.bin    8x16        4096    ECB-CVDU (80x25), MBC-VDC
 
-For inclusion in HBIOS the .bin format files must be convert to assembler .asm format.
+Notes:
+
+- The CGA font is roughly equivalent to the 8x8 font, but padded out to 8x16.  Scan lines
+  8-15 are unused.  The CVDU driver (8563 chip) always uses fonts defined in an 8x16 cell.
+  When the CVDU is configured for use with a CGA monitor, an 8x8 character cell is used,
+  but the font definition must still be 8x16.  The CGA font is used for this.
+
+For inclusion in HBIOS the .bin format files must be converted to assembler .asm format.
 This is acheived using the fonttool utility and is completed automatically as part of the build process.
 i.e. fonts files are converted to .asm format and then copied to the HBIOS directory. 
 

Source/HBIOS/Build.cmd

@@ -211,5 +211,6 @@ call Build EZZ80 std 512 || exit /b
 call Build EZZ80 tz80 512 || exit /b
 call Build DYNO std 512 || exit /b
 call Build UNA std 512 || exit /b
+call Build RPH std 512 || exit /b
 
 goto :eof

Source/HBIOS/Build.ps1

@@ -28,7 +28,7 @@ $ErrorAction = 'Stop'
 #
 
 $PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "EZZ80", "UNA"
-$PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO"
+$PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH"
 $PlatformListZ280 = "RCZ280"
 
 #

Source/HBIOS/Build.sh

@@ -27,6 +27,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
 	ROM_PLATFORM="RCZ80"; ROM_CONFIG="skz"; ROMSIZE="512"; bash Build.sh
 	ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc"; ROMSIZE="512"; bash Build.sh
 	ROM_PLATFORM="RCZ80"; ROM_CONFIG="zrc_ram"; ROMSIZE="0"; bash Build.sh
+	ROM_PLATFORM="RPH"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh
 	ROM_PLATFORM="SBC"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh
 	ROM_PLATFORM="SBC"; ROM_CONFIG="simh"; ROMSIZE="512"; bash Build.sh
 	ROM_PLATFORM="MBC"; ROM_CONFIG="std"; ROMSIZE="512"; bash Build.sh

Source/HBIOS/Config/RPH_std.asm

@@ -0,0 +1,41 @@
+;
+;==================================================================================================
+;   RHYOPHYRE STANDARD CONFIGURATION
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_rph.asm"
+;
+CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
+;
+INTMODE		.SET	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+;
+Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
+Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
+Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+;
+RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+;
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Makefile

@@ -12,7 +12,7 @@ include $(TOOLS)/Makefile.inc
 
 FONTS := font8x11c.asm font8x11u.asm font8x16c.asm font8x16u.asm font8x8c.asm font8x8u.asm fontcgac.asm fontcgau.asm
 
-ifneq ($(findstring $(ROM_PLATFORM), N8 MK4 RCZ180 SCZ180 DYNO),)
+ifneq ($(findstring $(ROM_PLATFORM), N8 MK4 RCZ180 SCZ180 DYNO RPH),)
 	TASM=$(BINDIR)/uz80as -t hd64180
 endif
 

Source/HBIOS/asci.asm

@@ -75,10 +75,14 @@ ASCI1_BASE	.EQU	Z180_BASE + 1	; RELATIVE TO Z180 INTERNAL IO PORTS
 ;
 ASCI_RTS	.EQU	%00010000	; ~RTS BIT OF CNTLA REG
 ;
-#IF (INTMODE == 2)
+#IF (ASCIINTS)
+;
+  #IF (INTMODE == 2)
 ;
 ASCI0_IVT	.EQU	IVT(INT_SER0)
 ASCI1_IVT	.EQU	IVT(INT_SER1)
+;
+  #ENDIF
 ;
 #ENDIF
 ;
@@ -115,25 +119,29 @@ ASCI_PREINIT2:
 	ADD	IY,DE			; BUMP IY TO NEXT ENTRY
 	DJNZ	ASCI_PREINIT0		; LOOP UNTIL DONE
 ;
-#IF (INTMODE >= 1)
+#IF (ASCIINTS)
+;
+  #IF (INTMODE >= 1)
 	; SETUP INT VECTORS AS APPROPRIATE
 	LD	A,(ASCI_DEV)		; GET DEVICE COUNT
 	OR	A			; SET FLAGS
 	JR	Z,ASCI_PREINIT3		; IF ZERO, NO ASCI DEVICES, ABORT
 ;
-#IF (INTMODE == 1)
+    #IF (INTMODE == 1)
 	; ADD IM1 INT CALL LIST ENTRY
 	LD	HL,ASCI_INT		; GET INT VECTOR
 	CALL	HB_ADDIM1		; ADD TO IM1 CALL LIST
-#ENDIF
+    #ENDIF
 ;
-#IF (INTMODE == 2)
+    #IF (INTMODE == 2)
 	; SETUP IM2 VECTORS
 	LD	HL,ASCI_INT0
 	LD	(ASCI0_IVT),HL		; IVT INDEX
 	LD	HL,ASCI_INT1
 	LD	(ASCI1_IVT),HL		; IVT INDEX
-#ENDIF
+    #ENDIF
+;
+  #ENDIF
 ;
 #ENDIF
 ;
@@ -188,7 +196,9 @@ ASCI_INIT1:
 ;
 ; RECEIVE INTERRUPT HANDLER
 ;
-#IF (INTMODE > 0)
+#IF (ASCIINTS)
+;
+  #IF (INTMODE > 0)
 ;
 ; IM1 ENTRY POINT
 ;
@@ -232,10 +242,10 @@ ASCI_INTRCV1:
 	ADD	A,8			; BUMP TO RDR PORT
 	LD	C,A			; PUT IN C, B IS STILL ZERO
 	IN	A,(C)			; READ PORT
-  #IF (ASCIBOOT != 0)
+    #IF (ASCIBOOT != 0)
 	CP	ASCIBOOT		; REBOOT REQUEST?
 	JP	Z,SYS_RESCOLD		; IF SO, DO IT, NO RETURN
-  #ENDIF
+    #ENDIF
 	LD	B,A			; SAVE BYTE READ
 	LD	L,(IY+6)		; SET HL TO
 	LD	H,(IY+7)		; ... START OF BUFFER STRUCT
@@ -292,6 +302,8 @@ ASCI_INTRCV3:
 ASCI_INTRCV4:
 	OR	$FF			; NZ SET TO INDICATE INT HANDLED
 	RET				; AND RETURN
+;
+  #ENDIF
 ;
 #ENDIF
 ;
@@ -309,7 +321,7 @@ ASCI_FNTBL:
 	.ECHO	"*** INVALID ASCI FUNCTION TABLE ***\n"
 #ENDIF
 ;
-#IF (INTMODE == 0)
+#IF ((!ASCIINTS) | (INTMODE == 0))
 ;
 ASCI_IN:
 	CALL	ASCI_IST		; CHECK FOR CHAR READY
@@ -395,7 +407,7 @@ ASCI_OUT:
 ;
 ;
 ;
-#IF (INTMODE == 0)
+#IF ((!ASCIINTS) | (INTMODE == 0))
 ;
 ASCI_IST:
 	CALL	ASCI_ICHK		; ASCI INPUT CHECK
@@ -522,7 +534,7 @@ ASCI_INITGO:
 	OUT	(C),L			; WRITE CNTLB VALUE
 	INC	C			; BUMP TO
 	INC	C			; ... STAT REG, B IS STILL 0
-#IF (INTMODE > 0)
+#IF ((ASCIINTS) & (INTMODE > 0))
 	LD	A,$08			; SET RIE BIT ON
 #ELSE
 	XOR	A			; CLEAR RIE/TIE
@@ -534,7 +546,7 @@ ASCI_INITGO:
 	LD	A,$66			; STATIC VALUE FOR ASEXT
 	OUT	(C),A			; WRITE ASEXT REG
 ;
-#IF (INTMODE > 0)
+#IF ((ASCIINTS) & (INTMODE > 0))
 ;
 	; RESET THE RECEIVE BUFFER
 	LD	E,(IY+6)
@@ -609,6 +621,24 @@ ASCI_DETECT:
 ; DUE TO ENCODING BAUD IS ALWAYS DIVISIBLE BY 75
 ; Z180 DIVISOR IS ALWAYS A FACTOR OF 160
 ;
+; CNTLB=	XXPXDSSS
+; FAILSAVE = 	00100000
+;
+; PS (PRESCALE): 0=/10, 1=/30
+; DR (DIVIDE RATIO): 0=/16, 1=/64
+; SS2	SS1	SS0
+; ---	---	---
+; 0	0	0	/1
+; 0	0	1	/2
+; 0	1	0	/4
+; 0	1	1	/8
+; 1	0	0	/16
+; 1	0	1	/32
+; 1	1	0	/64
+;
+; FAILSAFE: CLOCK / 30 / 16 / 1 = CLOCK / 480
+;	IF CLOCK=18432000, BAUD=38400
+;
 ; X := CPU_HZ / 160 / 75 ==> SIMPLIFIED ==> X := CPU_KHZ / 12
 ; X := X / (BAUD / 75)
 ; IF X % 3 == 0, THEN (PS := 1, X := X / 3) ELSE PS=0
@@ -769,7 +799,7 @@ ASCI_STR_ASCIB	.DB	"ASCI W/BRG$"
 ;
 ASCI_DEV	.DB	0		; DEVICE NUM USED DURING INIT
 ;
-#IF (INTMODE == 0)
+#IF ((!ASCIINTS) | (INTMODE == 0))
 ;
 ASCI0_RCVBUF	.EQU	0
 ASCI1_RCVBUF	.EQU	0

Source/HBIOS/cen.asm

@@ -45,15 +45,15 @@ CEN_PREINIT:
 	XOR	A			; ZERO TO ACCUM
 	LD	(CEN_DEV),A		; CURRENT DEVICE NUMBER
 	LD	IY,CEN_CFG		; POINT TO START OF CFG TABLE
-CEN_PREINIT0:	
+CEN_PREINIT0:
 	PUSH	BC			; SAVE LOOP CONTROL
 	CALL	CEN_INITUNIT		; HAND OFF TO UNIT INIT CODE
 	POP	BC			; RESTORE LOOP CONTROL
-;	
+;
 	LD	A,(IY+1)		; GET THE CEN TYPE DETECTED
 	OR	A			; SET FLAGS
 	JR	Z,CEN_PREINIT2		; SKIP IT IF NOTHING FOUND
-;	 
+;
 	PUSH	BC			; SAVE LOOP CONTROL
 	PUSH	IY			; CFG ENTRY ADDRESS
 	POP	DE			; ... TO DE
@@ -95,7 +95,7 @@ CEN_INITUNIT:
 CEN_INIT:
 	LD	B,CEN_CFGCNT		; COUNT OF POSSIBLE CEN UNITS
 	LD	IY,CEN_CFG		; POINT TO START OF CFG TABLE
-CEN_INIT1:	
+CEN_INIT1:
 	PUSH	BC			; SAVE LOOP CONTROL
 	LD	A,(IY+1)		; GET CEN TYPE
 	OR	A			; SET FLAGS
@@ -137,6 +137,18 @@ CEN_OUT:
 	CALL	CEN_OST			; READY TO SEND?
 	JR	Z,CEN_OUT		; LOOP IF NOT
 	; *** ADD CODE TO OUTPUT BYTE ***
+	LD	A,(IY+3)
+	LD	C,A			; PORT 0 (DATA)
+ 	OUT	(C),E			; OUTPUT DATA TO PORT
+ 	call 	DELAY   		; ignore anything back after a reset
+        ld      A,%00001101             ; select & strobe, LEDS OFF
+	INC 	C 			; PUT CONTROL PORT IN C
+	INC 	C
+        OUT	(C),A			; OUTPUT DATA TO PORT
+  	call 	DELAY   		; ignore anything back after a reset
+        ld      A,%00001100             ; select, LEDS OFF
+        OUT	(C),A			; OUTPUT DATA TO PORT
+
 	XOR	A			; SIGNAL SUCCESS
 	RET
 ;
@@ -150,8 +162,11 @@ CEN_IST:
 ; OUTPUT STATUS
 ;
 CEN_OST:
-	; *** ADD CODE TO CHECK FOR OUTPUT READY ***
-	OR	A			; SET FLAGS
+	LD	A,(IY+3)
+	LD	C,A			; PORT 0 (DATA)
+	INC 	C			; SELECT STATUS PORT
+ 	IN	A,(C)			; GET STATUS INFO
+    	AND	%10000000		; ONLY INTERESTED IN BUSY FLAG
 	RET				; DONE
 ;
 ; INITIALIZE DEVICE
@@ -166,14 +181,16 @@ CEN_INITDEV:
 ; PREINIT ABOVE.  PREINIT IS NOT ALLOWED TO ENABLE INTS!
 ;
 CEN_INITDEVX:
-	; *** NOT SURE THIS IS RIGHT ***
 	LD	A,(IY+3)
 	LD	C,A			; PORT 0 (DATA)
 	XOR	A			; CLEAR ACCUM
 	OUT	(C),A			; SEND IT
 	INC	C			; BUMP TO
 	INC	C			; ... PORT 2
-	LD	A,%11000000		; RESET, LEDS OFF
+	LD	A,%00001000		; SELECT AND ASSERT RESET, LEDS OFF
+	OUT	(C),A			; SEND IT
+ 	CALL	LDELAY			; HALF SECOND DELAY
+	LD	A,%00001100		; SELECT AND DEASSERT RESET, LEDS OFF
 	OUT	(C),A			; SEND IT
 	XOR	A			; SIGNAL SUCCESS
 	RET				; RETURN
@@ -207,7 +224,7 @@ CEN_DETECT:
 	JR	Z,CEN_DETECT1		; FOUND IT, RECORD IT
 	LD	A,CEN_NONE		; NOTHING FOUND
 	RET				; DONE
-;	
+;
 CEN_DETECT1:
 	; CEN FOUND, RECORD IT
 	LD	A,CEN_MBC		; RETURN CHIP TYPE

Source/HBIOS/cfg_dyno.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_DYNO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
+PLATFORM	.EQU	PLT_DYNO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -33,7 +33,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
-MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
+MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
@@ -100,6 +100,7 @@ DUARTENABLE	.EQU	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.EQU	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 ASCISWAP	.EQU	FALSE		; ASCI: SWAP CHANNELS
 ASCIBOOT	.EQU	0		; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
 ASCI0CFG	.EQU	DEFSERCFG	; ASCI 0: SERIAL LINE CONFIG
@@ -115,9 +116,9 @@ XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
 VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
-NECENABLE	.EQU	FALSE		; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|RC|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;

Source/HBIOS/cfg_ezz80.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_EZZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
+PLATFORM	.EQU	PLT_EZZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -33,7 +33,7 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
-MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
+MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@@ -153,9 +153,9 @@ XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
 VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
-NECENABLE	.EQU	FALSE		; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|RC|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;

Source/HBIOS/cfg_master.asm

@@ -12,7 +12,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
+PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -30,7 +30,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
-MEMMGR		.EQU	MM_NONE		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
+MEMMGR		.EQU	MM_NONE		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
@@ -60,6 +60,11 @@ N8_ACR		.EQU	$94		; N8: AUXILLARY CONTROL REGISTER (ACR) ADR
 N8_RMAP		.EQU	$96		; N8: ROM PAGE REGISTER ADR
 N8_DEFACR	.EQU	$1B		; N8: AUX CTL REGISTER DEFAULT VALUE (QUIESCIENT STATE)
 ;
+RPH_PPI0	.EQU	$88		; RPH: FIRST PARALLEL PORT REGISTERS BASE ADR
+RPH_RTC		.EQU	$84		; RPH: RTC LATCH REGISTER ADR
+RPH_ACR		.EQU	$80		; RPH: AUXILLARY CONTROL REGISTER (ACR) ADR
+RPH_DEFACR	.EQU	$00		; RPH: AUX CTL REGISTER DEFAULT VALUE (QUIESCIENT STATE)
+;
 MK4_IDE		.EQU	$80		; MK4: IDE REGISTERS BASE ADR
 MK4_XAR		.EQU	$88		; MK4: EXTERNAL ADDRESS REGISTER (XAR) ADR
 MK4_SD		.EQU	$89		; MK4: SD CARD CONTROL REGISTER ADR
@@ -153,6 +158,7 @@ UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 ASCISWAP	.EQU	FALSE		; ASCI: SWAP CHANNELS
 ASCIBOOT	.EQU	0		; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
 ASCI0CFG	.EQU	DEFSERCFG	; ASCI 0: SERIAL LINE CONFIG
@@ -205,9 +211,11 @@ VDUSIZ		.EQU	V80X25		; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30]
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 CVDUMODE	.EQU	CVDUMODE_ECB	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
 CVDUMON		.EQU	CVDUMON_CGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
-NECENABLE	.EQU	FALSE		; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
+GDCMODE		.EQU	GDCMODE_RPH	; GDC: GDC MODE: GDCMODE_[NONE|ECB|RPH]
+GDCMON		.EQU	GDCMON_EGA      ; GDC: GDC MONITOR SETUP: GDCMON_[NONE|CGA|EGA]
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|RC|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]

Source/HBIOS/cfg_mbc.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_MBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
+PLATFORM	.EQU	PLT_MBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -33,7 +33,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
-MEMMGR		.EQU	MM_MBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
+MEMMGR		.EQU	MM_MBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
 ;
@@ -141,9 +141,9 @@ VDUSIZ		.EQU	V80X25		; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30]
 CVDUENABLE	.EQU	TRUE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 CVDUMODE	.EQU	CVDUMODE_MBC	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
 CVDUMON		.EQU	CVDUMON_CGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
-NECENABLE	.EQU	FALSE		; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
-TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_SCG	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|RC|RCV9958|RCKBD]
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
+TMSENABLE	.EQU	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.EQU	TMSMODE_MBC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]

Source/HBIOS/cfg_mk4.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_MK4		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
+PLATFORM	.EQU	PLT_MK4		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -33,7 +33,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
-MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
+MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 ;
@@ -122,6 +122,7 @@ UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 ASCISWAP	.EQU	FALSE		; ASCI: SWAP CHANNELS
 ASCIBOOT	.EQU	0		; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
 ASCI0CFG	.EQU	DEFSERCFG	; ASCI 0: SERIAL LINE CONFIG
@@ -140,9 +141,9 @@ VDUSIZ		.EQU	V80X25		; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30]
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 CVDUMODE	.EQU	CVDUMODE_ECB	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
 CVDUMON		.EQU	CVDUMON_EGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
-NECENABLE	.EQU	FALSE		; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_SCG	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|RC|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_SCG	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]

Source/HBIOS/cfg_n8.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_N8		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
+PLATFORM	.EQU	PLT_N8		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -33,7 +33,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
-MEMMGR		.EQU	MM_N8		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
+MEMMGR		.EQU	MM_N8		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMBIAS		.EQU	0		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 RAMLOC		.EQU	0		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 ;
@@ -124,6 +124,7 @@ UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 ASCISWAP	.EQU	FALSE		; ASCI: SWAP CHANNELS
 ASCIBOOT	.EQU	0		; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
 ASCI0CFG	.EQU	DEFSERCFG	; ASCI 0: SERIAL LINE CONFIG
@@ -142,9 +143,9 @@ VDUSIZ		.EQU	V80X25		; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30]
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 CVDUMODE	.EQU	CVDUMODE_ECB	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
 CVDUMON		.EQU	CVDUMON_EGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
-NECENABLE	.EQU	FALSE		; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_N8	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|RC|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_N8	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]

Source/HBIOS/cfg_rcz180.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_RCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
+PLATFORM	.EQU	PLT_RCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -33,7 +33,7 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
-MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
+MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
@@ -125,6 +125,7 @@ UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 ASCISWAP	.EQU	FALSE		; ASCI: SWAP CHANNELS
 ASCIBOOT	.EQU	0		; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
 ASCI0CFG	.EQU	DEFSERCFG	; ASCI 0: SERIAL LINE CONFIG
@@ -159,9 +160,9 @@ XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
 VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
-NECENABLE	.EQU	FALSE		; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_RC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|RC|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_RC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;

Source/HBIOS/cfg_rcz280.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_RCZ280	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
+PLATFORM	.EQU	PLT_RCZ280	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
 CPUFAM		.EQU	CPU_Z280	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -33,7 +33,7 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
-MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
+MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
@@ -175,9 +175,9 @@ XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
 VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
-NECENABLE	.EQU	FALSE		; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_RC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|RC|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_RC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;

Source/HBIOS/cfg_rcz80.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_RCZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
+PLATFORM	.EQU	PLT_RCZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -33,7 +33,7 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
-MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
+MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@@ -164,9 +164,9 @@ XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
 VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
-NECENABLE	.EQU	FALSE		; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_RC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|RC|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_RC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;

Source/HBIOS/cfg_rph.asm

@@ -0,0 +1,251 @@
+;
+;==================================================================================================
+;   ROMWBW 2.X CONFIGURATION FOR RHYOPHYRE
+;==================================================================================================
+;
+; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
+; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED.	INSTEAD, YOU SHOULD
+; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY
+; UNDER THIS DIRECTORY.
+;
+; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
+; FOR THE PLATFORM.
+;
+#DEFINE PLATFORM_NAME "RHYOPHYRE"
+;
+#INCLUDE "hbios.inc"
+;
+PLATFORM	.EQU	PLT_RPH		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
+CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
+BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
+BATCOND		.EQU	TRUE		; ENABLE LOW BATTERY WARNING MESSAGE
+HBIOS_MUTEX	.EQU	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
+USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
+TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
+;
+BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
+CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
+INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+;
+RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+MEMMGR		.EQU	MM_RPH		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
+RAMBIAS		.EQU	0		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMLOC		.EQU	0		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
+;
+Z180_BASE	.EQU	$40		; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
+Z180_CLKDIV	.EQU	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
+Z180_MEMWAIT	.EQU	0		; Z180: MEMORY WAIT STATES (0-3)
+Z180_IOWAIT	.EQU	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+Z180_TIMER	.EQU	TRUE		; Z180: ENABLE Z180 SYSTEM PERIODIC TIMER
+;
+RPH_PPI0	.EQU	$88		; RPH: FIRST PARALLEL PORT REGISTERS BASE ADR
+RPH_RTC		.EQU	$84		; RPH: RTC LATCH REGISTER ADR
+RPH_ACR		.EQU	$80		; RPH: AUXILLARY CONTROL REGISTER (ACR) ADR
+RPH_DEFACR	.EQU	$20		; RPH: AUX CTL REGISTER DEFAULT VALUE (QUIESCIENT STATE)
+;
+RTCIO		.EQU	RPH_RTC		; RTC LATCH REGISTER ADR
+;
+KIOENABLE	.EQU	FALSE		; ENABLE ZILOG KIO SUPPORT
+KIOBASE		.EQU	$80		; KIO BASE I/O ADDRESS
+;
+CTCENABLE	.EQU	FALSE		; ENABLE ZILOG CTC SUPPORT
+CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
+CTCBASE		.EQU	$B0		; CTC BASE I/O ADDRESS
+CTCTIMER	.EQU	FALSE		; ENABLE CTC PERIODIC TIMER
+;
+EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
+;
+SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
+;
+WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
+;
+DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
+DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
+DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+;
+LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED
+LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
+LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
+LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
+;
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
+DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
+DSKYPPIBASE	.EQU	RPH_PPI0		; BASE I/O ADDRESS OF DSKY PPI
+DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+;
+BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
+CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU		.EQU	EMUTYP_ANSI	; VDA EMULATION: EMUTYP_[TTY|ANSI]
+ANSITRACE	.EQU	1		; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKTRACE	.EQU	1		; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+KBDTRACE	.EQU	1		; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKKBLOUT	.EQU	KBD_US		; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
+KBDKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+MKYENABLE	.EQU	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+MKYKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+;
+DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
+DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
+;
+BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
+BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
+;
+INTRTCENABLE	.EQU	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+RP5RTCENABLE	.EQU	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+;
+HTIMENABLE	.EQU	FALSE		; ENABLE SIMH TIMER SUPPORT
+SIMRTCENABLE	.EQU	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
+;
+DS7RTCENABLE	.EQU	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
+DS7RTCMODE	.EQU	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
+;
+DUARTENABLE	.EQU	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+;
+UARTENABLE	.EQU	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
+UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+UARTCFG		.EQU	DEFSERCFG	; UART: LINE CONFIG FOR UART PORTS
+UARTCASSPD	.EQU	SER_300_8N1	; UART: ECB CASSETTE UART DEFAULT SPEED
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
+UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
+UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
+UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
+UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
+UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+;
+ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+ASCISWAP	.EQU	FALSE		; ASCI: SWAP CHANNELS
+ASCIBOOT	.EQU	0		; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
+ASCI0CFG	.EQU	DEFSERCFG	; ASCI 0: SERIAL LINE CONFIG
+ASCI1CFG	.EQU	DEFSERCFG	; ASCI 1: SERIAL LINE CONFIG
+;
+Z2UENABLE	.EQU	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
+;
+ACIAENABLE	.EQU	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+;
+SIOENABLE	.EQU	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+;
+XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
+;
+VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
+VDUSIZ		.EQU	V80X25		; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30]
+CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
+CVDUMODE	.EQU	CVDUMODE_ECB	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
+CVDUMON		.EQU	CVDUMON_EGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
+GDCENABLE	.EQU	TRUE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
+GDCMODE		.EQU	GDCMODE_RPH	; GDC: GDC MODE: GDCMODE_[NONE|ECB|RPH]
+GDCMON		.EQU	GDCMON_EGA      ; GDC: GDC MONITOR SETUP: GDCMON_[NONE|CGA|EGA]
+TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.EQU	TMSMODE_N8	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
+VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
+;
+MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
+MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
+;
+FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.EQU	FDMODE_N8	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
+FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
+FDMEDIA		.EQU	FDM144		; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
+FDMEDIAALT	.EQU	FDM720		; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
+FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+;
+RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
+RFCNT		.EQU	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
+;
+IDEENABLE	.EQU	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDETRACE	.EQU	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IDECNT		.EQU	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
+IDE0MODE	.EQU	IDEMODE_DIO	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE0BASE	.EQU	$20		; IDE 0: IO BASE ADDRESS
+IDE0DATLO	.EQU	$20		; IDE 0: DATA LO PORT FOR 16-BIT I/O
+IDE0DATHI	.EQU	$28		; IDE 0: DATA HI PORT FOR 16-BIT I/O
+IDE0A8BIT	.EQU	FALSE		; IDE 0A (MASTER): 8 BIT XFER
+IDE0B8BIT	.EQU	FALSE		; IDE 0B (MASTER): 8 BIT XFER
+IDE1MODE	.EQU	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE1BASE	.EQU	$00		; IDE 1: IO BASE ADDRESS
+IDE1DATLO	.EQU	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
+IDE1DATHI	.EQU	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
+IDE1A8BIT	.EQU	TRUE		; IDE 1A (MASTER): 8 BIT XFER
+IDE1B8BIT	.EQU	TRUE		; IDE 1B (MASTER): 8 BIT XFER
+IDE2MODE	.EQU	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE2BASE	.EQU	$00		; IDE 2: IO BASE ADDRESS
+IDE2DATLO	.EQU	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
+IDE2DATHI	.EQU	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
+IDE2A8BIT	.EQU	TRUE		; IDE 2A (MASTER): 8 BIT XFER
+IDE2B8BIT	.EQU	TRUE		; IDE 2B (MASTER): 8 BIT XFER
+;
+PPIDEENABLE	.EQU	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPIDECNT	.EQU	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0BASE	.EQU	RPH_PPI0	; PPIDE 0: PPI REGISTERS BASE ADR
+PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
+PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1BASE	.EQU	$00		; PPIDE 1: PPI REGISTERS BASE ADR
+PPIDE1A8BIT	.EQU	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
+PPIDE1B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2BASE	.EQU	$00		; PPIDE 2: PPI REGISTERS BASE ADR
+PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
+PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+;
+SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.EQU	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDPPIBASE	.EQU	RPH_PPI0	; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
+SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
+SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
+;
+PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+PRPSDENABLE	.EQU	FALSE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
+PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PRPCONENABLE	.EQU	FALSE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
+;
+PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
+;
+HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
+;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
+CENENABLE	.EQU	FALSE		; CEN: ENABLE CENTRONICS DRIVER (CEN.ASM)
+;
+PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
+PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
+PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
+PIOZBASE	.EQU	$88		; PIO: PIO REGISTERS BASE ADR FOR ECB ZP BOARD
+PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
+PIOSBASE	.EQU	RPH_PPI0		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
+;
+UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
+FIFO_BASE	.EQU	$0C		; UF: REGISTERS BASE ADR
+;
+SN76489ENABLE	.EQU	FALSE		; SN76489 SOUND DRIVER
+AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
+SN7CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
+SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
+;
+AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
+AYMODE		.EQU	AYMODE_N8	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
+;
+SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
+;
+DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
+DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
+DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)

Source/HBIOS/cfg_sbc.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
+PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -33,7 +33,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
-MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
+MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
 ;
@@ -141,9 +141,9 @@ VDUSIZ		.EQU	V80X25		; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30]
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 CVDUMODE	.EQU	CVDUMODE_ECB	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
 CVDUMON		.EQU	CVDUMON_EGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
-NECENABLE	.EQU	FALSE		; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_SCG	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|RC|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_SCG	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]

Source/HBIOS/cfg_scz180.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_SCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
+PLATFORM	.EQU	PLT_SCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -33,7 +33,7 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
-MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
+MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 ;
@@ -120,6 +120,7 @@ UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 ASCISWAP	.EQU	FALSE		; ASCI: SWAP CHANNELS
 ASCIBOOT	.EQU	0		; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
 ASCI0CFG	.EQU	DEFSERCFG	; ASCI 0: SERIAL LINE CONFIG
@@ -154,9 +155,9 @@ XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
 VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
-NECENABLE	.EQU	FALSE		; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_RC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|RC|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_RC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;

Source/HBIOS/cfg_una.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "../UBIOS/ubios.inc"
 ;
-;PLATFORM	.EQU	PLT_UNA		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
+;PLATFORM	.EQU	PLT_UNA		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
 BIOS		.EQU	BIOS_UNA	; HARDWARE BIOS: BIOS_[WBW|UNA]
 ;
 BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE

Source/HBIOS/cfg_zeta.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_ZETA	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
+PLATFORM	.EQU	PLT_ZETA	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; BIOS_[WBW|UNA]: HARDWARE BIOS
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -33,7 +33,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
-MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
+MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
 ;
@@ -114,9 +114,9 @@ XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
 VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
-NECENABLE	.EQU	FALSE		; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|RC|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;

Source/HBIOS/cfg_zeta2.asm

@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_ZETA2	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC]
+PLATFORM	.EQU	PLT_ZETA2	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -33,7 +33,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
-MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC]
+MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@@ -125,9 +125,9 @@ XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
 VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
-NECENABLE	.EQU	FALSE		; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|RC|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;

Source/HBIOS/dsrtc.asm

@@ -66,28 +66,28 @@
 ; RTC LATCH WRITE
 ; ---------------
 ;
-; BIT	SBC	SBC-004	MFPIC	N8	N8-CSIO	MK4	SC130	SC131	SC126		MBC
-; -----	-------	-------	-------	-------	-------	-------	-------	-------	---------------	-------
-; D7	RTC_OUT RTC_OUT	--	RTC_OUT RTC_OUT	RTC_OUT	--	--	RTC_OUT,I2C_SDA	RTC_OUT
-; D6	RTC_CLK RTC_CLK	--	RTC_CLK RTC_CLK	RTC_CLK	--	--	RTC_CLK		RTC_CLK
-; D5	/RTC_WE /RTC_WE	--	/RTC_WE /RTC_WE	/RTC_WE	--	--	/RTC_WE		/RTC_WE
-; D4	RTC_CE	RTC_CE	--	RTC_CE  RTC_CE	RTC_CE	--	--	RTC_CE		RTC_CE
-; D3	NC	CLKSEL	/RTC_CE	NC	NC	NC	--	--	/SPI_CS2	CLKSEL
-; D2	NC	SPK	RTC_CLK	SPI_CS	SPI_CS	NC	/SPI_CS1/SPI_CS1/SPI_CS1	SPK
-; D1	--	--	RTC_WE	SPI_CLK	NC	NC	--	--	FS		LED1
-; D0	--	--	RTC_OUT	SPI_DI	NC	NC	--	--	I2C_SCL		LED0
+; BIT	SBC	SBC-004	MFPIC	N8	N8-CSIO	MK4	SC130	SC131	SC126		MBC	RPH
+; -----	-------	-------	-------	-------	-------	-------	-------	-------	---------------	------- -------
+; D7	RTC_OUT RTC_OUT	--	RTC_OUT RTC_OUT	RTC_OUT	--	--	RTC_OUT,I2C_SDA	RTC_OUT	RTC_OUT
+; D6	RTC_CLK RTC_CLK	--	RTC_CLK RTC_CLK	RTC_CLK	--	--	RTC_CLK		RTC_CLK	RTC_CLK
+; D5	/RTC_WE /RTC_WE	--	/RTC_WE /RTC_WE	/RTC_WE	--	--	/RTC_WE		/RTC_WE	/RTC_WE
+; D4	RTC_CE	RTC_CE	--	RTC_CE  RTC_CE	RTC_CE	--	--	RTC_CE		RTC_CE	RTC_CE
+; D3	NC	CLKSEL	/RTC_CE	NC	NC	NC	--	--	/SPI_CS2	CLKSEL	--
+; D2	NC	SPK	RTC_CLK	SPI_CS	SPI_CS	NC	/SPI_CS1/SPI_CS1/SPI_CS1	SPK	--
+; D1	--	--	RTC_WE	SPI_CLK	NC	NC	--	--	FS		LED1	--
+; D0	--	--	RTC_OUT	SPI_DI	NC	NC	--	--	I2C_SCL		LED0	--
 ;
 ; RTC LATCH READ
 ; --------------
 ;
-; D7	--	--	--	--	--	--	--	--	I2C_SDA		--
-; D6	CFG	CFG	--	SPI_DO	CFG	--	--	--	--		CFG
-; D5	--	--	--	--	--	--	--	--	--		--
-; D4	--	--	--	--	--	--	--	--	--		--
-; D3	--	--	--	--	--	--	--	--	--		--
-; D2	--	--	--	--	--	--	--	--	--		--
-; D1	----	--	--	--	--	--	--	--	--		CLKSEL
-; D0	RTC_IN	RTC_IN	RTC_IN	RTC_IN	RTC_IN	RTC_IN	--	--	RTC_IN		RTC_IN
+; D7	--	--	--	--	--	--	--	--	I2C_SDA		--	--
+; D6	CFG	CFG	--	SPI_DO	CFG	--	--	--	--		CFG	--
+; D5	--	--	--	--	--	--	--	--	--		--	--
+; D4	--	--	--	--	--	--	--	--	--		--	--
+; D3	--	--	--	--	--	--	--	--	--		--	--
+; D2	--	--	--	--	--	--	--	--	--		--	--
+; D1	----	--	--	--	--	--	--	--	--		CLKSEL	--
+; D0	RTC_IN	RTC_IN	RTC_IN	RTC_IN	RTC_IN	RTC_IN	--	--	RTC_IN		RTC_IN	RTC_IN
 ;
 #IF (DSRTCMODE == DSRTCMODE_STD)
 ;

Source/HBIOS/gdc.asm

@@ -0,0 +1,331 @@
+;======================================================================
+;	UPD7220 GRAPHICS DEVICE CONTROLLER
+;======================================================================
+;
+;======================================================================
+; GDC DRIVER - CONSTANTS
+;======================================================================
+;
+#IF (GDCMODE == GDCMODE_ECB)
+GDC_BASE	.EQU	$??		; GDC BASE I/O PORT
+GDC_DAC_BASE	.EQU	$??		; RAMDAC BASE I/O PORT
+#ENDIF
+;
+#IF (GDCMODE == GDCMODE_RPH)
+GDC_KBDDATA	.EQU	$8C		; KBD CTLR DATA PORT
+GDC_KBDST	.EQU	$8D		; KBD CTLR STATUS/CMD PORT
+GDC_BASE	.EQU	$90		; GDC BASE I/O PORT
+GDC_DAC_BASE	.EQU	$98		; RAMDAC BASE I/O PORT
+#ENDIF
+;
+GDC_STAT	.EQU	GDC_BASE + 0		; STATUS PORT
+GDC_CMD		.EQU	GDC_BASE + 1		; COMMAND PORT
+GDC_PARAM	.EQU	GDC_BASE + 0		; PARAM PORT
+GDC_READ	.EQU	GDC_BASE + 1		; READ PORT
+GDC_DAC_WR	.EQU	GDC_DAC_BASE + 0	; RAMDAC ADR WRITE
+GDC_DAC_RD      .EQU	GDC_DAC_BASE + 3	; RAMDAC ADR READ
+GDC_DAC_PALRAM  .EQU	GDC_DAC_BASE + 1	; RAMDAC PALETTE RAM
+GDC_DAC_PIXMSK  .EQU	GDC_DAC_BASE + 2	; RAMDAC PIXEL READ MASK
+GDC_DAC_OVL_WR  .EQU	GDC_DAC_BASE + 4	; RAMDAC OVERLAY WRITE
+GDC_DAC_OVL_RD  .EQU	GDC_DAC_BASE + 7	; RAMDAC OVERLAY READ
+GDC_DAC_OVL_RAM .EQU	GDC_DAC_BASE + 5	; RAMDAC OVERLAY RAM
+;
+GDC_ROWS	.EQU	25
+GDC_COLS	.EQU	80
+;
+; *** TODO: CGA AND EGA ARE PLACEHOLDERS.  THESE EQUATES SHOULD
+; BE USED TO ALLOW FOR MULTIPLE MONITOR TIMINGS AND/OR FONT
+; DEFINITIONS.
+;
+#IF (GDCMON == GDCMON_CGA)
+  #DEFINE	USEFONTCGA
+  #DEFINE	GDC_FONT FONTCGA
+#ENDIF
+;
+#IF (GDCMON == GDCMON_EGA)
+  #DEFINE	USEFONT8X16
+  #DEFINE	GDC_FONT FONT8X16
+#ENDIF
+;
+TERMENABLE	.SET	TRUE		; INCLUDE TERMINAL PSEUDODEVICE DRIVER
+;
+;======================================================================
+; GDC DRIVER - INITIALIZATION
+;======================================================================
+;
+GDC_INIT:
+	LD	IY,GDC_IDAT		; POINTER TO INSTANCE DATA
+	
+	CALL	NEWLINE
+	PRTS("GDC: MODE=$")
+#IF (GDCMODE == GDCMODE_ECB)
+	PRTS("ECB$")
+#ENDIF
+#IF (GDCMODE == GDCMODE_RPH)
+	PRTS("RPH$")
+#ENDIF
+;
+#IF (GDCMON == GDCMON_CGA)
+	PRTS(" CGA$")
+#ENDIF	
+#IF (GDCMON == GDCMON_EGA)
+	PRTS(" EGA$")
+#ENDIF	
+;
+	PRTS(" IO=0x$")
+	LD	A,GDC_BASE
+	CALL	PRTHEXBYTE
+	CALL	GDC_PROBE		; CHECK FOR HW PRESENCE
+	JR	Z,GDC_INIT1		; CONTINUE IF HW PRESENT
+;
+	; HARDWARE NOT PRESENT
+	PRTS(" NOT PRESENT$")
+	OR	$FF			; SIGNAL FAILURE
+	RET
+;
+GDC_INIT1:
+	CALL 	GDC_CRTINIT		; SETUP THE GDC CHIP REGISTERS
+	CALL	GDC_VDARES		; RESET GDC
+	CALL	KBD_INIT		; INITIALIZE KEYBOARD DRIVER
+
+	; ADD OURSELVES TO VDA DISPATCH TABLE
+	LD	BC,GDC_FNTBL		; BC := FUNCTION TABLE ADDRESS
+	LD	DE,GDC_IDAT		; DE := GDC INSTANCE DATA PTR
+	CALL	VDA_ADDENT		; ADD ENTRY, A := UNIT ASSIGNED
+
+	; INITIALIZE EMULATION
+	LD	C,A			; C := ASSIGNED VIDEO DEVICE NUM
+	LD	DE,GDC_FNTBL		; DE := FUNCTION TABLE ADDRESS
+	LD	HL,GDC_IDAT		; HL := GDC INSTANCE DATA PTR
+	CALL	TERM_ATTACH		; DO IT
+
+	XOR	A			; SIGNAL SUCCESS
+	RET
+;
+;======================================================================
+; GDC DRIVER - VIDEO DISPLAY ADAPTER (VDA) FUNCTIONS
+;======================================================================
+;
+GDC_FNTBL:
+	.DW	GDC_VDAINI
+	.DW	GDC_VDAQRY
+	.DW	GDC_VDARES
+	.DW	GDC_VDADEV
+	.DW	GDC_VDASCS
+	.DW	GDC_VDASCP
+	.DW	GDC_VDASAT
+	.DW	GDC_VDASCO
+	.DW	GDC_VDAWRC
+	.DW	GDC_VDAFIL
+	.DW	GDC_VDACPY
+	.DW	GDC_VDASCR
+	.DW	KBD_STAT
+	.DW	KBD_FLUSH
+	.DW	KBD_READ
+	.DW	GDC_VDARDC
+#IF (($ - GDC_FNTBL) != (VDA_FNCNT * 2))
+	.ECHO	"*** INVALID GDC FUNCTION TABLE ***\n"
+	!!!!!
+#ENDIF
+;
+GDC_VDAINI:
+	; RESET VDA
+	CALL	GDC_VDARES		; RESET VDA
+	XOR	A			; SIGNAL SUCCESS
+	RET
+;
+GDC_VDAQRY:	; VIDEO INFORMATION QUERY
+	LD	C,$00		; MODE ZERO IS ALL WE KNOW
+	LD	D,GDC_ROWS	; ROWS
+	LD	E,GDC_COLS	; COLS
+	LD	HL,0		; EXTRACTION OF CURRENT BITMAP DATA NOT SUPPORTED YET
+	XOR	A		; SIGNAL SUCCESS
+	RET
+;
+GDC_VDARES:	; VIDEO SYSTEM RESET
+	; *** TODO: RESET VIDEO SYSTEM HERE, CLEAR SCREEN,
+	; CURSOR TO TOP LEFT, CLEAR ATTRIBUTES
+	XOR	A
+	RET
+;
+GDC_VDADEV:	; VIDEO DEVICE INFORMATION
+	LD	D,VDADEV_GDC	; D := DEVICE TYPE
+	LD	E,0		; E := PHYSICAL UNIT IS ALWAYS ZERO
+	LD	H,0		; H := 0, DRIVER HAS NO MODES
+	LD	L,GDC_BASE	; L := BASE I/O ADDRESS
+	XOR	A		; SIGNAL SUCCESS
+	RET
+;
+GDC_VDASCS:	; SET CURSOR STYLE
+	CALL	SYSCHK		; NOT IMPLEMENTED (YET)
+	LD	A,ERR_NOTIMPL
+	OR	A
+	RET
+
+GDC_VDASCP:	; SET CURSOR POSITION
+	CALL	GDC_XY		; SET CURSOR POSITION
+	XOR	A		; SIGNAL SUCCESS
+	RET
+
+GDC_VDASAT:	; SET ATTRIBUTES
+	LD	A,E		; GET THE INCOMING ATTRIBUTE
+	LD	(GDC_ATTR),A	; AND SAVE FOR LATER
+	XOR	A		; SIGNAL SUCCESS
+	RET
+
+GDC_VDASCO:	; SET COLOR
+	LD	A,E		; GET THE INCOMING COLOR
+	LD	(GDC_COLOR),A	; AND SAVE FOR LATER
+	XOR	A		; SIGNAL SUCCESS
+	RET
+
+GDC_VDAWRC:	; WRITE CHARACTER
+	LD	A,E		; CHARACTER TO WRITE GOES IN A
+	CALL	GDC_PUTCHAR	; PUT IT ON THE SCREEN
+	XOR	A		; SIGNAL SUCCESS
+	RET
+
+GDC_VDAFIL:	; FILL WITH CHARACTER
+	LD	A,E		; FILL CHARACTER GOES IN A
+	EX	DE,HL		; FILL LENGTH GOES IN DE
+	CALL	GDC_FILL	; DO THE FILL
+	XOR	A		; SIGNAL SUCCESS
+	RET
+
+GDC_VDACPY:	; COPY CHARACTERS/ATTRIBUTES
+	; LENGTH IN HL, SOURCE ROW/COL IN DE, DEST IS GDC_POS
+	; BLKCPY USES: HL=SOURCE, DE=DEST, BC=COUNT
+	PUSH	HL		; SAVE LENGTH
+	CALL	GDC_XY2IDX	; ROW/COL IN DE -> SOURCE ADR IN HL
+	POP	BC		; RECOVER LENGTH IN BC
+	LD	DE,(GDC_POS)	; PUT DEST IN DE
+	JP	GDC_BLKCPY	; DO A BLOCK COPY
+
+GDC_VDASCR:	; SCROLL ENTIRE SCREEN
+	LD	A,E		; LOAD E INTO A
+	OR	A		; SET FLAGS
+	RET	Z		; IF ZERO, WE ARE DONE
+	PUSH	DE		; SAVE E
+	JP	M,GDC_VDASCR1	; E IS NEGATIVE, REVERSE SCROLL
+	CALL	GDC_SCROLL	; SCROLL FORWARD ONE LINE
+	POP	DE		; RECOVER E
+	DEC	E		; DECREMENT IT
+	JR	GDC_VDASCR	; LOOP
+GDC_VDASCR1:
+	CALL	GDC_RSCROLL	; SCROLL REVERSE ONE LINE
+	POP	DE		; RECOVER E
+	INC	E		; INCREMENT IT
+	JR	GDC_VDASCR	; LOOP
+;
+GDC_VDARDC:	; READ CHAR/ATTR VALUE FROM VIDEO BUFFER
+	OR	$FF		; UNSUPPORTED FUNCTION
+	RET
+;
+;======================================================================
+; GDC DRIVER - PRIVATE DRIVER FUNCTIONS
+;======================================================================
+;
+;----------------------------------------------------------------------
+; PROBE FOR GDC HARDWARE
+;----------------------------------------------------------------------
+;
+; ON RETURN, ZF SET INDICATES HARDWARE FOUND
+;
+; *** TODO: IMPLEMENT THIS
+;
+GDC_PROBE:
+	XOR	A			; SIGNAL SUCCESS
+	RET				; RETURN WITH ZF SET BASED ON CP
+;
+;----------------------------------------------------------------------
+; DISPLAY CONTROLLER CHIP INITIALIZATION
+;----------------------------------------------------------------------
+;
+; *** TODO: IMPLEMENT THIS
+;
+GDC_CRTINIT:
+	XOR	A			; SIGNAL SUCCESS
+	RET
+;
+;----------------------------------------------------------------------
+; SET CURSOR POSITION TO ROW IN D AND COLUMN IN E
+;----------------------------------------------------------------------
+;
+GDC_XY:
+	CALL	GDC_XY2IDX		; CONVERT ROW/COL TO BUF IDX
+	LD	(GDC_POS),HL		; SAVE THE RESULT (DISPLAY POSITION)
+	; *** TODO: MOVE THE CURSOR
+	RET
+;
+;----------------------------------------------------------------------
+; CONVERT XY COORDINATES IN DE INTO LINEAR INDEX IN HL
+; D=ROW, E=COL
+;----------------------------------------------------------------------
+;
+GDC_XY2IDX:
+	LD	A,E			; SAVE COLUMN NUMBER IN A
+	LD	H,D			; SET H TO ROW NUMBER
+	LD	E,GDC_COLS		; SET E TO ROW LENGTH
+	CALL	MULT8			; MULTIPLY TO GET ROW OFFSET
+	LD	E,A			; GET COLUMN BACK
+	ADD	HL,DE			; ADD IT IN
+	RET				; RETURN
+;
+;----------------------------------------------------------------------
+; WRITE VALUE IN A TO CURRENT VDU BUFFER POSITION, ADVANCE CURSOR
+;----------------------------------------------------------------------
+;
+GDC_PUTCHAR:
+	; *** TODO: IMPLEMENT THIS
+	RET
+;
+;----------------------------------------------------------------------
+; FILL AREA IN BUFFER WITH SPECIFIED CHARACTER AND CURRENT COLOR/ATTRIBUTE
+; STARTING AT THE CURRENT FRAME BUFFER POSITION
+;   A: FILL CHARACTER
+;   DE: NUMBER OF CHARACTERS TO FILL
+;----------------------------------------------------------------------
+;
+GDC_FILL:
+	; *** TODO: IMPLEMENT THIS
+	RET
+;
+;----------------------------------------------------------------------
+; SCROLL ENTIRE SCREEN FORWARD BY ONE LINE (CURSOR POSITION UNCHANGED)
+;----------------------------------------------------------------------
+;
+GDC_SCROLL:
+	; *** TODO: IMPLEMENT THIS
+	RET
+;
+;----------------------------------------------------------------------
+; REVERSE SCROLL ENTIRE SCREEN BY ONE LINE (CURSOR POSITION UNCHANGED)
+;----------------------------------------------------------------------
+;
+GDC_RSCROLL:
+	; *** TODO: IMPLEMENT THIS
+	RET
+;
+;----------------------------------------------------------------------
+; BLOCK COPY BC BYTES FROM HL TO DE
+;----------------------------------------------------------------------
+;
+GDC_BLKCPY:
+	; *** TODO: IMPLEMENT THIS
+	RET
+;
+;==================================================================================================
+;   GDC DRIVER - DATA
+;==================================================================================================
+;
+GDC_ATTR	.DB	0	; CURRENT ATTRIBUTES
+GDC_COLOR	.DB	0	; CURRENT COLOR
+GDC_POS		.DW 	0	; CURRENT DISPLAY POSITION
+;
+;==================================================================================================
+;   GDC DRIVER - INSTANCE DATA
+;==================================================================================================
+;
+GDC_IDAT:
+	.DB	GDC_KBDST
+	.DB	GDC_KBDDATA

Source/HBIOS/hbios.asm

@@ -556,6 +556,28 @@ HBX_RAMX:
 HBX_MMA	.DB	0			; TEMPORARY STORAGE FOR REG A
 #ENDIF
 ;
+#IF (MEMMGR == MM_RPH)
+	BIT	7,A			; TEST BIT 7 FOR RAM VS. ROM
+	JR	Z,HBX_ROM		; IF NOT SET, SELECT ROM PAGE
+;
+HBX_RAM:
+	AND	%00011111		; AVOID WRAPPING BITS
+	RLCA				; SCALE SELECTOR TO
+	RLCA				; ... GO FROM Z180 4K PAGE SIZE
+	RLCA				; ... TO DESIRED 32K PAGE SIZE
+	OUT0	(Z180_BBR),A		; WRITE TO BANK BASE
+	LD	A,RPH_DEFACR | 80H	; SELECT RAM BY SETTING BIT 7
+	OUT0	(RPH_ACR),A		; ... IN RPH ACR REGISTER
+	RET				; DONE
+;
+HBX_ROM:
+	OR	RPH_DEFACR		; COMBINE WITH DEFAULT BITS
+	OUT0	(RPH_ACR),A		; BANK INDEX TO RPH ACR REGISTER
+	XOR	A			; ZERO ACCUM
+	OUT0	(Z180_BBR),A		; ZERO BANK BASE
+	RET				; DONE
+#ENDIF
+;
 ;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
 ; Copy Data - Possibly between banks.  This resembles CP/M 3, but
 ;  usage of the HL and DE registers is reversed.
@@ -1101,6 +1123,11 @@ Z280_BOOTERR	.TEXT	"\r\n\r\n*** Application mode boot not supported under Z280 n
 	OUT0	(N8_ACR),A		; ... REGISTER IS INITIALIZED
 #ENDIF
 ;
+#IF (PLATFORM == PLT_RPH)
+	LD	A,RPH_DEFACR		; ENSURE RPH ACR
+	OUT0	(RPH_ACR),A		; ... REGISTER IS INITIALIZED
+#ENDIF
+;
 #IF (DIAGENABLE)
 	LD	A,%00000001
 	OUT	(DIAGPORT),A
@@ -1238,7 +1265,7 @@ Z280_INITZ:
 	LD	A,$F0
 	OUT0	(Z180_DCNTL),A
 
-  #IF ((MEMMGR == MM_Z180) | (MEMMGR == MM_N8))
+  #IF ((MEMMGR == MM_Z180) | (MEMMGR == MM_N8) | (MEMMGR == MM_RPH))
 	; Z180 MMU SETUP
 	LD	A,$80
 	OUT0	(Z180_CBAR),A		; SETUP FOR 32K/32K BANK CONFIG
@@ -1919,20 +1946,20 @@ HB_CPUSPD2:
 ;
 	LD	HL,(HB_CPUOSC)	; INIT HL TO CPU OSC FREQ (KHZ)
 ;
-  #IF (Z180_CLKDIV == 0)
 	; ADJUST HL TO REFLECT HALF SPEED OPERATION
 	SRL	H		; ADJUST HL ASSUMING
 	RR	L		; HALF SPEED OPERATION
-  #ENDIF
 ;	
-  #IF (Z180_CLKDIV == 1)
+  #IF (Z180_CLKDIV >= 1)
 	LD	A,(HB_CPUTYPE)	; GET CPU TYPE
 	CP	2		; Z8S180 REV K OR BETTER?
 	JR	C,HB_CPU3	; IF NOT, NOT POSSIBLE!
 	; SET CLOCK DIVIDE TO 1 RESULTING IN FULL XTAL SPEED
 	LD	A,$80
 	OUT0	(Z180_CCR),A
-	; HL ALREADY REFLECTS FULL SPEED OPERATION
+	; ADJUST HL TO REFLECT FULL SPEED OPERATION
+	SLA	L
+	RL	H
   #ENDIF
 ;
   #IF (Z180_CLKDIV >= 2)
@@ -2419,6 +2446,9 @@ HB_Z280BUS1:
 #ENDIF
 #IF (MEMMGR == MM_MBC)
 	.TEXT	"MBC$"
+#ENDIF
+#IF (MEMMGR == MM_RPH)
+	.TEXT	"RPH$"
 #ENDIF
 	CALL	PRTSTRD
 	.TEXT	" MMU$"
@@ -2957,8 +2987,8 @@ HB_INITTBL:
 #IF (VGAENABLE)
 	.DW	VGA_INIT
 #ENDIF
-#IF (NECENABLE)
-	.DW	NEC_INIT
+#IF (GDCENABLE)
+	.DW	GDC_INIT
 #ENDIF
 #IF (TMSENABLE)
 	.DW	TMS_INIT
@@ -4072,19 +4102,33 @@ SYS_GETCPUSPD1:
 #ENDIF
 ;
 #IF (CPUFAM == CPU_Z180)
-	IN0	A,(Z180_CMR)		; GET CLOCK MULTIPLIER
-	RLCA				; ROTATE BIT TO BIT 0
-	AND	%00000001		; ISOLATE IT
-	LD	H,A			; SAVE IN H
+	LD	HL,0			; INIT CPU SPEED TO HALF
+	LD	A,(HB_CPUTYPE)		; LOAD CPUTYPE
+	CP	2			; S-CLASS OR ABOVE?
+	JR	C,SYS_GETCPUSPD1	; IF NOT, NO CCR/CMR
+;
+	; GET CCR BIT
 	IN0	A,(Z180_CCR)		; GET CLOCK CONTROL
 	RLCA				; ROTATE BIT TO BIT 0
 	AND	%00000001		; ISOLATE IT
 	LD	L,A			; SAVE IN L
+;
+	LD	A,(HB_CPUTYPE)		; LOAD CPUTYPE
+	CP	3			; REV. N?
+	JR	C,SYS_GETCPUSPD1	; IF NOT, NO CMR
+;
+	; GET CMR BIT
+	IN0	A,(Z180_CMR)		; GET CLOCK MULTIPLIER
+	RLCA				; ROTATE BIT TO BIT 0
+	AND	%00000001		; ISOLATE IT
+	LD	H,A			; SAVE IN H
+;
+SYS_GETCPUSPD1:
+	; CALC FINAL MULTIPLIER TO L
 	XOR	A			; CLEAR ACCUM
 	ADD	A,H			; ADD IN CMR BIT
 	ADD	A,L			; ADD IN CCR BIT
 	LD	L,A			; SAVE RESULT IN L
-;
 	; DCNTL = MMII????
 	IN0	A,(Z180_DCNTL)		; GET WAIT STATES
 	RLCA				; ROTATE MEM WS BITS
@@ -4348,6 +4392,29 @@ SYS_SETCPUSPD3:
 #ENDIF
 ;
 #IF (CPUFAM == CPU_Z180)
+	; VERIFY THAT REQUESTED SETTINGS ARE ALLOWED BY HARDWARE
+	LD	A,L			; GET SPEED REQUESTED
+	CP	$FF			; NO CHANGE?
+	JR	Z,SYS_SETCPUSPD0A	; SKIP CHECK
+	LD	A,(HB_CPUTYPE)		; 1=ORIG, 2=REVK, 3=REVN
+	INC	L			; 1=HALF,2=FULL,3=DOUBLE
+	CP	L			; TOO HIGH FOR CPU TYPE?
+	JP	C,SYS_SETCPUSPD_ERR	; CPU CAN'T DO SPD MULT
+	DEC	L			; RESTORE ORIG REQUEST
+SYS_SETCPUSPD0A:
+	LD	A,D			; MEM WS
+	CP	$FF			; NO CHANGE?
+	JR	Z,SYS_SETCPUSPD0B	; SKIP CHECK
+	CP	4			; TOO HIGH?
+	JP	NC,SYS_SETCPUSPD_ERR	; >3 IS TOO HIGH
+SYS_SETCPUSPD0B:
+	LD	A,D			; I/O WS
+	CP	$FF			; NO CHANGE?
+	JR	Z,SYS_SETCPUSPD0C	; SKIP CHECK
+	CP	4			; TOO HIGH?
+	JP	NC,SYS_SETCPUSPD_ERR	; >3 IS TOO HIGH
+SYS_SETCPUSPD0C:
+;
 	PUSH	DE			; SAVE WAIT STATES FOR NOW
 	; BEFORE IMPLEMENTING THE NEW CPU SPEED, WE SWITCH THE
 	; WAIT STATES TO MAXIMUM BECAUSE WE MAY BE IMPLEMENTING
@@ -4374,11 +4441,11 @@ SYS_SETCPUSPD1:
 	LD	C,%10000000		; SET CCR BIT
 SYS_SETCPUSPD2:
 ;
+	; IMPLEMENT THE NEW CPU SPEED
 	IN0	A,(Z180_CMR)
 	AND	~%10000000
 	OR	B
 	OUT0	(Z180_CMR),A
-;
 	IN0	A,(Z180_CCR)
 	AND	~%10000000
 	OR	C
@@ -5772,12 +5839,12 @@ SIZ_TMS		.EQU	$ - ORG_TMS
 		.ECHO	" bytes.\n"
 #ENDIF
 ;
-#IF (NECENABLE)
-ORG_NEC	.EQU	$
-  ;#INCLUDE "nec.asm"
-SIZ_NEC	.EQU	$ - ORG_NEC
-		.ECHO	"NEC occupies "
-		.ECHO	SIZ_NEC
+#IF (GDCENABLE)
+ORG_GDC	.EQU	$
+  #INCLUDE "gdc.asm"
+SIZ_GDC	.EQU	$ - ORG_GDC
+		.ECHO	"GDC occupies "
+		.ECHO	SIZ_GDC
 		.ECHO	" bytes.\n"
 #ENDIF
 ;
@@ -5841,7 +5908,7 @@ SIZ_FONTS	.EQU	$ - ORG_FONTS
 		.ECHO	SIZ_FONTS
 		.ECHO	" bytes.\n"
 ;
-#IF (CVDUENABLE | VGAENABLE) | (TMSENABLE & (TMSMODE == TMSMODE_RCKBD))
+#IF (CVDUENABLE | VGAENABLE) | GDCENABLE | (TMSENABLE & ((TMSMODE == TMSMODE_RCKBD) | (TMSMODE == TMSMODE_MBC)))
 ORG_KBD		.EQU	$
   #INCLUDE "kbd.asm"
 SIZ_KBD		.EQU	$ - ORG_KBD
@@ -6066,7 +6133,7 @@ SIZ_AY38910	.EQU	$ - ORG_AY38910
 ;
 ; INCLUDE LZSA2 decompression engine if required.
 ;
-#IF ((VGAENABLE | CVDUENABLE | TMSENABLE) & USELZSA2)
+#IF ((VGAENABLE | CVDUENABLE | TMSENABLE | GDCENABLE) & USELZSA2)
 #INCLUDE "unlzsa2s.asm"
 #ENDIF
 ;
@@ -6860,11 +6927,11 @@ PIO_MODE_STR:	.TEXT	"Output$"
 ; VIDEO DEVICE STRINGS
 ;
 PS_VDSTRREF:
-	.DW	PS_VDVDU, PS_VDCVDU, PS_VDNEC, PS_VDTMS, PS_VDVGA
+	.DW	PS_VDVDU, PS_VDCVDU, PS_VDGDC, PS_VDTMS, PS_VDVGA
 ;
 PS_VDVDU	.TEXT	"VDU$"
 PS_VDCVDU	.TEXT	"CVDU$"
-PS_VDNEC	.TEXT	"NEC$"
+PS_VDGDC	.TEXT	"GDC$"
 PS_VDTMS	.TEXT	"TMS$"
 PS_VDVGA	.TEXT	"VGA$"
 ;

Source/HBIOS/hbios.inc

@@ -136,6 +136,7 @@ PLT_SCZ180	.EQU	10		; SCZ180
 PLT_DYNO	.EQU	11		; DYNO MICRO-ATX MOTHERBOARD
 PLT_RCZ280	.EQU	12		; RC2014 W/ Z280
 PLT_MBC		.EQU	13		; MULTI BOARD COMPUTER
+PLT_RPH		.EQU	14		; RHYOPHYRE GRAPHICS COMPUTER
 ;
 ; HBIOS GLOBAL ERROR RETURN VALUES
 ;
@@ -217,7 +218,7 @@ RTCDEV_RP5	.EQU	$50		; RP5C01
 ;
 VDADEV_VDU	.EQU	$00		; ECB VDU - MOTOROLA 6545
 VDADEV_CVDU	.EQU	$10		; ECB COLOR VDU - MOS 8563
-VDADEV_NEC	.EQU	$20		; ECB UPD7220 - NEC UPD7220
+VDADEV_GDC	.EQU	$20		; GRAPHICS DISPLAY CTLR - UPD7220
 VDADEV_TMS	.EQU	$30		; N8 ONBOARD VDA SUBSYSTEM - TMS 9918
 VDADEV_VGA	.EQU	$40		; ECB VGA3 - HITACHI HD6445
 ;VDADEV_V9958	.EQU	$50		; V9958 VDU

Source/HBIOS/std.asm

@@ -15,6 +15,7 @@
 ; 11. DYNO	Steve Garcia's Dyno Micro-ATX Motherboard
 ; 12. RCZ280	Z280 CPU on RC2014 or ZZ80MB
 ; 13. MBC	Andrew Lynch's Multi Board Computer
+; 14. RPH	Andrew Lynch's RHYOPHYRE Graphics Computer
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;
@@ -70,6 +71,7 @@ MM_Z180		.EQU	4		; Z180 NATIVE MEMORY MANAGER
 MM_Z280		.EQU	5		; Z280 NATIVE MEMORY MANAGER
 MM_ZRC		.EQU	6		; ZRC BANK SWITCHING
 MM_MBC		.EQU	7		; MBC MEMORY MANAGER
+MM_RPH		.EQU	8		; Z180 WITH RPH EXTENSIONS
 ;
 ; BOOT STYLE
 ;
@@ -170,6 +172,7 @@ PPIDEMODE_MFP	.EQU	3		; MULTIFUNCTION / PIC
 PPIDEMODE_N8	.EQU	4		; MULTIFUNCTION / PIC
 PPIDEMODE_RC	.EQU	5		; RC2014 PPIDE MODULE @ $20 (ED BRINDLEY)
 PPIDEMODE_DYNO	.EQU	6		; DYNO PPIDE @ $4C
+PPIDEMODE_RPH	.EQU	7		; RHYOPHYRE (RPH)
 ;
 ; SD MODE SELECTIONS
 ;
@@ -196,7 +199,7 @@ AYMODE_LINC	.EQU	6		; LINC Z50 AY SOUND CARD
 AYMODE_MBC	.EQU	7		; MBC SOUND BOARD
 ;
 ; SN SOUND CHIP MODE SELECTIONS
-; 
+;
 SNMODE_NONE	.EQU	0
 SNMODE_RCZ80	.EQU	1		; RC2014 SOUND MODULE
 SNMODE_VGM	.EQU	2		; VGM ECB BOARD
@@ -209,6 +212,7 @@ TMSMODE_N8	.EQU	2		; N8 BUILT-IN VIDEO
 TMSMODE_RC	.EQU	3		; RC2014 TMS9918 VIDEO BOARD
 TMSMODE_RCV9958	.EQU	4		; RC2014 V9958 VIDEO BOARD
 TMSMODE_RCKBD	.EQU	5		; RC2014 TMS9918 + PS2 KEYBOARD
+TMSMODE_MBC	.EQU	6		; MBC V9938/58 VIDEO BOARD
 ;
 ; CVDU VIDEO MODE SELECTIONS
 ;
@@ -222,6 +226,18 @@ CVDUMON_NONE	.EQU	0
 CVDUMON_CGA	.EQU	1		; CGA MONITOR TIMING (16.000 MHZ OSC)
 CVDUMON_EGA	.EQU	2		; EGA MONITOR TIMING (16.257 MHZ OSC)
 ;
+; GDC VIDEO MODE SELECTIONS
+;
+GDCMODE_NONE	.EQU	0
+GDCMODE_ECB	.EQU	1		; ECB GDC
+GDCMODE_RPH	.EQU	2		; RPH GDC
+;
+; GDC MONITOR SELECTIONS
+;
+GDCMON_NONE	.EQU	0
+GDCMON_CGA	.EQU	1		; CGA MONITOR TIMING (16.000 MHZ OSC)
+GDCMON_EGA	.EQU	2		; EGA MONITOR TIMING (16.257 MHZ OSC)
+;
 ; DMA MODE SELECTIONS
 ;
 DMAMODE_NONE	.EQU	0
@@ -552,22 +568,22 @@ BID_ROMDN	.SET	$FF		; ROM DRIVE DISABLED
 	.ECHO "BID_BIOS: " \ .ECHO BID_BIOS \ .ECHO "\n"
 	.ECHO "BID_USR: " \ .ECHO BID_USR \ .ECHO "\n"
 	.ECHO "BID_COM: " \ .ECHO BID_COM \ .ECHO "\n"
-	
+
 	.ECHO "BID_BOOT: " \ .ECHO BID_BOOT \ .ECHO "\n"
 	.ECHO "BID_IMG0: " \ .ECHO BID_IMG0 \ .ECHO "\n"
 	.ECHO "BID_IMG1: " \ .ECHO BID_IMG1 \ .ECHO "\n"
 	.ECHO "BID_IMG2: " \ .ECHO BID_IMG2 \ .ECHO "\n"
-	
+
 	.ECHO "BID_ROMD0: " \ .ECHO BID_ROMD0 \ .ECHO "\n"
 	.ECHO "BID_ROMDN: " \ .ECHO BID_ROMDN \ .ECHO "\n"
 	.ECHO "BID_RAMD0: " \ .ECHO BID_RAMD0 \ .ECHO "\n"
 	.ECHO "BID_RAMDN: " \ .ECHO BID_RAMDN \ .ECHO "\n"
-	
+
 	.ECHO "BID_ROM0: " \ .ECHO BID_ROM0 \ .ECHO "\n"
 	.ECHO "BID_ROMN: " \ .ECHO BID_ROMN \ .ECHO "\n"
 	.ECHO "BID_RAM0: " \ .ECHO BID_RAM0 \ .ECHO "\n"
 	.ECHO "BID_RAMN: " \ .ECHO BID_RAMN \ .ECHO "\n"
-#ENDIF		
+#ENDIF
 ;
 ; MEMORY LAYOUT
 ;
@@ -705,7 +721,7 @@ INT_CTC0D	.EQU	15	; ZILOG CTC 0, CHANNEL D
 ;INT_PIO0B	.EQU	10	; ZILOG PIO 0, CHANNEL B
 ;INT_PIO1A	.EQU	11	; ZILOG PIO 1, CHANNEL A
 ;INT_PIO1B	.EQU	12	; ZILOG PIO 1, CHANNEL B
-    
+
     #ELSE
 
 INT_CTC0A	.EQU	0	; ZILOG CTC 0, CHANNEL A

Source/HBIOS/tms.asm

@@ -63,9 +63,22 @@ TMS_PPIX	.EQU	0		; PPI CONTROL PORT
 
 #ENDIF
 ;
+#IF (TMSMODE == TMSMODE_MBC)
+
+TMS_DATREG	.EQU	$98		; READ/WRITE DATA
+TMS_CMDREG	.EQU	$99		; READ STATUS / WRITE REG SEL
+TMS_ACR		.EQU	$9C		; AUX CONTROL REGISTER
+TMS_PPIA	.EQU	0		; PPI PORT A
+TMS_PPIB	.EQU	0		; PPI PORT B
+TMS_PPIC	.EQU	0		; PPI PORT C
+TMS_PPIX	.EQU	0		; PPI CONTROL PORT
+TMS_KBDDATA	.EQU	$E2		; KBD CTLR DATA PORT
+TMS_KBDST	.EQU	$E3		; KBD CTLR STATUS/CMD PORT
+#ENDIF
+
 TMS_ROWS	.EQU	24
 
-#IF (TMSMODE == TMSMODE_RCV9958)
+#IF ((TMSMODE == TMSMODE_RCV9958) | (TMSMODE == TMSMODE_MBC))
 TMS_FNTVADDR	.EQU	$1000		; VRAM ADDRESS OF FONT DATA
 TMS_COLS	.EQU	80
 #ELSE
@@ -86,7 +99,7 @@ TERMENABLE	.SET	TRUE		; INCLUDE TERMINAL PSEUDODEVICE DRIVER
 #DEFINE		TMS_IODELAY	EX (SP),HL \ EX (SP),HL	; 38 W/S
 #ELSE
 ; BELOW WAS TUNED FOR SBC AT 8MHZ
-#IF (TMSMODE == TMSMODE_RCV9958)
+#IF ((TMSMODE == TMSMODE_RCV9958) | (TMSMODE == TMSMODE_MBC))
 #DEFINE		TMS_IODELAY	NOP \ NOP \ NOP \ NOP \ NOP \ NOP \ NOP ; V9958 NEEDS AT WORST CASE, APPROX 4us (28T) DELAY BETWEEN I/O (WHEN IN TEXT MODE)
 #ELSE
 #DEFINE		TMS_IODELAY	NOP \ NOP ; 8 W/S
@@ -110,18 +123,28 @@ TMS_INIT:
 	CALL	TMS_Z180IO
 #ENDIF
 ;
-#IF (TMSMODE == TMSMODE_SCG)
+#IF ((TMSMODE == TMSMODE_SCG) | (TMSMODE == TMSMODE_MBC))
 	LD	A,$FF
 	OUT	(TMS_ACR),A		; INIT AUX CONTROL REG
 #ENDIF
-;
-	LD	IY,TMS_IDAT		; POINTER TO INSTANCE DATA
 ;
 	CALL	NEWLINE			; FORMATTING
 	PRTS("TMS: MODE=$")
+
+#IF ((TMSMODE == TMSMODE_MBC))
+	LD	A,$FE
+	OUT	(TMS_ACR),A		; INIT AUX CONTROL REG
+#ENDIF
+
+
+	LD	IY,TMS_IDAT		; POINTER TO INSTANCE DATA
+;
 #IF (TMSMODE == TMSMODE_SCG)
 	PRTS("SCG$")
 #ENDIF
+#IF (TMSMODE == TMSMODE_MBC)
+	PRTS("MBC$")
+#ENDIF
 #IF (TMSMODE == TMSMODE_N8)
 	PRTS("N8$")
 #ENDIF
@@ -153,7 +176,7 @@ TMS_INIT1:
 #IF (TMSMODE == TMSMODE_N8)
 	CALL	PPK_INIT		; INITIALIZE PPI KEYBOARD DRIVER
 #ENDIF
-#IF (TMSMODE == TMSMODE_RCKBD)
+#IF ((TMSMODE == TMSMODE_RCKBD) | (TMSMODE == TMSMODE_MBC))
 	CALL	KBD_INIT		; INITIALIZE 8242 KEYBOARD DRIVER
 #ENDIF
 #IF MKYENABLE
@@ -208,7 +231,7 @@ TMS_FNTBL:
 	.DW	PPK_FLUSH
 	.DW	PPK_READ
 #ELSE
-  #IF  (TMSMODE == TMSMODE_RCKBD)
+  #IF  ((TMSMODE == TMSMODE_RCKBD) | (TMSMODE == TMSMODE_MBC))
   	.DW	KBD_STAT
   	.DW	KBD_FLUSH
   	.DW	KBD_READ
@@ -217,7 +240,7 @@ TMS_FNTBL:
   	.DW	MKY_STAT
   	.DW	MKY_FLUSH
   	.DW	MKY_READ
-  
+
     #ELSE
   	.DW	TMS_STAT
   	.DW	TMS_FLUSH
@@ -412,7 +435,7 @@ TMS_SET:
 ;----------------------------------------------------------------------
 ;
 TMS_WR:
-#IF (TMSMODE == TMSMODE_RCV9958)
+#IF ((TMSMODE == TMSMODE_RCV9958)  | (TMSMODE == TMSMODE_MBC))
         ; CLEAR R#14 FOR V9958
         XOR     A
         OUT     (TMS_CMDREG), A
@@ -903,12 +926,13 @@ TMS_IDAT:
 	.DB	TMS_PPIC        ; PPI PORT C
 	.DB	TMS_PPIX        ; PPI CONTROL PORT
 #ENDIF
-#IF (TMSMODE == TMSMODE_RCKBD)
+#IF ((TMSMODE == TMSMODE_RCKBD) | (TMSMODE == TMSMODE_MBC))
 	.DB	TMS_KBDST	; 8242 CMD/STATUS PORT
 	.DB	TMS_KBDDATA	; 8242 DATA PORT
+	.DB	0		; FILLER
+	.DB	0		; FILER
 #ENDIF
-
-TMS_PORTS:
+;
 	.DB	TMS_DATREG
 	.DB	TMS_CMDREG
 ;
@@ -954,7 +978,7 @@ TMS_PORTS:
 ; 5S		Fifth sprite (not displayed) detected. Value in FS* is valid.
 ; INT		Set at each screen update, used for interrupts.
 ;
-#IF (TMSMODE == TMSMODE_RCV9958)
+#IF ((TMSMODE == TMSMODE_RCV9958)  | (TMSMODE == TMSMODE_MBC))
 TMS_INITVDU:
 	.DB	$04		; REG 0 - NO EXTERNAL VID, SET M4 = 1
 TMS_INITVDU_REG_1:
@@ -989,7 +1013,3 @@ TMS_INITVDULEN	.EQU	$ - TMS_INITVDU
 #IF (CPUFAM == CPU_Z180)
 TMS_DCNTL	.DB	$00	; SAVE Z180 DCNTL AS NEEDED
 #ENDIF
-;
-	.ECHO	"TMS instance data occupies "
-	.ECHO	$ - TMS_IDAT
-	.ECHO	" bytes\n"

Source/ver.inc

@@ -2,4 +2,4 @@
 #DEFINE	RMN	1
 #DEFINE	RUP	1
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.1.1-pre.165"
+#DEFINE BIOSVER	"3.1.1-pre.171"

Source/ver.lib

@@ -3,5 +3,5 @@ rmn	equ	1
 rup	equ	1
 rtp	equ	0
 biosver	macro
-	db	"3.1.1-pre.165"
+	db	"3.1.1-pre.171"
 	endm