;
;==================================================================================================
; NABU HARDWARE DRIVER
;==================================================================================================
;
; NABU INTERRUPT ENABLE PORT AND STATUS PORTS ARE MANAGED BY THE
; PSG IO PORTS.
;
; NABU CONTROL PORT - INTERRUPT ENABLE (OUTPUT) - PSG PORT A
;
;	D7 - HCCA Receive
;	D6 - HCCA Send
;	D5 - Keyboard
;	D4 - Video Frame Sync
;	D3 - Option Card 0 (J9)
;	D2 - Option Card 1 (J10)
;	D1 - Option Card 2 (J11)
;	DO - Option Card 3 (J12)
;
; THE CONTROL PORT IS WRITE ONLY AND THE BITS NEED TO BE MANAGED IN
; MULTIPLE DRIVERS.  BELOW, WE ALLOCATE NBAU_CTLVAL AS A SHADOW
; REGISTER FOR THE CONTROL PORT.  IT IS INITIALIZED TO ZERO HERE
; (ALL INTS DISABLED).  THE INDIVIDUAL BITS ARE SET AS APPROPIATE IN
; THE DRIVERS THAT WANT THE INTERRUPTS ENABLED (NABUKB, TMS).
;
; NABU STATUS PORT - STATUS BYTE (INPUT) - PSG PORT B
;
;	D7 - N.C.
;	D6 - Overrun Error (HCCA UART)
;	D5 - Framing Error (HCCA UART)
;	D4 - Printer Busy
;	D3 - A2 Priority
;	D2 - A1 Priority
;	D1 - AO Priority
;	DO - Interrupt Request
;
; PORTS TO MANAGE PSG
;
NABU_BASE	.EQU	$40		; BASE PORT FOR NABU PSG
NABU_RSEL	.EQU	NABU_BASE + 1	; SELECT PSG REGISTER
NABU_RDAT	.EQU	NABU_BASE + 0	; WRITE TO SELECTED REGISTER
NABU_RIN	.EQU	NABU_BASE + 0	; READ FROM SELECTED REGISTER
;
	DEVECHO	"NABU: IO="
	DEVECHO	NABU_BASE
	DEVECHO	"\n"
;
;--------------------------------------------------------------------------------------------------
;   HBIOS MODULE HEADER
;--------------------------------------------------------------------------------------------------
;
ORG_NABU	.EQU	$
;
	.DW	SIZ_NABU		; MODULE SIZE
	.DW	NABU_INITPHASE		; ADR OF INIT PHASE HANDLER
;
NABU_INITPHASE:
	; INIT PHASE HANDLER, A=PHASE
	CP	HB_PHASE_PREINIT	; PREINIT PHASE?
	JP	Z,NABU_PREINIT		; DO PREINIT
	CP	HB_PHASE_INIT		; INIT PHASE?
	JP	Z,NABU_INIT		; DO INIT
	RET				; DONE
;
; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION
;
NABU_PREINIT:
;
	; RESET SHADOW REGISTER IN CASE WE ARE DOING AN HBIOS
	; RESTART IN PLACE
	XOR	A			; ALL INTERRUPTS DISABLED
	LD	(NABU_CTLVAL),A		; SAVE IT
;
	; INITIALIZE THE NABU PSG I/O PORTS
	; PORT A (CONTROL PORT) IN WRITE MODE
	; PORT B (STATUS PORT) IN READ MODE
	; INITIALIZE THE CONTROL REGISTER
;
	; SET I/O PORT MODES
	LD	A,7			; PSG R7 (ENABLE REG)
	OUT	(NABU_RSEL),A		; SELECT IT
	LD	A,%01111111		; PORT B INPUT, PORT A OUPUT, AUDIO CHANNELS DISABLED
	OUT	(NABU_RDAT),A		; SET IT
;
	; INITIALIZE PORT A VALUE
	LD	A,14			; PSG R14 (PORT A DATA)
	OUT	(NABU_RSEL),A		; SELECT IT
	LD	A,(NABU_CTLVAL)		; GET CTL VALUE SHADOW REG
	OUT	(NABU_RDAT),A		; WRITE TO HARDWARE
;
	XOR	A			; SIGNAL SUCCESS
	RET				; DONE
;
; POST CONSOLE INITIALIZATION
;
NABU_INIT:
	CALL	NEWLINE			; FORMATTING
	PRTS("NABU: IO=$")
	LD	A,NABU_BASE
	CALL	PRTHEXBYTE
	XOR	A			; SIGNAL SUCCESS
	RET				; DONE
;
; DATA STORAGE
;
NABU_CTLVAL	.DB	0		; SHADOW VAL FOR NABU CONTROL REGISTER
;
;--------------------------------------------------------------------------------------------------
;   HBIOS MODULE TRAILER
;--------------------------------------------------------------------------------------------------
;
END_NABU	.EQU	$
SIZ_NABU	.EQU	END_NABU - ORG_NABU
;	
	MEMECHO	"NABU occupies "
	MEMECHO	SIZ_NABU
	MEMECHO	" bytes.\n"