; ;================================================================================================== ; ROMWBW DEFAULT BUILD SETTINGS FOR S100 T35 FPGA Z80 ;================================================================================================== ; ; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM ; INDICATED ABOVE. THESE SETTINGS DEFINE THE OFFICIAL BUILD FOR THIS ; PLATFORM AS DISTRIBUTED IN ROMWBW RELEASES. ; ; ROMWBW USES CASCADING CONFIGURATION FILES AS INDICATED BELOW: ; ; cfg_MASTER.asm - MASTER: CONFIGURATION FILE DEFINES ALL POSSIBLE ROMWBW SETTINGS ; | ; +-> cfg_.asm - PLATFORM: DEFAULT SETTINGS FOR SPECIFIC PLATFORM ; | ; +-> Config/_std.asm - BUILD: SETTINGS FOR EACH OFFICIAL DIST BUILD ; | ; +-> Config/_.asm - USER: CUSTOM USER BUILD SETTINGS ; ; THE TOP (MASTER CONFIGURATION) FILE DEFINES ALL POSSIBLE ROMWBW ; CONFIGURATION SETTINGS. EACH FILE BELOW THE MASTER CONFIGURATION FILE ; INHERITS THE CUMULATIVE SETTINGS OF THE FILES ABOVE IT AND MAY ; OVERRIDE THESE SETTINGS AS DESIRED. ; ; OTHER THAN THE TOP MASTER FILE, EACH FILE MUST "#INCLUDE" ITS PARENT ; FILE (SEE #INCLUDE STATEMENT BELOW). THE TOP TWO FILES SHOULD NOT BE ; MODIFIED. ; ; TO CUSTOMIZE YOUR BUILD SETTINGS YOU SHOULD MODIFY THIS FILE, THE ; DEFAULT BUILD SETTINGS (Config/_std.asm) OR PREFERABLY ; CREATE AN OPTIONAL CUSTOM USER SETTINGS FILE THAT INCLUDES THE DEFAULT ; BUILD SETTINGS FILE (SEE EXAMPLE Config/SBC_user.asm). ; ; BY CREATING A CUSTOM USER SETTINGS FILE, YOU ARE LESS LIKELY TO BE ; IMPACTED BY FUTURE CHANGES BECAUSE YOU WILL BE INHERITING MOST ; OF YOUR SETTINGS WHICH WILL BE UPDATED BY AUTHORS AS ROMWBW EVOLVES. ; ; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE ; SOURCE DIRECTORY (TWO DIRECTORIES ABOVE THIS ONE). ; ; *** WARNING: ASIDE FROM THE MASTER CONFIGURATION FILE, YOU MUST USE ; ".SET" TO OVERRIDE SETTINGS. THE ASSEMBLER WILL ERROR IF YOU ATTEMPT ; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU". ; #DEFINE PLATFORM_NAME "S100 TRION Z80", " [", CONFIG, "]" ; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES #DEFINE AUTO_CMD "" ; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED #DEFINE DEFSERCFG SER_19200_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION ; #INCLUDE "cfg_SZ80.asm" ; CPUOSC .SET 8000000 ; CPU OSC FREQ IN MHZ RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512|SZ80] ; FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS ; DS5RTCENABLE .SET TRUE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM) ; DLPSERENABLE .SET TRUE ; DLPSER: ENABLE DLP-USB SERIAL DRIVER (DLPSER.ASM) DLPSERCNT .SET 1 ; DLPSER: NUMBER OF DEVICES TO DETECT (1-2) DLPSER0STAT .SET $AA ; DLPSER1: STATUS PORT ADDRESS DLPSER0DATA .SET $AC ; DLPSER1: DATA PORT ADDRESS TSERENABLE .SET TRUE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM) SCCENABLE .SET TRUE ; SCC: ENABLE ZILOG SCC SERIAL DRIVER (SCC.ASM) SCONENABLE .SET TRUE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM) ; LPTENABLE .SET TRUE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM) ; TVGAENABLE .SET TRUE ; TVGA: ENABLE TRION VGA VIDEO DRIVER (TVGA.ASM) ; PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDECNT .SET 3 ; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP PPIDE0MODE .SET PPIDEMODE_STD ; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B] PPIDE0BASE .SET $30 ; PPIDE 0: PPI REGISTERS BASE ADR PPIDE1MODE .SET PPIDEMODE_S100A ; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B] PPIDE1BASE .SET $38 ; PPIDE 1: PPI REGISTERS BASE ADR PPIDE2MODE .SET PPIDEMODE_S100B ; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B] PPIDE2BASE .SET $38 ; PPIDE 2: PPI REGISTERS BASE ADR ; SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) ; ESPSDENABLE .SET TRUE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM) ESPSDCNT .SET 1 ; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD ESPSD0DUAL .SET TRUE ; ESPSD 0: DUAL INTERFACE BOARD (DUAL SD)