; ;================================================================================================== ; ROMWBW 2.X CONFIGURATION DEFAULTS FOR ZETA V1 ;================================================================================================== ; ; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM ; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED. INSTEAD, YOU SHOULD ; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY ; UNDER THIS DIRECTORY. ; ; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS ; FOR THE PLATFORM. ; #DEFINE PLATFORM_NAME "ZETA" ; PLATFORM .EQU PLT_ZETA ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO] CPUFAM .EQU CPU_Z80 ; CPU_[Z80|Z180]: CPU FAMILY BIOS .EQU BIOS_WBW ; BIOS_[WBW|UNA]: HARDWARE BIOS BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD) USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION ; BOOT_TIMEOUT .EQU 0 ; AUTO BOOT TIMEOUT IN SECONDS, 0 TO DISABLE ; CPUOSC .EQU 20000000 ; CPU OSC FREQ IN MHZ INTMODE .EQU 0 ; INTERRUPT MODE: 0=NONE, 1=MODE 1, 2=MODE 2 DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) ; RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) MEMMGR .EQU MM_SBC ; MM_[SBC|Z2|N8|Z180]: MEMORY MANAGER MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY) MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY) ; RTCIO .EQU $70 ; RTC LATCH REGISTER ADR PPIBASE .EQU $60 ; PRIMARY PARALLEL PORT REGISTERS BASE ADR ; KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS ; CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT ; DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS ; LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED) LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED ; DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE) ; CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI] ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL) ; DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) ; BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS ; HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM) ; INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) ; UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART ; ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) ; ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) ; SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) ; XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG ; VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) NECENABLE .EQU FALSE ; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM) TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) ; SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) ; AYENABLE .EQU FALSE ; AY: ENABLE AY PSG SOUND DRIVER ; MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) ; FDENABLE .EQU TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .EQU FDMODE_ZETA ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3|DYNO] FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL) FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111] FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111] FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS ; RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER ; IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) ; PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) PPIDECNT .EQU 1 ; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP PPIDE0BASE .EQU $60 ; PPIDE 0: PPI REGISTERS BASE ADR PPIDE0A8BIT .EQU FALSE ; PPIDE 0A (MASTER): 8 BIT XFER PPIDE0B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER ; SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT] SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE ; PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) ; PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM) PPPSDENABLE .EQU TRUE ; PPP: ENABLE PPP DRIVER SD CARD SUPPORT PPPSDTRACE .EQU 1 ; PPP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL) PPPCONENABLE .EQU TRUE ; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT ; HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM) ; PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP ; UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)