;
;==================================================================================================
; UART DRIVER (SERIAL PORT)
;==================================================================================================
;
UART0_DIV	.EQU	(1843200 / (16 * BAUDRATE))
;
; CHARACTER DEVICE DRIVER ENTRY
;   A: RESULT (OUT), CF=ERR
;   B: FUNCTION (IN)
;   C: CHARACTER (IN/OUT)
;   E: DEVICE/UNIT (IN)
;
;
UART_DISPATCH:
	LD	A,B	; GET REQUESTED FUNCTION
	AND	$0F	; ISOLATE SUB-FUNCTION
	JP	Z,UART0_IN
	DEC	A
	JP	Z,UART0_OUT
	DEC	A
	JP	Z,UART0_IST
	DEC	A
	JP	Z,UART0_OST
	CALL	PANIC
;
;
;
UART_INIT:
	PRTS("UART0: IO=0x$")
	LD	A,SIO_BASE
	CALL	PRTHEXBYTE
	PRTS(" BAUD=$")
	LD	HL,BAUDRATE / 10
	CALL	PRTDEC
	PRTC('0')
	
	LD	A,80H
	OUT	(SIO_LCR),A		; DLAB ON
	LD	A,UART0_DIV
	OUT	(SIO_DLL),A		; SET DIVISOR (LS)
	LD	A,00H
	OUT	(SIO_DLM),A		; SET DIVISOR (MS)

	LD    	B,03H			; B = DEFAULT SETTING FOR MCR (DTR + RTS)

#IF (UARTAFC)
	PRTS(" AFC$")
	LD	A,$55			; TEST VALUE
	OUT	(SIO_SCR),A		; SET SCRATCH REG TO TEST VALUE
	LD	A,0BFH
	OUT	(SIO_LCR),A		; SET LCR=$BF TO ATTEMPT TO ACCESS EFR
	IN	A,(SIO_SCR)		; READ SCRATCH REGISTER
	CP	$55			; IF $55, NO EFR
	JR	NZ,UART_AFC1		; NZ, HAVE EFR, DO IT
	SET	5,B			; ENABLE AUTO FLOW CONTROL
	JR	UART_AFC2
UART_AFC1:
	LD	A,0C0H			; ENABLE CTS/RTS FLOW CONTROL
	OUT	(SIO_EFR),A		; SAVE IT
UART_AFC2:
#ENDIF

	LD	A,03H
	OUT	(SIO_LCR),A		; DLAB OFF, 8 DATA, 1 STOP, NO PARITY

	LD	A,B			; LOAD MCR VALUE TO SET
	OUT  	(SIO_MCR),A		; SAVE IT

#IF (UARTFIFO)
;	LD	A,07H			; ENABLE AND RESET FIFOS
	LD	A,01H			; ENABLE AND RESET FIFOS
	OUT	(SIO_FCR),A		; ENABLE FIFOS
	PRTS(" FIFO$")
#ENDIF
	RET
;
;
;
UART0_IN:
	CALL	UART0_IST
	OR	A
	JR	Z,UART0_IN
	IN	A,(SIO_RBR)	; READ THE CHAR FROM THE UART
	LD	E,A
	RET
;
;
;
UART0_IST:
	IN	A,(SIO_LSR)		; READ LINE STATUS REGISTER
	AND	$01			; TEST IF DATA IN RECEIVE BUFFER
	JP	Z,CIO_IDLE		; DO IDLE PROCESSING AND RETURN
	XOR	A
	INC	A			; SIGNAL CHAR READY, A = 1
	RET
;
;
;
UART0_OUT:
	CALL	UART0_OST
	OR	A
	JR	Z,UART0_OUT
	LD	A,E
	OUT	(SIO_THR),A		; THEN WRITE THE CHAR TO UART
	RET
;
UART0_OST:
	IN	A,(SIO_LSR)		; READ LINE STATUS REGISTER
	AND	$20
	JP	Z,CIO_IDLE		; DO IDLE PROCESSING AND RETURN
	XOR	A
	INC	A			; SIGNAL BUFFER EMPTY, A = 1
	RET