mirror of
https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 14:11:48 -06:00
8510158aa0
Use a global flag to indicate if interrupts have been enabled during the boot process. Drivers that operate in the pre-interrupt phase can use this to manage interrupt disable bracketing. This allows restoring the location of interrupt enable in the boot process to it's proper location.
902 lines
24 KiB
NASM
902 lines
24 KiB
NASM
;
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;==================================================================================================
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; ASCI DRIVER (Z180 SERIAL PORTS)
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;==================================================================================================
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;
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; SETUP PARAMETER WORD:
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; +-------+---+-------------------+ +---+---+-----------+---+-------+
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; | |RTS| ENCODED BAUD RATE | |DTR|XON| PARITY |STP| 8/7/6 |
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; +-------+---+---+---------------+ ----+---+-----------+---+-------+
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; F E D C B A 9 8 7 6 5 4 3 2 1 0
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; -- MSB (D REGISTER) -- -- LSB (E REGISTER) --
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;
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; STAT:
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; 7 6 5 4 3 2 1 0
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; R O P F R C T T
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; 0 0 0 0 0 0 0 0 DEFAULT VALUES
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; | | | | | | | |
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; | | | | | | | +-- TIE: TRANSMIT INTERRUPT ENABLE
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; | | | | | | +---- TDRE: TRANSMIT DATA REGISTER EMPTY
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; | | | | | +------ DCD0/CTS1E: CH0 CARRIER DETECT, CH1 CTS ENABLE
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; | | | | +-------- RIE: RECEIVE INTERRUPT ENABLE
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; | | | +---------- FE: FRAMING ERROR
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; | | +------------ PE: PARITY ERROR
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; | +-------------- OVRN: OVERRUN ERROR
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; +---------------- RDRF: RECEIVE DATA REGISTER FULL
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;
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; CNTLA:
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; 7 6 5 4 3 2 1 0
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; M R T R E M M M
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; 0 1 1 0 0 1 0 0 DEFAULT VALUES
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; | | | | | | | |
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; | | | | | | | +-- MOD0: STOP BITS: 0=1 BIT, 1=2 BITS
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; | | | | | | +---- MOD1: PARITY: 0=NONE, 1=ENABLED
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; | | | | | +------ MOD2: DATA BITS: 0=7 BITS, 1=8 BITS
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; | | | | +-------- MPBR/EFR: MULTIPROCESSOR BIT RECEIVE / ERROR FLAG RESET
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; | | | +---------- RTS0/CKA1D: CH0 ~RTS, CH1 CLOCK DISABLE
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; | | +------------ TE: TRANSMITTER ENABLE
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; | +-------------- RE: RECEIVER ENABLE
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; +---------------- MPE: MULTI-PROCESSOR MODE ENABLE
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;
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; CNTLB:
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; 7 6 5 4 3 2 1 0
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; T M P R D S S S
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; 0 0 X 0 X X X X DEFAULT VALUES
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; | | | | | | | |
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; | | | | | + + +-- SS: SOURCE/SPEED SELECT (R/W)
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; | | | | +-------- DR: DIVIDE RATIO (R/W)
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; | | | +---------- PEO: PARITY EVEN ODD (R/W)
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; | | +------------ PS: ~CTS/PS: CLEAR TO SEND(R) / PRESCALE(W)
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; | +-------------- MP: MULTIPROCESSOR MODE (R/W)
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; +---------------- MPBT: MULTIPROCESSOR BIT TRANSMIT (R/W)
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;
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; ASEXT:
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; 7 6 5 4 3 2 1 0
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; R D C X B F D S
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; 0 1 1 0 0 0 0 0 DEFAULT VALUES
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; | | | | | | | |
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; | | | | | | | +-- SEND BREAK
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; | | | | | | +---- BREAK DETECT (RO)
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; | | | | | +------ BREAK FEATURE ENABLE
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; | | | | +-------- BRG MODE
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; | | | +---------- X1 BIT CLK ASCI
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; | | +------------ CTS0 DISABLE
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; | +-------------- DCD0 DISABLE
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; +---------------- RDRF INT INHIBIT
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;
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ASCI_DEF_CNTLA .EQU $64
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ASCI_DEF_CNTLB .EQU $20
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ASCI_DEF_ASEXT .EQU $60
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;
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ASCI_BUFSZ .EQU 32 ; RECEIVE RING BUFFER SIZE
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;
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ASCI_NONE .EQU 0 ; NOT PRESENT
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ASCI_ASCI .EQU 1 ; ORIGINAL ASCI (Z8S180 REV. K)
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ASCI_ASCIB .EQU 2 ; REVISED ASCI W/ BRG & FIFO (Z8S180 REV. N)
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;
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ASCI0_BASE .EQU Z180_BASE ; RELATIVE TO Z180 INTERNAL IO PORTS
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ASCI1_BASE .EQU Z180_BASE + 1 ; RELATIVE TO Z180 INTERNAL IO PORTS
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;
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ASCI_RTS .EQU %00010000 ; ~RTS BIT OF CNTLA REG
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;
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#IF (ASCIINTS)
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;
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#IF (INTMODE > 0)
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;
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ASCI0_IVT .EQU IVT(INT_SER0)
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ASCI1_IVT .EQU IVT(INT_SER1)
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;
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#ENDIF
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;
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#ENDIF
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;
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;
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;
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ASCI_PREINIT:
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;
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; SETUP THE DISPATCH TABLE ENTRIES
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; NOTE: INTS WILL BE DISABLED WHEN PREINIT IS CALLED AND THEY MUST REMAIN
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; DISABLED.
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;
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LD B,ASCI_CFGCNT ; LOOP CONTROL
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XOR A ; ZERO TO ACCUM
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LD (ASCI_DEV),A ; CURRENT DEVICE NUMBER
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LD IY,ASCI_CFG ; POINT TO START OF CFG TABLE
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ASCI_PREINIT0:
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PUSH BC ; SAVE LOOP CONTROL
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CALL ASCI_INITUNIT ; HAND OFF TO GENERIC INIT CODE
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POP BC ; RESTORE LOOP CONTROL
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;
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LD A,(IY+1) ; GET THE ASCI TYPE DETECTED
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OR A ; SET FLAGS
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JR Z,ASCI_PREINIT2 ; SKIP IT IF NOTHING FOUND
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;
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PUSH BC ; SAVE LOOP CONTROL
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PUSH IY ; CFG ENTRY ADDRESS
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POP DE ; ... TO DE
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LD BC,ASCI_FNTBL ; BC := FUNCTION TABLE ADDRESS
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CALL NZ,CIO_ADDENT ; ADD ENTRY IF ASCI FOUND, BC:DE
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POP BC ; RESTORE LOOP CONTROL
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;
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ASCI_PREINIT2:
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LD DE,ASCI_CFGSIZ ; SIZE OF CFG ENTRY
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ADD IY,DE ; BUMP IY TO NEXT ENTRY
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DJNZ ASCI_PREINIT0 ; LOOP UNTIL DONE
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;
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#IF (ASCIINTS)
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;
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; Z180 ASCI INTERRUPTS OPERATE LIKE IM2 EVEN WHEN IM1 IS ACTIVE.
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;
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#IF (INTMODE > 0)
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; SETUP INT VECTORS AS APPROPRIATE
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LD A,(ASCI_DEV) ; GET DEVICE COUNT
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OR A ; SET FLAGS
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JR Z,ASCI_PREINIT3 ; IF ZERO, NO ASCI DEVICES, ABORT
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;
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; SETUP IM2 VECTORS
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LD HL,ASCI_INT0
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LD (ASCI0_IVT),HL ; IVT INDEX
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LD HL,ASCI_INT1
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LD (ASCI1_IVT),HL ; IVT INDEX
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;
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#ENDIF
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;
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#ENDIF
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;
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ASCI_PREINIT3:
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XOR A ; SIGNAL SUCCESS
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RET ; AND RETURN
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;
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; ASCI INITIALIZATION ROUTINE
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;
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ASCI_INITUNIT:
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CALL ASCI_DETECT ; DETERMINE ASCI TYPE
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LD (IY+1),A ; SAVE IN CONFIG TABLE
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OR A ; SET FLAGS
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RET Z ; ABORT IF NOTHING THERE
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; UPDATE WORKING ASCI DEVICE NUM
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LD HL,ASCI_DEV ; POINT TO CURRENT UART DEVICE NUM
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LD A,(HL) ; PUT IN ACCUM
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INC (HL) ; INCREMENT IT (FOR NEXT LOOP)
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LD (IY),A ; UPDATE UNIT NUM
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;
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; IT IS EASY TO SPECIFY A SERIAL CONFIG THAT CANNOT BE IMPLEMENTED
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; DUE TO THE CONSTRAINTS OF THE ASCI. HERE WE FORCE A GENERIC
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; FAILSAFE CONFIG ONTO THE CHANNEL. IF THE SUBSEQUENT "REAL"
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; CONFIG FAILS, AT LEAST THE CHIP WILL BE ABLE TO SPIT DATA OUT
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; AT A RATIONAL BAUD/DATA/PARITY/STOP CONFIG.
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CALL ASCI_INITSAFE
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;
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; SET DEFAULT CONFIG
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LD DE,-1 ; LEAVE CONFIG ALONE
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JP ASCI_INITDEV ; IMPLEMENT IT AND RETURN
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;
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;
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;
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ASCI_INIT:
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LD B,ASCI_CFGCNT ; COUNT OF POSSIBLE ASCI UNITS
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LD IY,ASCI_CFG ; POINT TO START OF CFG TABLE
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ASCI_INIT1:
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PUSH BC ; SAVE LOOP CONTROL
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LD A,(IY+1) ; GET ASCI TYPE
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OR A ; SET FLAGS
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CALL NZ,ASCI_PRTCFG ; PRINT IF NOT ZERO
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POP BC ; RESTORE LOOP CONTROL
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LD DE,ASCI_CFGSIZ ; SIZE OF CFG ENTRY
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ADD IY,DE ; BUMP IY TO NEXT ENTRY
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DJNZ ASCI_INIT1 ; LOOP TILL DONE
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;
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XOR A ; SIGNAL SUCCESS
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RET ; DONE
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;
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; RECEIVE INTERRUPT HANDLER
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;
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#IF (ASCIINTS)
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;
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#IF (INTMODE > 0)
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;
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ASCI_INT0:
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; INTERRUPT HANDLER FOR FIRST ASCI (ASCI0)
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LD IY,ASCI0_CFG ; POINT TO ASCI0 CFG
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JR ASCI_INTRCV
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;
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ASCI_INT1:
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; INTERRUPT HANDLER FOR SECOND ASCI (ASCI1)
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LD IY,ASCI1_CFG ; POINT TO ASCI1 CFG
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JR ASCI_INTRCV
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;
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; HANDLE INT FOR A SPECIFIC CHANNEL
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; BASED ON UNIT CFG POINTED TO BY IY
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;
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ASCI_INTRCV:
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; CHECK TO SEE IF SOMETHING IS ACTUALLY THERE
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CALL ASCI_ICHK ; CHECK FOR CHAR PENDING
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RET Z ; RETURN IF NOTHING AVAILABLE
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;
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ASCI_INTRCV1:
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; RECEIVE CHARACTER INTO BUFFER
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LD A,(IY+3) ; BASE PORT TO A
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ADD A,8 ; BUMP TO RDR PORT
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LD C,A ; PUT IN C, B IS STILL ZERO
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IN A,(C) ; READ PORT
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#IF (ASCIBOOT != 0)
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CP ASCIBOOT ; REBOOT REQUEST?
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JP Z,SYS_RESCOLD ; IF SO, DO IT, NO RETURN
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#ENDIF
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LD B,A ; SAVE BYTE READ
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LD L,(IY+6) ; SET HL TO
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LD H,(IY+7) ; ... START OF BUFFER STRUCT
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LD A,(HL) ; GET COUNT
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CP ASCI_BUFSZ ; COMPARE TO BUFFER SIZE
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JR Z,ASCI_INTRCV4 ; BAIL OUT IF BUFFER FULL, RCV BYTE DISCARDED
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INC A ; INCREMENT THE COUNT
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LD (HL),A ; AND SAVE IT
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CP ASCI_BUFSZ / 2 ; BUFFER GETTING FULL?
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JR NZ,ASCI_INTRCV2 ; IF NOT, BYPASS CLEARING RTS
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; CLEAR RTS
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; THE SECONDARY ASCI PORT ON Z180 ACTUALLY HAS NO RTS LINE
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; AND THE CNTLA BIT FOR THIS PORT CONTROLS THE FUNCTION OF THE
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; MULTIPLEXED CKA1/~TEND0 LINE. BELOW, WE TEST REG C TO SEE IF
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; IT IS AN ODD NUMBERED PORT. IF SO, WE MUST BE ON THE SECONDARY
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; SERIAL PORT, SO WE NEED TO BYPASS MANIPULATING THE RTS BIT.
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BIT 0,C ; IS C ADDRESSING AN ODD NUMBERED PORT?
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JR NZ,ASCI_INTRCV2 ; IF SO, THIS IS SEC SERIAL, NO RTS!
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PUSH BC ; PRESERVE READ CHAR
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LD C,(IY+3) ; CNTLA PORT ADR
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LD B,0 ; MSB FOR 16 BIT I/O
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IN A,(C) ; GET CUR CNTLA VAL
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OR ASCI_RTS ; DEASSERT ~RTS
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OUT (C),A ; DO IT
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POP BC ; RESTORE READ CHAR
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ASCI_INTRCV2:
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INC HL ; HL NOW HAS ADR OF HEAD PTR
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PUSH HL ; SAVE ADR OF HEAD PTR
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LD A,(HL) ; DEREFERENCE HL
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INC HL
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LD H,(HL)
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LD L,A ; HL IS NOW ACTUAL HEAD PTR
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LD (HL),B ; SAVE CHARACTER RECEIVED IN BUFFER AT HEAD
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INC HL ; BUMP HEAD POINTER
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POP DE ; RECOVER ADR OF HEAD PTR
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LD A,L ; GET LOW BYTE OF HEAD PTR
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SUB ASCI_BUFSZ+4 ; SUBTRACT SIZE OF BUFFER AND POINTER
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CP E ; IF EQUAL TO START, HEAD PTR IS PAST BUF END
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JR NZ,ASCI_INTRCV3 ; IF NOT, BYPASS
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LD H,D ; SET HL TO
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LD L,E ; ... HEAD PTR ADR
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INC HL ; BUMP PAST HEAD PTR
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INC HL
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INC HL
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INC HL ; ... SO HL NOW HAS ADR OF ACTUAL BUFFER START
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ASCI_INTRCV3:
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EX DE,HL ; DE := HEAD PTR VAL, HL := ADR OF HEAD PTR
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LD (HL),E ; SAVE UPDATED HEAD PTR
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INC HL
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LD (HL),D
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; CHECK FOR MORE PENDING...
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CALL ASCI_ICHK ; CHECK FOR CHAR PENDING
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JR NZ,ASCI_INTRCV1 ; IF SO, LOOP TO HANDLE
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ASCI_INTRCV4:
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OR $FF ; NZ SET TO INDICATE INT HANDLED
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RET ; AND RETURN
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;
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#ENDIF
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;
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#ENDIF
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;
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; DRIVER FUNCTION TABLE
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;
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ASCI_FNTBL:
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.DW ASCI_IN
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.DW ASCI_OUT
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.DW ASCI_IST
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.DW ASCI_OST
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.DW ASCI_INITDEV
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.DW ASCI_QUERY
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.DW ASCI_DEVICE
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#IF (($ - ASCI_FNTBL) != (CIO_FNCNT * 2))
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.ECHO "*** INVALID ASCI FUNCTION TABLE ***\n"
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#ENDIF
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;
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#IF ((!ASCIINTS) | (INTMODE == 0))
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;
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ASCI_IN:
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CALL ASCI_IST ; CHECK FOR CHAR READY
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JR Z,ASCI_IN ; IF NOT, LOOP
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LD A,(IY+3) ; BASE REG
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ADD A,8 ; Z180 RDR REG OFFSET
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LD C,A ; PUT IN C FOR I/O
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LD B,0 ; MSB FOR 16 BIT I/O
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IN E,(C) ; GET CHAR
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XOR A ; SIGNAL SUCCESS
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RET ; DONE
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;
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#ELSE
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;
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ASCI_IN:
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CALL ASCI_IST ; SEE IF CHAR AVAILABLE
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JR Z,ASCI_IN ; LOOP UNTIL SO
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HB_DI ; AVOID COLLISION WITH INT HANDLER
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LD L,(IY+6) ; SET HL TO
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LD H,(IY+7) ; ... START OF BUFFER STRUCT
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LD A,(HL) ; GET COUNT
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DEC A ; DECREMENT COUNT
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LD (HL),A ; SAVE UPDATED COUNT
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CP ASCI_BUFSZ / 4 ; BUFFER LOW THRESHOLD
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JR NZ,ASCI_IN1 ; IF NOT, BYPASS SETTING RTS
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; SET RTS
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; THE SECONDARY ASCI PORT ON Z180 ACTUALLY HAS NO RTS LINE
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; AND THE CNTLA BIT FOR THIS PORT CONTROLS THE FUNCTION OF THE
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; MULTIPLEXED CKA1/~TEND0 LINE. BELOW, WE TEST REG C TO SEE IF
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; IT IS AN ODD NUMBERED PORT. IF SO, WE MUST BE ON THE SECONDARY
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; SERIAL PORT, SO WE NEED TO BYPASS MANIPULATING THE RTS BIT.
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LD C,(IY+3) ; CNTLA PORT ADR
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BIT 0,C ; IS C ADDRESSING AN ODD NUMBERED PORT?
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JR NZ,ASCI_IN1 ; IF SO, THIS IS SEC SERIAL, NO RTS!
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LD B,0 ; MSB FOR 16 BIT I/O
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IN A,(C) ; GET CUR CNTLA VAL
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AND ~ASCI_RTS ; ASSERT ~RTS
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OUT (C),A ; DO IT
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ASCI_IN1:
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INC HL ; HL := ADR OF TAIL PTR
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INC HL ; "
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INC HL ; "
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PUSH HL ; SAVE ADR OF TAIL PTR
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LD A,(HL) ; DEREFERENCE HL
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INC HL
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LD H,(HL)
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LD L,A ; HL IS NOW ACTUAL TAIL PTR
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LD C,(HL) ; C := CHAR TO BE RETURNED
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INC HL ; BUMP TAIL PTR
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POP DE ; RECOVER ADR OF TAIL PTR
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LD A,L ; GET LOW BYTE OF TAIL PTR
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SUB ASCI_BUFSZ+2 ; SUBTRACT SIZE OF BUFFER AND POINTER
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CP E ; IF EQUAL TO START, TAIL PTR IS PAST BUF END
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JR NZ,ASCI_IN2 ; IF NOT, BYPASS
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LD H,D ; SET HL TO
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LD L,E ; ... TAIL PTR ADR
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INC HL ; BUMP PAST TAIL PTR
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INC HL ; ... SO HL NOW HAS ADR OF ACTUAL BUFFER START
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ASCI_IN2:
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EX DE,HL ; DE := TAIL PTR VAL, HL := ADR OF TAIL PTR
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LD (HL),E ; SAVE UPDATED TAIL PTR
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INC HL ; "
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LD (HL),D ; "
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LD E,C ; MOVE CHAR TO RETURN TO E
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HB_EI ; INTERRUPTS OK AGAIN
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XOR A ; SIGNAL SUCCESS
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RET ; AND DONE
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;
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#ENDIF
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;
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;
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;
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ASCI_OUT:
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CALL ASCI_OST ; CHECK IF OUTPUT REGISTER READY
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JR Z,ASCI_OUT ; LOOP UNTIL SO
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LD A,(IY+3) ; GET ASCI BASE REG
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ADD A,6 ; Z180 TDR REG OFFSET
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LD C,A ; PUT IN C FOR I/O
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LD B,0 ; MSB FOR 16 BIT I/O
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OUT (C),E ; WRITE CHAR
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XOR A ; SIGNAL SUCCESS
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RET ; DONE
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;
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;
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;
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#IF ((!ASCIINTS) | (INTMODE == 0))
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;
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ASCI_IST:
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CALL ASCI_ICHK ; ASCI INPUT CHECK
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JP Z,CIO_IDLE ; IF NOT READY, RETURN VIA IDLE PROCESSING
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RET ; NORMAL RETURN
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;
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#ELSE
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;
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ASCI_IST:
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LD L,(IY+6) ; GET ADDRESS
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LD H,(IY+7) ; ... OF RECEIVE BUFFER
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LD A,(HL) ; BUFFER UTILIZATION COUNT
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OR A ; SET FLAGS
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JP Z,CIO_IDLE ; NOT READY, RETURN VIA IDLE PROCESSING
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RET ; DONE
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;
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#ENDIF
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;
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;
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;
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ASCI_OST:
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LD A,(IY+3) ; GET ASCI BASE REG
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ADD A,4 ; Z180 STAT REG OFFSET
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LD C,A ; PUT IN C FOR I/O
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LD B,0 ; MSB FOR 16 BIT I/O
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IN A,(C) ; READ STATUS
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AND $02 ; CHECK BIT FOR OUTPUT READY
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JP Z,CIO_IDLE ; IF NOT, DO IDLE PROCESSING AND RETURN
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XOR A ; OTHERWISE SIGNAL
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INC A ; ... BUFFER EMPTY, A = 1
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RET ; DONE
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;
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; AT INITIALIZATION THE SETUP PARAMETER WORD IS TRANSLATED TO THE FORMAT
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; REQUIRED BY THE ASCI AND STORED IN A PORT/REGISTER INITIALIZATION TABLE,
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; WHICH IS THEN LOADED INTO THE ASCI.
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;
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ASCI_INITDEV:
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; INITDEV CAN BE CALLED PRIOR TO INTERRUPTS BEING ENABLED. WE
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; NEED TO LEAVE INTERRUPTS ALONE IN THIS SCENARIO
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LD A,(INTSENAB) ; INTS ENABLED?
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OR A ; TEST VALUE
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JR Z,ASCI_INITDEV0 ; BYPASS DI/EI IF NOT ENABLED
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;
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; INTERRUPTS DISABLED DURING INIT
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HB_DI ; DISABLE INTS
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CALL ASCI_INITDEV0 ; DO THE WORK
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HB_EI ; INTS BACK ON
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RET ; DONE
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;
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ASCI_INITDEV0:
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;
|
|
; TEST FOR -1 WHICH MEANS USE CURRENT CONFIG (JUST REINIT)
|
|
LD A,D ; TEST DE FOR
|
|
AND E ; ... VALUE OF -1
|
|
INC A ; ... SO Z SET IF -1
|
|
JR NZ,ASCI_INITDEV1 ; IF DE == -1, REINIT CURRENT CONFIG
|
|
;
|
|
; LOAD EXISTING CONFIG TO REINIT
|
|
LD E,(IY+4) ; LOW BYTE
|
|
LD D,(IY+5) ; HIGH BYTE
|
|
;
|
|
ASCI_INITDEV1:
|
|
;
|
|
LD A,E ; GET CONFIG LSB
|
|
AND $E0 ; CHECK FOR DTR, XON, PARITY=MARK/SPACE
|
|
JR NZ,ASCI_INITFAIL ; IF ANY BIT SET, FAIL, NOT SUPPORTED
|
|
;
|
|
; DETERMINE APPROPRIATE CNTLB VALUE (BASED ON BAUDRATE & CPU SPEED)
|
|
LD A,D ; BYTE W/ ENCODED BAUD RATE
|
|
AND $1F ; ISOLATE BITS
|
|
LD L,A ; MOVE TO L
|
|
LD H,0 ; CLEAR MSB
|
|
PUSH DE ; SAVE CONFIG
|
|
CALL ASCI_CNTLB ; DERIVE CNTLB VALUE TO C
|
|
POP DE ; RESTORE CONFIG
|
|
JR NZ,ASCI_INITFAIL ; ABORT ON ERROR
|
|
;
|
|
; BUILD CNTLA VALUE IN REGISTER B
|
|
LD B,$64 ; START WITH DEFAULT CNTLA VALUE
|
|
;
|
|
; DATA BITS
|
|
LD A,E ; LOAD CONFIG BYTE
|
|
AND $03 ; ISOLATE DATA BITS
|
|
CP $03 ; 8 DATA BITS?
|
|
JR Z,ASCI_INITDEV2 ; IF SO, NO CHG, CONTINUE
|
|
RES 2,B ; RESET CNTLA BIT 2 FOR 7 DATA BITS
|
|
;
|
|
ASCI_INITDEV2:
|
|
; STOP BITS
|
|
BIT 2,E ; TEST STOP BITS CONFIG BIT
|
|
JR Z,ASCI_INITDEV3 ; IF CLEAR, NO CHG, CONTINUE
|
|
SET 0,B ; SET CNTLA BIT 0 FOR 2 STOP BITS
|
|
;
|
|
ASCI_INITDEV3:
|
|
; PARITY ENABLE
|
|
BIT 3,E ; TEST PARITY ENABLE CONFIG BIT
|
|
JR Z,ASCI_INITDEV4 ; NO PARITY, SKIP ALL PARITY CHGS
|
|
SET 1,B ; SET CNTLA BIT 1 FOR PARITY ENABLE
|
|
|
|
; PARITY EVEN/ODD
|
|
BIT 4,E ; TEST EVEN PARITY CONFIG BIT
|
|
JR NZ,ASCI_INITDEV4 ; EVEN PARITY, NO CHG, CONTINUE
|
|
SET 4,C ; SET CNTLB BIT 4 FOR ODD PARITY
|
|
;
|
|
ASCI_INITDEV4:
|
|
; SETUP ASEXT
|
|
LD A,D ; CONFIG HIGH BYTE
|
|
AND %00100000 ; BIT 5 IS RTS
|
|
CPL ; INVERT FOR ASEXT
|
|
LD L,A ; MOVE TO L
|
|
LD A,ASCI_DEF_ASEXT ; GET ASEXT DEFAULT
|
|
AND L ; COMBINE
|
|
LD L,A ; AND LEAVE IN L
|
|
;
|
|
; SAVE CONFIG PERMANENTLY NOW
|
|
LD (IY+4),E ; SAVE LOW WORD
|
|
LD (IY+5),D ; SAVE HI WORD
|
|
JR ASCI_INITGO
|
|
;
|
|
ASCI_INITSAFE:
|
|
LD B,ASCI_DEF_CNTLA ; CNTLA FAILSAFE VALUE
|
|
LD C,ASCI_DEF_CNTLB ; CNTLB FAILSAFE VALUE
|
|
LD L,ASCI_DEF_ASEXT ; ASEXT FAILSAFE VALUE
|
|
;
|
|
ASCI_INITGO:
|
|
; IMPLEMENT CONFIGURATION
|
|
; B = CNTLA, C=CNTLB, L=ASEXT
|
|
PUSH HL ; SAVE ASEXT
|
|
LD H,B ; H := CNTLA VAL
|
|
LD L,C ; L := CNTLB VAL
|
|
LD B,0 ; MSB OF PORT MUST BE ZERO!
|
|
LD C,(IY+3) ; GET ASCI BASE REG (CNTLA)
|
|
OUT (C),H ; WRITE CNTLA VALUE
|
|
INC C ; BUMP TO
|
|
INC C ; ... CNTLB REG, B IS STILL 0
|
|
OUT (C),L ; WRITE CNTLB VALUE
|
|
POP HL ; RECOVER ASEXT
|
|
INC C ; BUMP TO
|
|
INC C ; ... STAT REG, B IS STILL 0
|
|
#IF ((ASCIINTS) & (INTMODE > 0))
|
|
LD A,$08 ; SET RIE BIT ON
|
|
#ELSE
|
|
XOR A ; CLEAR RIE/TIE
|
|
#ENDIF
|
|
OUT (C),A ; WRITE STAT REG
|
|
LD A,$0E ; BUMP TO
|
|
ADD A,C ; ... ASEXT REG
|
|
LD C,A ; PUT IN C FOR I/O, B IS STILL 0
|
|
BIT 0,C ; IS C ADDRESSING AN ODD NUMBERED PORT?
|
|
JR NZ,ASCI_INITGOZ ; IF SO, THIS IS SEC SERIAL, NO CTS!
|
|
OUT (C),L ; WRITE ASEXT REG
|
|
;
|
|
ASCI_INITGOZ:
|
|
;
|
|
#IF ((ASCIINTS) & (INTMODE > 0))
|
|
;
|
|
; RESET THE RECEIVE BUFFER
|
|
LD E,(IY+6)
|
|
LD D,(IY+7) ; DE := _CNT
|
|
XOR A ; A := 0
|
|
LD (DE),A ; _CNT = 0
|
|
INC DE ; DE := ADR OF _HD
|
|
PUSH DE ; SAVE IT
|
|
INC DE
|
|
INC DE
|
|
INC DE
|
|
INC DE ; DE := ADR OF _BUF
|
|
POP HL ; HL := ADR OF _HD
|
|
LD (HL),E
|
|
INC HL
|
|
LD (HL),D ; _HD := _BUF
|
|
INC HL
|
|
LD (HL),E
|
|
INC HL
|
|
LD (HL),D ; _TL := _BUF
|
|
;
|
|
#ENDIF
|
|
;
|
|
XOR A ; SIGNAL SUCCESS
|
|
RET ; DONE
|
|
;
|
|
ASCI_INITFAIL:
|
|
OR $FF ; SIGNAL FAILURE
|
|
RET ; RETURN
|
|
;
|
|
;
|
|
;
|
|
ASCI_QUERY:
|
|
LD E,(IY+4) ; FIRST CONFIG BYTE TO E
|
|
LD D,(IY+5) ; SECOND CONFIG BYTE TO D
|
|
XOR A ; SIGNAL SUCCESS
|
|
RET ; DONE
|
|
;
|
|
;
|
|
;
|
|
ASCI_DEVICE:
|
|
LD D,CIODEV_ASCI ; D := DEVICE TYPE
|
|
LD E,(IY) ; E := PHYSICAL UNIT
|
|
LD C,$00 ; C := DEVICE TYPE, 0x00 IS RS-232
|
|
LD H,0 ; H := 0, DRIVER HAS NO MODES
|
|
LD L,(IY+3) ; L := BASE I/O ADDRESS
|
|
XOR A ; SIGNAL SUCCESS
|
|
RET
|
|
;
|
|
; ASCI DETECTION ROUTINE
|
|
; ALWAYS PRESENT, JUST SAY SO.
|
|
;
|
|
ASCI_DETECT:
|
|
LD A,(IY+3) ; BASE PORT ADR
|
|
ADD A,$1A ; BUMP TO ASCI CONSTANT LOW
|
|
LD C,A ; PUT IN C
|
|
LD B,0 ; MSB FOR 16 BIT I/O
|
|
XOR A ; ZERO TO ACCUM
|
|
OUT (C),A ; WRITE TO REG
|
|
IN A,(C) ; READ IT BACK
|
|
INC A ; FF -> 0
|
|
LD A,ASCI_ASCI ; ASSUME ORIG ASCI, NO BRG
|
|
RET Z ; IF SO, RETURN
|
|
LD A,ASCI_ASCIB ; MUST BE NEWER ASCI W/ BRG
|
|
RET ; DONE
|
|
;
|
|
; DERIVE CNTLB VALUE BASED ON AN ENCODED BAUD RATE AND CURRENT CPU SPEED
|
|
; ENTRY: HL = ENCODED BAUD RATE
|
|
; EXIT: C = CNTLB VALUE, A=0/Z IFF SUCCESS
|
|
;
|
|
; DESIRED DIVISOR == CPUHZ / BAUD
|
|
; DUE TO ENCODING BAUD IS ALWAYS DIVISIBLE BY 75
|
|
; Z180 DIVISOR IS ALWAYS A FACTOR OF 160
|
|
;
|
|
; CNTLB= XXPXDSSS
|
|
; FAILSAFE = 00100000
|
|
;
|
|
; PS (PRESCALE): 0=/10, 1=/30
|
|
; DR (DIVIDE RATIO): 0=/16, 1=/64
|
|
; SS2 SS1 SS0
|
|
; --- --- ---
|
|
; 0 0 0 /1
|
|
; 0 0 1 /2
|
|
; 0 1 0 /4
|
|
; 0 1 1 /8
|
|
; 1 0 0 /16
|
|
; 1 0 1 /32
|
|
; 1 1 0 /64
|
|
;
|
|
; FAILSAFE: CLOCK / 30 / 16 / 1 = CLOCK / 480
|
|
; IF CLOCK=18432000, BAUD=38400
|
|
;
|
|
; X := CPU_HZ / 160 / 75 ==> SIMPLIFIED ==> X := CPU_KHZ / 12
|
|
; X := X / (BAUD / 75)
|
|
; IF X % 3 == 0, THEN (PS := 1, X := X / 3) ELSE PS=0
|
|
; IF X % 4 == 0, THEN (DR := 1, X := X / 4) ELSE DR=0
|
|
; SS := LOG2(X)
|
|
;
|
|
ASCI_CNTLB:
|
|
LD DE,1 ; USE DECODE CONSTANT OF 1 TO GET BAUD RATE ALREADY DIVIDED BY 75
|
|
CALL DECODE ; DECODE THE BAUDATE INTO DE:HL, DE IS DISCARDED
|
|
RET NZ ; ABORT ON ERROR
|
|
PUSH HL ; HL HAS (BAUD / 75), SAVE IT
|
|
LD HL,(CB_CPUKHZ) ; GET CPU CLK IN KHZ
|
|
;
|
|
; DUE TO THE LIMITED DIVISORS POSSIBLE WITH CNTLB, YOU PRETTY MUCH
|
|
; NEED TO USE A CPU SPEED THAT IS A MULTIPLE OF 128KHZ. BELOW, WE
|
|
; ATTEMPT TO ROUND THE CPU SPEED DETECTED TO A MULTIPLE OF 128KHZ
|
|
; WITH ROUNDING. THIS JUST MAXIMIZES POSSIBILITY OF SUCCESS COMPUTING
|
|
; THE DIVISOR.
|
|
LD DE,$0040 ; HALF OF 128 IS 64
|
|
ADD HL,DE ; ADD FOR ROUNDING
|
|
LD A,L ; MOVE TO ACCUM
|
|
AND $80 ; STRIP LOW ORDER 7 BITS
|
|
LD L,A ; ... AND PUT IT BACK
|
|
;
|
|
LD DE,12 ; PREPARE TO DIVIDE BY 12
|
|
CALL DIV16 ; BC := (CPU_KHZ / 12), REM IN HL, ZF
|
|
POP DE ; RESTORE (BAUD / 75)
|
|
RET NZ ; ABORT IF REMAINDER
|
|
PUSH BC ; MOVE WORKING VALUE
|
|
POP HL ; ... BACK TO HL
|
|
CALL DIV16 ; BC := X / (BAUD / 75)
|
|
RET NZ ; ABORT IF REMAINDER
|
|
;
|
|
; DETERMINE PS BIT BY ATTEMPTING DIVIDE BY 3
|
|
PUSH BC ; SAVE WORKING VALUE ON STACK
|
|
PUSH BC ; MOVE WORKING VALUE
|
|
POP HL ; ... TO HL
|
|
LD DE,3 ; SETUP TO DIVIDE BY 3
|
|
CALL DIV16 ; BC := X / 3, REM IN HL, ZF
|
|
POP HL ; HL := PRIOR WORKING VALUE
|
|
LD E,0 ; INIT E := 0 AS WORKING CNTLB VALUE
|
|
JR NZ,ASCI_CNTLB1 ; DID NOT WORK, LEAVE PS==0, SKIP AHEAD
|
|
SET 5,E ; SET PS BIT
|
|
PUSH BC ; MOVE NEW WORKING
|
|
POP HL ; ... VALUE TO HL
|
|
;
|
|
ASCI_CNTLB1:
|
|
; DETERMINE DR BIT BY ATTEMPTING DIVIDE BY 4
|
|
LD A,L ; LOAD LSB OF WORKING VALUE
|
|
AND $03 ; ISOLATE LOW ORDER BITS
|
|
JR NZ,ASCI_CNTLB2 ; NOT DIVISIBLE BY 4, SKIP AHEAD
|
|
SET 3,E ; SET PS BIT
|
|
SRL H ; DIVIDE HL BY 4
|
|
RR L ; ...
|
|
SRL H ; ...
|
|
RR L ; ...
|
|
;
|
|
ASCI_CNTLB2:
|
|
; DETERMINE SS BITS BY RIGHT SHIFTING AND INCREMENTING
|
|
LD B,7 ; LOOP COUNTER, MAX VALUE OF SS IS 7
|
|
LD C,E ; MOVE WORKING CNTLB VALUE TO C
|
|
ASCI_CNTLB3:
|
|
BIT 0,L ; CAN WE SHIFT AGAIN?
|
|
JR NZ,ASCI_CNTLB4 ; NOPE, DONE
|
|
SRL H ; IMPLEMENT THE
|
|
RR L ; ... SHIFT OPERATION
|
|
INC C ; INCREMENT SS BITS
|
|
DJNZ ASCI_CNTLB3 ; LOOP IF MORE SHIFTING POSSIBLE
|
|
;
|
|
; AT THIS POINT HL MUST BE EQUAL TO 1 OR WE FAILED!
|
|
DEC HL ; IF HL == 1, SHOULD BECOME ZERO
|
|
LD A,H ; TEST HL
|
|
OR L ; ... FOR ZERO
|
|
RET NZ ; ABORT IF NOT ZERO
|
|
;
|
|
ASCI_CNTLB4:
|
|
XOR A ; SIGNAL SUCCESS
|
|
RET ; DONE
|
|
;
|
|
; SPECIAL INPUT STATUS CHECK ROUTINE FOR ASCI. IF THE ASCI PORT DETECTS A LINE
|
|
; ERROR (PARITY, OVERRUN, ETC.) IT WILL STALL UNTIL THE ERROR IS EXPLICITY
|
|
; ACKNOWLEDGED. THIS ROUTINE HANDLES ALL OF THAT AND RETURNS WITH A=1 IF CHAR
|
|
; READY, ELSE A=0. ZF SET OR CLEARED.
|
|
;
|
|
ASCI_ICHK:
|
|
LD A,(IY+3) ; GET ASCI BASE REG
|
|
ADD A,4 ; Z180 STAT REG OFFSET
|
|
LD C,A ; PUT IN C FOR I/O
|
|
LD B,0 ; MSB FOR 16 BIT I/O
|
|
IN A,(C) ; READ STAT REG
|
|
PUSH AF ; SAVE STATUS
|
|
AND $70 ; PARITY, FRAMING, OR OVERRUN ERROR?
|
|
JR Z,ASCI_ICHK1 ; JUMP AHEAD IF NO ERRORS
|
|
;
|
|
; CLEAR ERROR(S) OR NOTHING FURTHER CAN BE RECEIVED!!!
|
|
LD C,(IY+3) ; GET ASCI BASE REG (CNTLA)
|
|
LD B,0 ; MSB FOR 16 BIT I/O
|
|
IN A,(C) ; READ CNTLA
|
|
RES 3,A ; CLEAR EFR (ERROR FLAG RESET)
|
|
OUT (C),A ; WRITE UPDATED CNTLA
|
|
;
|
|
ASCI_ICHK1:
|
|
POP AF ; RESTORE STATUS VALUE
|
|
AND $80 ; DATA READY?
|
|
JP Z,CIO_IDLE ; IF NOT, DO IDLE PROCESSING AND RETURN
|
|
XOR A ; SIGNAL CHAR WAITING
|
|
INC A ; ... BY SETTING A TO 1
|
|
RET ; DONE
|
|
;
|
|
;
|
|
;
|
|
ASCI_PRTCFG:
|
|
; ANNOUNCE PORT
|
|
CALL NEWLINE ; FORMATTING
|
|
PRTS("ASCI$") ; FORMATTING
|
|
LD A,(IY) ; DEVICE NUM
|
|
CALL PRTDECB ; PRINT DEVICE NUM
|
|
PRTS(": IO=0x$") ; FORMATTING
|
|
LD A,(IY+3) ; GET BASE PORT
|
|
CALL PRTHEXBYTE ; PRINT BASE PORT
|
|
|
|
; PRINT THE ASCI TYPE
|
|
CALL PC_SPACE ; FORMATTING
|
|
LD A,(IY+1) ; GET ASCI TYPE BYTE
|
|
RLCA ; MAKE IT A WORD OFFSET
|
|
LD HL,ASCI_TYPE_MAP ; POINT HL TO TYPE MAP TABLE
|
|
CALL ADDHLA ; HL := ENTRY
|
|
LD E,(HL) ; DEREFERENCE
|
|
INC HL ; ...
|
|
LD D,(HL) ; ... TO GET STRING POINTER
|
|
CALL WRITESTR ; PRINT IT
|
|
;
|
|
; ALL DONE IF NO ASCI WAS DETECTED
|
|
LD A,(IY+1) ; GET ASCI TYPE BYTE
|
|
OR A ; SET FLAGS
|
|
RET Z ; IF ZERO, NOT PRESENT
|
|
;
|
|
PRTS(" MODE=$") ; FORMATTING
|
|
LD E,(IY+4) ; LOAD CONFIG
|
|
LD D,(IY+5) ; ... WORD TO DE
|
|
CALL PS_PRTSC0 ; PRINT CONFIG
|
|
;
|
|
XOR A
|
|
RET
|
|
;
|
|
;
|
|
;
|
|
ASCI_TYPE_MAP:
|
|
.DW ASCI_STR_NONE
|
|
.DW ASCI_STR_ASCI
|
|
.DW ASCI_STR_ASCIB
|
|
|
|
ASCI_STR_NONE .DB "<NOT PRESENT>$"
|
|
ASCI_STR_ASCI .DB "ASCI$"
|
|
ASCI_STR_ASCIB .DB "ASCI W/BRG$"
|
|
;
|
|
; WORKING VARIABLES
|
|
;
|
|
ASCI_DEV .DB 0 ; DEVICE NUM USED DURING INIT
|
|
;
|
|
#IF ((!ASCIINTS) | (INTMODE == 0))
|
|
;
|
|
ASCI0_RCVBUF .EQU 0
|
|
ASCI1_RCVBUF .EQU 0
|
|
;
|
|
#ELSE
|
|
;
|
|
; RECEIVE BUFFERS
|
|
;
|
|
ASCI0_RCVBUF:
|
|
ASCI0_BUFCNT .DB 0 ; CHARACTERS IN RING BUFFER
|
|
ASCI0_HD .DW ASCI0_BUF ; BUFFER HEAD POINTER
|
|
ASCI0_TL .DW ASCI0_BUF ; BUFFER TAIL POINTER
|
|
ASCI0_BUF .FILL ASCI_BUFSZ,0 ; RECEIVE RING BUFFER
|
|
ASCI0_BUFEND .EQU $ ; END OF BUFFER
|
|
ASCI0_BUFSZ .EQU $ - ASCI0_BUF ; SIZE OF RING BUFFER
|
|
;
|
|
ASCI1_RCVBUF:
|
|
ASCI1_BUFCNT .DB 0 ; CHARACTERS IN RING BUFFER
|
|
ASCI1_HD .DW ASCI1_BUF ; BUFFER HEAD POINTER
|
|
ASCI1_TL .DW ASCI1_BUF ; BUFFER TAIL POINTER
|
|
ASCI1_BUF .FILL ASCI_BUFSZ,0 ; RECEIVE RING BUFFER
|
|
ASCI1_BUFEND .EQU $ ; END OF BUFFER
|
|
ASCI1_BUFSZ .EQU $ - ASCI1_BUF ; SIZE OF RING BUFFER
|
|
;
|
|
#ENDIF
|
|
;
|
|
; ASCI PORT TABLE
|
|
;
|
|
ASCI_CFG:
|
|
;
|
|
#IF (ASCISWAP)
|
|
;
|
|
ASCI1_CFG:
|
|
; ASCI CHANNEL B CONFIG
|
|
.DB 0 ; DEVICE NUMBER (SET DURING INIT)
|
|
.DB 0 ; ASCI TYPE (SET DURING INIT)
|
|
.DB 1 ; MODULE ID
|
|
.DB ASCI1_BASE ; BASE PORT
|
|
.DW ASCI1CFG ; LINE CONFIGURATION
|
|
.DW ASCI1_RCVBUF ; POINTER TO RCV BUFFER STRUCT
|
|
;
|
|
DEVECHO "ASCI: IO="
|
|
DEVECHO ASCI1_BASE
|
|
#IF ((ASCIINTS) & (INTMODE >0))
|
|
DEVECHO ", INTERRUPTS ENABLED"
|
|
#ENDIF
|
|
DEVECHO "\n"
|
|
;
|
|
ASCI_CFGSIZ .EQU $ - ASCI_CFG ; SIZE OF ONE CFG TABLE ENTRY
|
|
;
|
|
ASCI0_CFG:
|
|
; ASCI CHANNEL A CONFIG
|
|
.DB 0 ; DEVICE NUMBER (SET DURING INIT)
|
|
.DB 0 ; ASCI TYPE (SET DURING INIT)
|
|
.DB 0 ; MODULE ID
|
|
.DB ASCI0_BASE ; BASE PORT
|
|
.DW ASCI0CFG ; LINE CONFIGURATION
|
|
.DW ASCI0_RCVBUF ; POINTER TO RCV BUFFER STRUCT
|
|
;
|
|
DEVECHO "ASCI: IO="
|
|
DEVECHO ASCI0_BASE
|
|
#IF ((ASCIINTS) & (INTMODE >0))
|
|
DEVECHO ", INTERRUPTS ENABLED"
|
|
#ENDIF
|
|
DEVECHO "\n"
|
|
;
|
|
#ELSE
|
|
;
|
|
ASCI0_CFG:
|
|
; ASCI CHANNEL A CONFIG
|
|
.DB 0 ; DEVICE NUMBER (SET DURING INIT)
|
|
.DB 0 ; ASCI TYPE (SET DURING INIT)
|
|
.DB 0 ; MODULE ID
|
|
.DB ASCI0_BASE ; BASE PORT
|
|
.DW ASCI0CFG ; LINE CONFIGURATION
|
|
.DW ASCI0_RCVBUF ; POINTER TO RCV BUFFER STRUCT
|
|
;
|
|
DEVECHO "ASCI: IO="
|
|
DEVECHO ASCI0_BASE
|
|
#IF ((ASCIINTS) & (INTMODE >0))
|
|
DEVECHO ", INTERRUPTS ENABLED"
|
|
#ENDIF
|
|
DEVECHO "\n"
|
|
;
|
|
ASCI_CFGSIZ .EQU $ - ASCI_CFG ; SIZE OF ONE CFG TABLE ENTRY
|
|
;
|
|
ASCI1_CFG:
|
|
; ASCI CHANNEL B CONFIG
|
|
.DB 0 ; DEVICE NUMBER (SET DURING INIT)
|
|
.DB 0 ; ASCI TYPE (SET DURING INIT)
|
|
.DB 1 ; MODULE ID
|
|
.DB ASCI1_BASE ; BASE PORT
|
|
.DW ASCI1CFG ; LINE CONFIGURATION
|
|
.DW ASCI1_RCVBUF ; POINTER TO RCV BUFFER STRUCT
|
|
;
|
|
DEVECHO "ASCI: IO="
|
|
DEVECHO ASCI1_BASE
|
|
#IF ((ASCIINTS) & (INTMODE > 0))
|
|
DEVECHO ", INTERRUPTS ENABLED"
|
|
#ENDIF
|
|
DEVECHO "\n"
|
|
;
|
|
#ENDIF
|
|
;
|
|
ASCI_CFGCNT .EQU ($ - ASCI_CFG) / ASCI_CFGSIZ
|