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377 lines
11 KiB
377 lines
11 KiB
;
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;==================================================================================================
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; FLASH DRIVER FOR FLASH & EEPROM PROGRAMMING
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;
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; 26 SEP 2020 - CHIP IDENTIFICATION IMPLMENTED -- PHIL SUMMERS
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; - CHIP ERASE IMPLEMENTED
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; 23 OCT 2020 - SECTOR ERASE IMPLEMENTED
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;==================================================================================================
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;
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; UPPER RAM BANK IS ALWAYS AVAILABLE REGARDLESS OF MEMORY BANK SELECTION. HBX_BNKSEL AND
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; HB_CURBNK ARE ALWAYS AVAILABLE IN UPPER MEMORY AND THE STACK IS ALSO IN UPPER MEMORY DURING
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; BIOS INITIALIZATION. TO ACCESS THE FLASH CHIP FEATURES, CODE IS COPIED TO THE UPPER RAM BANK
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; AND THE FLASH CHIP IS SWITCHED INTO THE LOWER BANK.
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;
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; INSPIRED BY WILL SOWERBUTTS FLASH4 UTILITY - https://github.com/willsowerbutts/flash4/
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;
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FF_INIT:
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CALL NEWLINE ; FORMATTING
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PRTS("FF: FLASH ID:$")
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;
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LD (FF_STACK),SP ; SAVE STACK
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LD HL,(FF_STACK)
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LD BC,FF_I_SZ ; CODE SIZE REQUIRED
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CCF ; CREATE A RELOCATABLE
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SBC HL,BC ; CODE BUFFER IN THE
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LD SP,HL ; STACK AREA
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;
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PUSH HL ; SAVE THE EXECUTE ADDRESS
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EX DE,HL ; PUT EXECUTE / START ADDRESS IN DE
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LD HL,FF_IDENT ; COPY OUR RELOCATABLE
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LDIR ; CODE TO THE BUFFER
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;
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LD A,(HB_CURBNK) ; WE ARE STARTING IN HB_CURBNK
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LD B,A ; WHICH IS THE RAM COPY OF THE BIOS
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LD A,BID_BOOT ; BID_BOOT IS ROM BANK 0
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;
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POP HL ; CALL OUR RELOCATABLE CODE
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CALL JPHL
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;
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LD HL,(FF_STACK) ; RESTORE ORIGINAL
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LD SP,HL ; STACK POSITION
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;
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LD H,E
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LD L,D
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CALL PRTHEXWORDHL ; DISPLAY FLASH ID
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CALL PC_SPACE
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;
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LD HL,FF_TABLE ; SEARCH THROUGH THE FLASH
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LD BC,FF_T_CNT ; TABLE TO FIND A MATCH
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FF_NXT1:LD A,(HL)
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CP D
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JR NZ,FF_NXT0 ; FIRST BYTE DOES NOT MATCH
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;
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INC HL
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LD A,(HL)
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CP E
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DEC HL
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JR NZ,FF_NXT0 ; SECOND BYTE DOES NOT MATCH
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;
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INC HL
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INC HL
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JR FF_NXT2 ; MATCH SO EXIT
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;
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FF_NXT0:PUSH BC ; WE DIDN'T MATCH SO POINT
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LD BC,FF_T_SZ ; TO THE NEXT TABLE ENTRY
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ADD HL,BC
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POP BC
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;
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LD A,B ; CHECK IF WE REACHED THE
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OR C ; END OF THE TABLE
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DEC BC
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JR NZ,FF_NXT1 ; NOT AT END YET
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;
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LD HL,FF_UNKNOWN ; WE REACHED THE END WITHOUT A MATCH
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;
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FF_NXT2:CALL PRTSTR ; AFTER SEARCH DISPLAY THE RESULT
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;
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XOR A ; INIT SUCCEEDED
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RET
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;
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;======================================================================
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; IDENTIFY FLASH CHIP. THIS CODE IS RELOCATED AND EXECUTED IN THE STACK.
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; IT SWITCHES THE BOTTOM BANK TO ROM BANK 0 I.E. BOTTOM OF CHIP ADDRESS RANGE.
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; RETURNS WITH CHIP ID IN DE AND RETURNS THE BOTTOM BANK TO INITIAL STATE.
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;======================================================================
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;
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FF_IDENT: ; FLASH ROM ID CODE ``
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HB_DI
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CALL HBX_BNKSEL ; SELECT ROM BANK 0
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;
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LD A,$AA ; SET IDENTIFY MODE
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LD ($5555),A
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;
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LD A,$55
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LD ($2AAA),A
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;
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LD A,$90
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LD ($5555),A
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;
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LD DE,($0000)
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;
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LD A,$F0 ; EXIT IDENTIFY MODE
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LD ($5555),A
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;
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LD A,B ; RETURN TO ORIGINAL BANK
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CALL HBX_BNKSEL ; WHICH IS OUR RAM BIOS COPY
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HB_EI
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;
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RET
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;
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FF_I_SZ .EQU $-FF_IDENT
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;
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;======================================================================
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; ERASE FLASH CHIP.
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;======================================================================
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;
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FF_EINIT:
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LD (FF_STACK),SP ; SAVE STACK
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LD HL,(FF_STACK)
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;
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LD BC,FF_E_SZ ; CODE SIZE REQUIRED
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CCF ; CREATE A RELOCATABLE
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SBC HL,BC ; CODE BUFFER IN THE
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LD SP,HL ; STACK AREA
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;
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PUSH HL ; SAVE THE EXECUTE ADDRESS
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EX DE,HL ; PUT EXECUTE / START ADDRESS IN DE
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LD HL,FF_ERASE ; COPY OUR RELOCATABLE
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LDIR ; CODE TO THE BUFFER
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;
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LD A,(HB_CURBNK) ; WE ARE STARTING IN HB_CURBNK
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LD B,A ; WHICH IS THE RAM COPY OF THE BIOS
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LD A,BID_BOOT ; BID_BOOT IS ROM BANK 0
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;
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POP HL ; CALL OUR RELOCATABLE CODE
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CALL JPHL
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;
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LD HL,(FF_STACK) ; RESTORE ORIGINAL
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LD SP,HL ; STACK POSITION
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;
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LD A,C ; RETURN WITH STATUS IN A
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RET
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;
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;======================================================================
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; ERASE FLASH CHIP. THIS CODE IS RELOCATED AND EXECUTED IN THE STACK.
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; IT SWITCHES THE BOTTOM BANK TO ROM BANK 0 I.E. BOTTOM OF CHIP ADDRESS RANGE.
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; RETURNS THE BOTTOM BANK TO INITIAL STATE. ERASE COMMAND IS ISSUED TO
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; THE FLASH CHIP AND THEN TOGGLE BIT IS MONITORED FOR COMPLETION.
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; RETURN C=0 FOR SUCCESS OR C=FF FOR FAILURE.
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;======================================================================
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;
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FF_ERASE:
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HB_DI
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CALL HBX_BNKSEL ; SELECT ROM BANK 0
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;
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LD A,$AA ; SET CHIP ERASE
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LD ($5555),A
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;
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LD A,$55
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LD ($2AAA),A
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;
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LD A,$80
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LD ($5555),A
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;
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LD A,$AA
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LD ($5555),A
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;
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LD A,$55
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LD ($2AAA),A
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;
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LD A,$10
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LD ($5555),A
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;
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LD HL,$5555 ; DO TWO SUCCESSIVE READS
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LD A,(HL) ; FROM THE SAME FLASH ADDRESS.
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FF_WT2: LD C,(HL) ; IF TOGGLE BIT (BIT 6)
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XOR C ; IS THE SAME ON BOTH READS
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BIT 6,A ; THEN ERASE IS COMPLETE SO EXIT.
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JR Z,FF_WT1 ; Z TRUE IF BIT 6=0 I.E. "NO TOGGLE" WAS DETECTED.
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;
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LD A,C ; OPERATION IS NOT COMPLETE. CHECK TIMEOUT BIT (BIT 5).
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BIT 5,C ; IF NO TIMEOUT YET THEN LOOP BACK AND KEEP CHECKING TOGGLE STATUS
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JR Z,FF_WT2 ; IF BIT 5=0 THEN RETRY; NZ TRUE IF BIT 5=1
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;
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LD A,(HL) ; WE GOT A TIMOUT. RECHECK TOGGLE BIT IN CASE WE DID COMPLETE
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XOR (HL) ; THE OPERATION. DO TWO SUCCESSIVE READS. ARE THEY THE SAME?
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BIT 6,A ; IF THEY ARE THEN OPERATION WAS COMPLETED
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JR Z,FF_WT1 ; OTHERWISE ERASE OPERATION FAILED OR TIMED OUT.
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;
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LD (HL),$F0 ; WRITE DEVICE RESET
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LD C,$FF ; SET FAIL STATUS
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JR FF_WT3
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;
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FF_WT1: LD C,0 ; SET SUCCESS STATUS
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FF_WT3: LD A,B ; RETURN TO ORIGINAL BANK
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CALL HBX_BNKSEL ; WHICH IS OUR RAM BIOS COPY
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HB_EI
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;
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RET
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;
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FF_E_SZ .EQU $-FF_ERASE
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;
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;======================================================================
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; ERASE FLASH SECTOR (1MB LIMIT)
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; ON ENTRY DE:HL contains 32 bit memory address.
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; The sector number is bits 19-12 i.e there are 256 sectors per 1024K
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; The erase sector command must be written to the lowest 32K of each chip.
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; The bank number is bits 19-15 i.e. there are up to 32 for 1024K
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;
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; DDDDDDDDEEEEEEEE HHHHHHHHLLLLLLLL
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; 3322222222221111 1111110000000000
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; 1098765432109876 5432109876543210
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; XXXXXXXXXXXXSSSS SSSSXXXXXXXXXXXX < SECTOR = ADDRESS / 4096 - 0-256
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; XXXXXXXXXXXXBBBB BXXXXXXXXXXXXXXX < BANK = ADDRESS / 32768
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;======================================================================
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;
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FF_SINIT:
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CALL PC_SPACE ; DISPLAY FULL
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EX DE,HL
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CALL PRTHEXWORDHL ; SECTOR ADDRESS DE:HL
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EX DE,HL
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CALL PRTHEXWORDHL
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CALL PC_SPACE ; DISPLAY SECTOR
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;
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LD A,E ; BOTTOM PORTION OF SECTOR
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AND $0F ; ADDRESS THAT GETS WRITTEN
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RLC H ; WITH ERASE COMMAND BYTE
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RLA ; A15 GETS MASKED OFF AND
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LD B,A ; ADDED TO BANK SELECT
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;
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LD A,H ; TOP SECTION OF SECTOR
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RRA ; ADDRESS THAT GETS WRITTEN ; REG C SET
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AND $70 ; TO BANK SELECT PORT
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LD C,A
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;
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PUSH BC
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POP IY
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;
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LD (FF_STACK),SP ; SAVE STACK
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LD HL,(FF_STACK)
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;
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LD BC,FF_S_SZ ; CODE SIZE REQUIRED
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CCF ; CREATE A RELOCATABLE
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SBC HL,BC ; CODE BUFFER IN THE
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LD SP,HL ; STACK AREA
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;
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PUSH HL ; SAVE THE EXECUTE ADDRESS
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EX DE,HL ; PUT EXECUTE / START ADDRESS IN DE
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LD HL,FF_SERASE ; COPY OUR RELOCATABLE
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LDIR ; CODE TO THE BUFFER
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POP HL ; CALL OUR RELOCATABLE CODE
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;
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LD A,(HB_CURBNK) ; WE ARE STARTING IN HB_CURBNK
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;
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CALL JPHL ; CALL FF_SERASE
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;
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LD HL,(FF_STACK) ; RESTORE ORIGINAL
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LD SP,HL ; STACK POSITION
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;
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LD A,C ; STATUS
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RET
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;
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;======================================================================
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; ERASE FLASH CHIP SECTOR. THIS CODE IS RELOCATED AND EXECUTED IN THE STACK.
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; IT SWITCHES THE REQUIRED BANK TO THE BOTTOM OF CHIP ADDRESS RANGE.
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; RETURNS THE BOTTOM BANK TO INITIAL STATE. ERASE SECTOR COMMAND IS ISSUED TO
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; THE FLASH CHIP AND THEN TOGGLE BIT IS MONITORED FOR COMPLETION.
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; ON ENTRY B CONTAINS THE START BANK WHICH WE RETURN TO AT THE END
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; C CONTAINS THE TOP SECTION OF SECTOR WHICH SELECTS THE BANK.
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;======================================================================
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;
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FF_SERASE:
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HB_DI
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PUSH AF
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LD A,0
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CALL HBX_BNKSEL ; SELECT ROM BANK FROM A
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;
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LD A,$AA ; SET SECTOR ERASE
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LD ($5555),A
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;
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LD A,$55
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LD ($2AAA),A
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;
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LD A,$80
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LD ($5555),A
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;
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LD A,$AA
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LD ($5555),A
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;
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LD A,$55
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LD ($2AAA),A
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;
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LD A,B
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CALL HBX_BNKSEL ; SELECT ROM BANK FROM A
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;
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LD H,C
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LD L,$00
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LD A,$30 ; SECTOR ADDRESS
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LD (HL),A
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;
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LD A,0
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CALL HBX_BNKSEL ; SELECT ROM BANK FROM A
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;
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LD HL,$5555 ; DO TWO SUCCESSIVE READS
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LD A,(HL) ; FROM THE SAME FLASH ADDRESS.
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FF_WT4: LD C,(HL) ; IF TOGGLE BIT (BIT 6)
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XOR C ; IS THE SAME ON BOTH READS
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BIT 6,A ; THEN ERASE IS COMPLETE SO EXIT.
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JR Z,FF_WT5 ; Z TRUE IF BIT 6=0 I.E. "NO TOGGLE" WAS DETECTED.
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;
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LD A,C ; OPERATION IS NOT COMPLETE. CHECK TIMEOUT BIT (BIT 5).
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BIT 5,C ; IF NO TIMEOUT YET THEN LOOP BACK AND KEEP CHECKING TOGGLE STATUS
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JR Z,FF_WT4 ; IF BIT 5=0 THEN RETRY; NZ TRUE IF BIT 5=1
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;
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LD A,(HL) ; WE GOT A TIMOUT. RECHECK TOGGLE BIT IN CASE WE DID COMPLETE
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XOR (HL) ; THE OPERATION. DO TWO SUCCESSIVE READS. ARE THEY THE SAME?
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BIT 6,A ; IF THEY ARE THEN OPERATION WAS COMPLETED
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JR Z,FF_WT5 ; OTHERWISE ERASE OPERATION FAILED OR TIMED OUT.
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;
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LD (HL),$F0 ; WRITE DEVICE RESET
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LD C,$FF ; SET FAIL STATUS
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JR FF_WT6
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;
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FF_WT5: LD C,0 ; SET SUCCESS STATUS
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FF_WT6: POP AF ; RETURN TO ORIGINAL BANK
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CALL HBX_BNKSEL ; WHICH IS OUR RAM BIOS COPY
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HB_EI
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;
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RET
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;
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FF_S_SZ .EQU $-FF_SERASE
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;
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; FLASH STYLE
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;
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ST_NORMAL .EQU 0
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ST_ERASE_CHIP .EQU 1 ; SECTOR BASED ERASE NOT SUPPORTED
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ST_PROGRAM_SECT .EQU 2
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;
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; FLASH CHIP MACRO
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;
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#DEFINE FF_CHIP(FFROMID,FFROMNM,FFROMSS,FFROMSC,FFROMMD)\
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#DEFCONT ; \
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#DEFCONT .DW FFROMID \
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#DEFCONT .DB FFROMNM \
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#DEFCONT .DW FFROMSS \
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#DEFCONT .DW FFROMSC \
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#DEFCONT .DB FFROMMD \
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#DEFCONT ;
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;
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; FLASH CHIP LIST
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;
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FF_TABLE:
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FF_CHIP(00120H,"29F010$ ",128,8,ST_NORMAL)
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FF_CHIP(001A4H,"29F040$ ",512,8,ST_NORMAL)
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FF_CHIP(01F04H,"AT49F001NT$",1024,1,ST_ERASE_CHIP)
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FF_CHIP(01F05H,"AT49F001N$ ",1024,1,ST_ERASE_CHIP)
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FF_CHIP(01F07H,"AT49F002N$ ",2048,1,ST_ERASE_CHIP)
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FF_CHIP(01F08H,"AT49F002NT$",2048,1,ST_ERASE_CHIP)
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FF_CHIP(01F13H,"AT49F040$ ",4096,1,ST_ERASE_CHIP)
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FF_CHIP(01F5DH,"AT29C512$ ",1,512,ST_PROGRAM_SECT)
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FF_CHIP(01FA4H,"AT29C040$ ",2,2048,ST_PROGRAM_SECT)
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FF_CHIP(01FD5H,"AT29C010$ ",1,1024,ST_PROGRAM_SECT)
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FF_CHIP(01FDAH,"AT29C020$ ",2,1024,ST_PROGRAM_SECT)
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FF_CHIP(02020H,"M29F010$ ",128,8,ST_PROGRAM_SECT)
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FF_CHIP(020E2H,"M29F040$ ",512,8,ST_NORMAL)
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FF_CHIP(0BFB5H,"39F010$ ",32,32,ST_NORMAL)
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FF_CHIP(0BFB6H,"39F020$ ",32,64,ST_NORMAL)
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FF_CHIP(0BFB7H,"39F040$ ",32,128,ST_NORMAL)
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FF_CHIP(0C2A4H,"MX29F040$ ",512,8,ST_NORMAL)
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;
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FF_T_CNT .EQU 17
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FF_T_SZ .EQU ($-FF_TABLE) / FF_T_CNT
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FF_UNKNOWN .DB "UNKNOWN$"
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FF_STACK: .DW 0
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