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78 lines
2.7 KiB
78 lines
2.7 KiB
;==================================================================================================
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; MEMORY BANK MANAGEMENT
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;==================================================================================================
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;
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; SELECT THE REQUESTED 32K BANK OF RAM/ROM INTO THE LOWER 32K OF CPU ADDRESS SPACE.
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; BANK INDEX IN A, BIT 7 IS SET TO TO SELECT RAM, OTHERWISE ROM
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; MUST BE INVOKED FROM HIGH 32K AND STACK MUST BE IN HIGH 32K
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;______________________________________________________________________________________________________________________
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;
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#IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_ZETA))
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BNKSEL:
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OUT (MPCL_ROM),A ; SET ROM PAGE SELECTOR
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OUT (MPCL_RAM),A ; SET RAM PAGE SELECTOR
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RET
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#ENDIF
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; ZETA SBC V2 USES 16K PAGES. ANY PAGE CAN BE MAPPED TO ONE OF FOUR BANKS:
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; BANK_0: 0K - 16K; BANK_1: 16K - 32K; BANK_2: 32K - 48K; BANK_3: 48K - 64K
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; THIS BNKSEL EMULATES SBC / ZETA BEHAVIOR BY SETTING BANK_0 and BANK_1 TO
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; TWO CONSECUTIVE PAGES
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#IF (PLATFORM == PLT_ZETA2)
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BNKSEL:
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BIT 7,A ; BIT 7 SET REQUESTS RAM PAGE
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JR Z,BNKSEL_ROM ; NOT SET, SELECT ROM PAGE
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RES 7,A ; RAM PAGE REQUESTED: CLEAR ROM BIT
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ADD A,16 ; ADD 16 x 32K - RAM STARTS FROM 512K
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;
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BNKSEL_ROM:
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RLCA ; TIMES 2 - GET 16K PAGE INSTEAD OF 32K
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OUT (MPGSEL_0),A ; BANK_0: 0K - 16K
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INC A ;
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OUT (MPGSEL_1),A ; BANK_1: 16K - 32K
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RET
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#ENDIF
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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#IF (PLATFORM == PLT_N8)
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BNKSEL:
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BIT 7,A ; TEST BIT 7 FOR RAM VS. ROM
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JR Z,BNKSEL_ROM ; IF NOT SET, SELECT ROM PAGE
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;
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BNKSEL_RAM: ; SELECT RAM PAGE
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RES 7,A ; CLEAR BIT 7 FROM ABOVE
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RLCA ; SCALE SELECTOR TO
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RLCA ; ... GO FROM Z180 4K PAGE SIZE
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RLCA ; ... TO DESIRED 32K PAGE SIZE
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OUT0 (Z180_BBR),A ; WRITE TO BANK BASE
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LD A,N8_DEFACR | 80H ; SELECT RAM BY SETTING BIT 7
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OUT0 (N8_ACR),A ; ... IN N8 ACR REGISTER
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RET ; DONE
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;
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BNKSEL_ROM: ; SELECT ROM PAGE
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OUT0 (N8_RMAP),A ; BANK INDEX TO N8 RMAP REGISTER
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XOR A ; ZERO ACCUM
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OUT0 (Z180_BBR),A ; ZERO BANK BASE
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LD A,N8_DEFACR ; SELECT ROM BY CLEARING BIT 7
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OUT0 (N8_ACR),A ; ... IN N8 ACR REGISTER
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RET ; DONE
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;
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#ENDIF
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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#IF (PLATFORM == PLT_MK4)
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BNKSEL:
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RLCA ; RAM FLAG TO CARRY FLAG AND BIT 0
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JR NC,BNKSEL_ROM ; IF NC, WANT ROM PAGE, SKIP AHEAD
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XOR %00100001 ; SET BIT FOR HI 512K, CLR BIT 0
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BNKSEL_ROM:
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RLCA ; CONTINUE SHIFTING TO SCALE SELECTOR
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RLCA ; FOR Z180 4K PAGE -> DESIRED 32K PAGE
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OUT0 (Z180_BBR),A ; WRITE TO BANK BASE
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RET ; DONE
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#ENDIF
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