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621 lines
18 KiB
621 lines
18 KiB
;
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;==================================================================================================
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; STANDARD INCLUDE STUFF
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;==================================================================================================
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;
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; 5/21/2012 2.0.0.0 dwg - added B1F0PEEK & B1F0POKE
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;
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; 5/11/2012 2.0.0.0 dwg - moved BIOS JMPS together
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;
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; 3/04/2012 2.0.0.0 dwg - added CBIOS_BNKSEL for new BIOS jump (OEM extension)
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;
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; 2/21/2012 dwg - added TERM_VT52 terminal type for VDU
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; 12/12/2011 dwg - changed TERM_NOT_SPEC to TERM_TTY & TTY=0 ANSI=1 WYSE=2
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;
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; 12/11/2011 dwg - added TERM_ANSI and TERM_WYSE for TERMTYPE
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;
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; 11/29/2011 dwg - now uses dynamically generated include file
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; instead of static definitions.
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;
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;---------------------------------------------------------------------------------------------------
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;
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TRUE .EQU 1
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FALSE .EQU 0
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;
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; DEPRECATED STUFF!!!
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;
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DIOPLT .EQU 0 ; DEPRECATED!!!
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VDUMODE .EQU 0 ; DEPRECATED!!!
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BIOSSIZE .EQU 0100H ; DEPRECATED!!!
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;
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; PRIMARY HARDWARE PLATFORMS
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;
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PLT_N8VEM .EQU 1 ; N8VEM ECB Z80 SBC
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PLT_ZETA .EQU 2 ; ZETA Z80 SBC
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PLT_N8 .EQU 3 ; N8 (HOME COMPUTER) Z180 SBC
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;
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; BOOT STYLE
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;
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BT_MENU .EQU 1 ; WAIT FOR MENU SELECTION AT LOADER PROMPT
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BT_AUTO .EQU 2 ; AUTO SELECT BOOT_DEFAULT AFTER BOOT_TIMEOUT
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;
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; VDA DEVICES (VIDEO DISPLAY ADAPTER)
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;
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VDADEV_NONE .EQU $00 ; NO VDA DEVICE
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VDADEV_VDU .EQU $10 ; ECB VDU - 6545 CHIP
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VDADEV_CVDU .EQU $20 ; ECB COLOR VDU - 8563 CHIP (NOT IMPLEMENTED)
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VDADEV_7220 .EQU $30 ; ECB uP7220 (NOT IMPLEMENTED)
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VDADEV_N8 .EQU $40 ; N8 ONBOARD VDA SUBSYSTEM (NOT IMPLEMENTED)
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;
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; CHARACTER DEVICES
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;
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CIODEV_UART .EQU $00
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CIODEV_PRPCON .EQU $10
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CIODEV_VDU .EQU $20
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CIODEV_CVDU .EQU $30
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CIODEV_PPPCON .EQU $40
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CIODEV_CRT .EQU $80
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CIODEV_BAT .EQU $E0
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CIODEV_NUL .EQU $F0
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;
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; DISK DEVICES (ONLY FIRST NIBBLE RELEVANT, SECOND NIBBLE RESERVED FOR UNIT)
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;
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DIODEV_MD .EQU $00
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DIODEV_FD .EQU $10
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DIODEV_IDE .EQU $20
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DIODEV_ATAPI .EQU $30
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DIODEV_PPIDE .EQU $40
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DIODEV_SD .EQU $50
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DIODEV_PRPSD .EQU $60
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DIODEV_PPPSD .EQU $70
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DIODEV_HDSK .EQU $80
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;
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; RAM DISK INITIALIZATION OPTIONS
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;
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CLR_NEVER .EQU 0 ; NEVER CLEAR RAM DISK
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CLR_AUTO .EQU 1 ; CLEAR RAM DISK IF INVALID DIR ENTRIES
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CLR_ALWAYS .EQU 2 ; ALWAYS CLEAR RAM DISK
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;
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; DISK MAP SELECTION OPTIONS
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;
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DM_ROM .EQU 1 ; ROM DRIVE PRIORITY
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DM_RAM .EQU 2 ; RAM DRIVE PRIORITY
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DM_FD .EQU 3 ; FLOPPY DRIVE PRIORITY
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DM_IDE .EQU 4 ; IDE DRIVE PRIORITY
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DM_PPIDE .EQU 5 ; PPIDE DRIVE PRIORITY
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DM_SD .EQU 6 ; SD DRIVE PRIORITY
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DM_PRPSD .EQU 7 ; PROPIO SD DRIVE PRIORITY
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DM_PPPSD .EQU 8 ; PROPIO SD DRIVE PRIORITY
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DM_HDSK .EQU 9 ; SIMH HARD DISK DRIVE PRIORITY
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;
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; FLOPPY DISK MEDIA SELECTIONS (ID'S MUST BE INDEX OF ENTRY IN FCD_TBL)
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;
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FDM720 .EQU 0 ; 3.5" FLOPPY, 720KB, 2 SIDES, 80 TRKS, 9 SECTORS
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FDM144 .EQU 1 ; 3.5" FLOPPY, 1.44MB, 2 SIDES, 80 TRKS, 18 SECTORS
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FDM360 .EQU 2 ; 5.25" FLOPPY, 360KB, 2 SIDES, 40 TRKS, 9 SECTORS
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FDM120 .EQU 3 ; 5.25" FLOPPY, 1.2MB, 2 SIDES, 80 TRKS, 15 SECTORS
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FDM111 .EQU 4 ; 8" FLOPPY, 1.11MB, 2 SIDES, 74 TRKS, 15 SECTORS
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;
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; MEDIA ID VALUES
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;
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MID_NONE .EQU 0
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MID_MDROM .EQU 1
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MID_MDRAM .EQU 2
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MID_HD .EQU 3
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MID_FD720 .EQU 4
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MID_FD144 .EQU 5
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MID_FD360 .EQU 6
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MID_FD120 .EQU 7
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MID_FD111 .EQU 8
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;
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; FD MODE SELECTIONS
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;
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FDMODE_DIO .EQU 1 ; DISKIO V1
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FDMODE_ZETA .EQU 2 ; ZETA
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FDMODE_DIDE .EQU 3 ; DUAL IDE
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FDMODE_N8 .EQU 4 ; N8
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FDMODE_DIO3 .EQU 5 ; DISKIO V3
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;
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; IDE MODE SELECTIONS
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;
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IDEMODE_DIO .EQU 1 ; DISKIO V1
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IDEMODE_DIDE .EQU 2 ; DUAL IDE
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;
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; PPIDE MODE SELECTIONS
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;
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PPIDEMODE_STD .EQU 1 ; STANDARD N8VEM PARALLEL PORT
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PPIDEMODE_DIO3 .EQU 2 ; DISKIO V3 PARALLEL PORT
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;;
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;; CONSOLE DEVICE CHOICES FOR LDRCON AND DBGCON IN CONFIG SETTINGS
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;;
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;CON_UART .EQU 1
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;CON_VDU .EQU 2
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;CON_PRP .EQU 3
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;CON_PPP .EQU 4
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;
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; CONSOLE TERMINAL TYPE CHOICES
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;
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TERM_TTY .EQU 0
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TERM_ANSI .EQU 1
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TERM_WYSE .EQU 2
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TERM_VT52 .EQU 3
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;
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; EMULATION TYPES
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;
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EMUTYP_NONE .EQU 0
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EMUTYP_TTY .EQU 1
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EMUTYP_ANSI .EQU 2
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;
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; SYSTEM GENERATION SETTINGS
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;
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SYS_CPM .EQU 1 ; CPM (IMPLIES BDOS + CCP)
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SYS_ZSYS .EQU 2 ; ZSYSTEM OS (IMPLIES ZSDOS + ZCPR)
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;
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DOS_BDOS .EQU 1 ; BDOS
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DOS_ZDDOS .EQU 2 ; ZDDOS VARIANT OF ZSDOS
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DOS_ZSDOS .EQU 3 ; ZSDOS
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;
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CP_CCP .EQU 1 ; CCP COMMAND PROCESSOR
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CP_ZCPR .EQU 2 ; ZCPR COMMAND PROCESSOR
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;
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; CONFIGURE DOS (DOS) AND COMMAND PROCESSOR (CP) BASED ON SYSTEM SETTING (SYS)
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;
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#IFNDEF BLD_SYS
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SYS .EQU SYS_CPM
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#ELSE
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SYS .EQU BLD_SYS
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#ENDIF
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;
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#IF (SYS == SYS_CPM)
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DOS .EQU DOS_BDOS
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CP .EQU CP_CCP
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#DEFINE OSLBL "CP/M-80 2.2C"
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#ENDIF
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;
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#IF (SYS == SYS_ZSYS)
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DOS .EQU DOS_ZSDOS
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CP .EQU CP_ZCPR
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#DEFINE OSLBL "ZSDOS 1.1"
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#ENDIF
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;
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; INCLUDE VERSION AND BUILD SETTINGS
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;
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#INCLUDE "ver.inc" ; ADD BIOSVER
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;
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#INCLUDE "build.inc" ; INCLUDE USER CONFIG, ADD VARIANT, TIMESTAMP, & ROMSIZE
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;
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#IF (PLATFORM != PLT_N8)
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;
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; N8VEM HARDWARE IO PORT ADDRESSES AND MEMORY LOCATIONS
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;
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MPCL_RAM .EQU 78H ; BASE IO ADDRESS OF RAM MEMORY PAGER CONFIGURATION LATCH
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MPCL_ROM .EQU 7CH ; BASE IO ADDRESS OF ROM MEMORY PAGER CONFIGURATION LATCH
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RTC .EQU 70H ; ADDRESS OF RTC LATCH AND INPUT PORT
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;__HARDWARE_INTERFACES________________________________________________________________________________________________________________
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;
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; PPI 82C55 I/O IS DECODED TO PORT 60-67
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;
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PPIA .EQU 60H ; PORT A
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PPIB .EQU 61H ; PORT B
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PPIC .EQU 62H ; PORT C
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PPIX .EQU 63H ; PPI CONTROL PORT
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;
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; 16C550 SERIAL LINE UART
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;
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SIO_BASE .EQU 68H
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SIO_RBR .EQU SIO_BASE + 0 ; DLAB=0: RCVR BUFFER REG (READ ONLY)
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SIO_THR .EQU SIO_BASE + 0 ; DLAB=0: XMIT HOLDING REG (WRITE ONLY)
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SIO_IER .EQU SIO_BASE + 1 ; DLAB=0: INT ENABLE REG
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SIO_IIR .EQU SIO_BASE + 2 ; INT IDENT REGISTER (READ ONLY)
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SIO_FCR .EQU SIO_BASE + 2 ; FIFO CONTROL REG (WRITE ONLY)
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SIO_LCR .EQU SIO_BASE + 3 ; LINE CONTROL REG
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SIO_MCR .EQU SIO_BASE + 4 ; MODEM CONTROL REG
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SIO_LSR .EQU SIO_BASE + 5 ; LINE STATUS REG
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SIO_MSR .EQU SIO_BASE + 6 ; MODEM STATUS REG
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SIO_SCR .EQU SIO_BASE + 7 ; SCRATCH REGISTER
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SIO_DLL .EQU SIO_BASE + 0 ; DLAB=1: DIVISOR LATCH (LS)
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SIO_DLM .EQU SIO_BASE + 1 ; DLAB=1: DIVISOR LATCH (MS)
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;
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#ENDIF ; (PLATFORM != PLT_N8)
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;
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#IF (PLATFORM == PLT_N8)
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;
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; Z180 REGISTERS
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;
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CPU_IOBASE .EQU 40H ; ONLY RELEVANT FOR Z180
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;
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CPU_CNTLA0: .EQU CPU_IOBASE+$00 ;ASCI0 control A
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CPU_CNTLA1: .EQU CPU_IOBASE+$01 ;ASCI1 control A
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CPU_CNTLB0: .EQU CPU_IOBASE+$02 ;ASCI0 control B
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CPU_CNTLB1: .EQU CPU_IOBASE+$03 ;ASCI1 control B
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CPU_STAT0: .EQU CPU_IOBASE+$04 ;ASCI0 status
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CPU_STAT1: .EQU CPU_IOBASE+$05 ;ASCI1 status
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CPU_TDR0: .EQU CPU_IOBASE+$06 ;ASCI0 transmit
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CPU_TDR1: .EQU CPU_IOBASE+$07 ;ASCI1 transmit
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CPU_RDR0: .EQU CPU_IOBASE+$08 ;ASCI0 receive
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CPU_RDR1: .EQU CPU_IOBASE+$09 ;ASCI1 receive
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CPU_CNTR: .EQU CPU_IOBASE+$0A ;CSI/O control
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CPU_TRDR: .EQU CPU_IOBASE+$0B ;CSI/O transmit/receive
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CPU_TMDR0L: .EQU CPU_IOBASE+$0C ;Timer 0 data lo
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CPU_TMDR0H: .EQU CPU_IOBASE+$0D ;Timer 0 data hi
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CPU_RLDR0L: .EQU CPU_IOBASE+$0E ;Timer 0 reload lo
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CPU_RLDR0H: .EQU CPU_IOBASE+$0F ;Timer 0 reload hi
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CPU_TCR: .EQU CPU_IOBASE+$10 ;Timer control
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;
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CPU_ASEXT0: .EQU CPU_IOBASE+$12 ;ASCI0 extension control (Z8S180)
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CPU_ASEXT1: .EQU CPU_IOBASE+$13 ;ASCI1 extension control (Z8S180)
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;
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CPU_TMDR1L: .EQU CPU_IOBASE+$14 ;Timer 1 data lo
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CPU_TMDR1H: .EQU CPU_IOBASE+$15 ;Timer 1 data hi
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CPU_RLDR1L: .EQU CPU_IOBASE+$16 ;Timer 1 reload lo
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CPU_RLDR1H: .EQU CPU_IOBASE+$17 ;Timer 1 reload hi
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CPU_FRC: .EQU CPU_IOBASE+$18 ;Free running counter
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CPU_ASTC0L: .EQU CPU_IOBASE+$1A ;ASCI0 Time constant lo (Z8S180)
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CPU_ASTC0H: .EQU CPU_IOBASE+$1B ;ASCI0 Time constant hi (Z8S180)
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CPU_ASTC1L: .EQU CPU_IOBASE+$1C ;ASCI1 Time constant lo (Z8S180)
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CPU_ASTC1H: .EQU CPU_IOBASE+$1D ;ASCI1 Time constant hi (Z8S180)
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CPU_CMR: .EQU CPU_IOBASE+$1E ;Clock multiplier (latest Z8S180)
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CPU_CCR: .EQU CPU_IOBASE+$1F ;CPU control (Z8S180)
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;
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CPU_SAR0L: .EQU CPU_IOBASE+$20 ;DMA0 source addr lo
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CPU_SAR0H: .EQU CPU_IOBASE+$21 ;DMA0 source addr hi
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CPU_SAR0B: .EQU CPU_IOBASE+$22 ;DMA0 source addr bank
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CPU_DAR0L: .EQU CPU_IOBASE+$23 ;DMA0 dest addr lo
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CPU_DAR0H: .EQU CPU_IOBASE+$24 ;DMA0 dest addr hi
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CPU_DAR0B: .EQU CPU_IOBASE+$25 ;DMA0 dest addr bank
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CPU_BCR0L: .EQU CPU_IOBASE+$26 ;DMA0 byte count lo
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CPU_BCR0H: .EQU CPU_IOBASE+$27 ;DMA0 byte count hi
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CPU_MAR1L: .EQU CPU_IOBASE+$28 ;DMA1 memory addr lo
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CPU_MAR1H: .EQU CPU_IOBASE+$29 ;DMA1 memory addr hi
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CPU_MAR1B: .EQU CPU_IOBASE+$2A ;DMA1 memory addr bank
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CPU_IAR1L: .EQU CPU_IOBASE+$2B ;DMA1 I/O addr lo
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CPU_IAR1H: .EQU CPU_IOBASE+$2C ;DMA1 I/O addr hi
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CPU_IAR1B: .EQU CPU_IOBASE+$2D ;DMA1 I/O addr bank (Z8S180)
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CPU_BCR1L: .EQU CPU_IOBASE+$2E ;DMA1 byte count lo
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CPU_BCR1H: .EQU CPU_IOBASE+$2F ;DMA1 byte count hi
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CPU_DSTAT: .EQU CPU_IOBASE+$30 ;DMA status
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CPU_DMODE: .EQU CPU_IOBASE+$31 ;DMA mode
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CPU_DCNTL: .EQU CPU_IOBASE+$32 ;DMA/WAIT control
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CPU_IL: .EQU CPU_IOBASE+$33 ;Interrupt vector load
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CPU_ITC: .EQU CPU_IOBASE+$34 ;INT/TRAP control
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;
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CPU_RCR: .EQU CPU_IOBASE+$36 ;Refresh control
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;
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CPU_CBR: .EQU CPU_IOBASE+$38 ;MMU common base register
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CPU_BBR: .EQU CPU_IOBASE+$39 ;MMU bank base register
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CPU_CBAR .EQU CPU_IOBASE+$3A ;MMU common/bank area register
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;
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CPU_OMCR: .EQU CPU_IOBASE+$3E ;Operation mode control
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CPU_ICR: .EQU $3F ;I/O control register (not relocated!!!)
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;
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; N8 ONBOARD I/O REGISTERS
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;
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N8_IOBASE .EQU $80
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;
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PPI .EQU N8_IOBASE+$00
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PPIA .EQU PPI+$00 ; PORT A
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PPIB .EQU PPI+$01 ; PORT B
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PPIC .EQU PPI+$02 ; PORT C
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PPIX .EQU PPI+$03 ; PPI CONTROL PORT
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;
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PPI2 .EQU N8_IOBASE+$04
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PPI2A .EQU PPI2+$00 ; PORT A
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PPI2B .EQU PPI2+$01 ; PORT B
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PPI2C .EQU PPI2+$02 ; PORT C
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PPI2X .EQU PPI2+$03 ; PPI CONTROL PORT
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;
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RTC: .EQU N8_IOBASE+$08 ;RTC latch and buffer
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;FDC: .EQU N8_IOBASE+$0C ;Floppy disk controller
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;UTIL: .EQU N8_IOBASE+$10 ;Floppy disk utility
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ACR: .EQU N8_IOBASE+$14 ;auxillary control register
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RMAP: .EQU N8_IOBASE+$16 ;ROM page register
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VDP: .EQU N8_IOBASE+$18 ;Video Display Processor (TMS9918A)
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PSG: .EQU N8_IOBASE+$1C ;Programmable Sound Generator (AY-3-8910)
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;
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DEFACR .EQU $1B
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;
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#ENDIF
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;
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; CHARACTER DEVICE FUNCTIONS
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;
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CF_INIT .EQU 0
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CF_IN .EQU 1
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CF_IST .EQU 2
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CF_OUT .EQU 3
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CF_OST .EQU 4
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;
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; DISK OPERATIONS
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;
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DOP_READ .EQU 0 ; READ OPERATION
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DOP_WRITE .EQU 1 ; WRITE OPERATION
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DOP_FORMAT .EQU 2 ; FORMAT OPERATION
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DOP_READID .EQU 3 ; READ ID OPERATION
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;
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; DISK DRIVER FUNCTIONS
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;
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DF_READY .EQU 1
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DF_SELECT .EQU 2
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DF_READ .EQU 3
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DF_WRITE .EQU 4
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DF_FORMAT .EQU 5
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;
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; BIOS FUNCTIONS
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;
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BF_CIO .EQU $00
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BF_CIOIN .EQU BF_CIO + 0 ; CHARACTER INPUT
|
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BF_CIOOUT .EQU BF_CIO + 1 ; CHARACTER OUTPUT
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BF_CIOIST .EQU BF_CIO + 2 ; CHARACTER INPUT STATUS
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BF_CIOOST .EQU BF_CIO + 3 ; CHARACTER OUTPUT STATUS
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BF_CIOCFG .EQU BF_CIO + 4 ; CHARACTER I/O CONFIG
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;
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BF_DIO .EQU $10
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BF_DIORD .EQU BF_DIO + 0 ; DISK READ
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BF_DIOWR .EQU BF_DIO + 1 ; DISK WRITE
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BF_DIOST .EQU BF_DIO + 2 ; DISK STATUS
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BF_DIOMED .EQU BF_DIO + 3 ; DISK MEDIA
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BF_DIOID .EQU BF_DIO + 4 ; DISK IDENTIFY
|
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BF_DIOGETBUF .EQU BF_DIO + 8 ; DISK GET BUFFER ADR
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BF_DIOSETBUF .EQU BF_DIO + 9 ; DISK SET BUFFER ADR
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;
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BF_RTC .EQU $20
|
|
BF_RTCGETTIM .EQU BF_RTC + 0 ; GET TIME
|
|
BF_RTCSETTIM .EQU BF_RTC + 1 ; SET TIME
|
|
BF_RTCGETBYT .EQU BF_RTC + 2 ; GET NVRAM BYTE BY INDEX
|
|
BF_RTCSETBYT .EQU BF_RTC + 3 ; SET NVRAM BYTE BY INDEX
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BF_RTCGETBLK .EQU BF_RTC + 4 ; GET NVRAM DATA BLOCK
|
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BF_RTCSETBLK .EQU BF_RTC + 5 ; SET NVRAM DATA BLOCK
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;
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BF_EMU .EQU $30
|
|
BF_EMUIN .EQU BF_EMU + 0 ; EMULATOR CHARACTER INPUT
|
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BF_EMUOUT .EQU BF_EMU + 1 ; EMULATOR CHARACTER OUTPUT
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BF_EMUIST .EQU BF_EMU + 2 ; EMULATOR CHARACTER INPUT STATUS
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BF_EMUOST .EQU BF_EMU + 3 ; EMULATOR CHARACTER OUTPUT STATUS
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BF_EMUCFG .EQU BF_EMU + 4 ; EMULATOR CHARACTER I/O CONFIG
|
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BF_EMUINI .EQU BF_EMU + 8 ; INITIALIZE EMULATION
|
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BF_EMUQRY .EQU BF_EMU + 9 ; QUERY EMULATION STATUS
|
|
;
|
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BF_VDA .EQU $40
|
|
BF_VDAINI .EQU BF_VDA + 0 ; INITIALIZE VDU
|
|
BF_VDAQRY .EQU BF_VDA + 1 ; QUERY VDU STATUS
|
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BF_VDARES .EQU BF_VDA + 2 ; SOFT RESET VDU
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BF_VDASCS .EQU BF_VDA + 3 ; SET CURSOR STYLE
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BF_VDASCP .EQU BF_VDA + 4 ; SET CURSOR POSITION
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BF_VDASAT .EQU BF_VDA + 5 ; SET CHARACTER ATTRIBUTE
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BF_VDASCO .EQU BF_VDA + 6 ; SET CHARACTER COLOR
|
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BF_VDAWRC .EQU BF_VDA + 7 ; WRITE CHARACTER
|
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BF_VDAFIL .EQU BF_VDA + 8 ; FILL
|
|
BF_VDASCR .EQU BF_VDA + 9 ; SCROLL
|
|
BF_VDAKST .EQU BF_VDA + 10 ; GET KEYBOARD STATUS
|
|
BF_VDAKFL .EQU BF_VDA + 11 ; FLUSH KEYBOARD BUFFER
|
|
BF_VDAKRD .EQU BF_VDA + 12 ; READ KEYBOARD
|
|
;
|
|
BF_SYS .EQU $F0
|
|
BF_SYSGETCFG .EQU BF_SYS + 0 ; GET CONFIGURATION DATA BLOCK
|
|
BF_SYSSETCFG .EQU BF_SYS + 1 ; SET CONFIGURATION DATA BLOCK
|
|
BF_SYSBNKCPY .EQU BF_SYS + 2 ; COPY TO/FROM RAM/ROM MEMORY BANK
|
|
BF_SYSGETVER .EQU BF_SYS + 3 ; GET VERSION OF HBIOS
|
|
;
|
|
;
|
|
; MEMORY LAYOUT
|
|
;
|
|
CPM_LOC .EQU 0D000H ; CONFIGURABLE: LOCATION OF CPM FOR RUNNING SYSTEM
|
|
CPM_SIZ .EQU 2F00H ; SIZE OF CPM IMAGE (CCP + BDOS + CBIOS (INCLUDING DATA))
|
|
CPM_END .EQU CPM_LOC + CPM_SIZ
|
|
;
|
|
CCP_LOC .EQU CPM_LOC ; START OF COMMAND PROCESSOR
|
|
CCP_SIZ .EQU 800H
|
|
CCP_END .EQU CCP_LOC + CCP_SIZ
|
|
;
|
|
BDOS_LOC .EQU CCP_END ; START OF BDOS
|
|
BDOS_SIZ .EQU 0E00H
|
|
BDOS_END .EQU BDOS_LOC + BDOS_SIZ
|
|
;
|
|
CBIOS_LOC .EQU BDOS_END
|
|
CBIOS_SIZ .EQU CPM_END - CBIOS_LOC
|
|
CBIOS_END .EQU CBIOS_LOC + CBIOS_SIZ
|
|
;
|
|
CPM_ENT .EQU CBIOS_LOC
|
|
;
|
|
HB_LOC .EQU CPM_END
|
|
HB_SIZ .EQU 100H
|
|
HB_END .EQU HB_LOC + HB_SIZ
|
|
;
|
|
MON_LOC .EQU 0C000H ; LOCATION OF MONITOR FOR RUNNING SYSTEM
|
|
MON_SIZ .EQU 01000H ; SIZE OF MONITOR BINARY IMAGE
|
|
MON_END .EQU MON_LOC + MON_SIZ
|
|
MON_DSKY .EQU MON_LOC ; MONITOR ENTRY (DSKY)
|
|
MON_UART .EQU MON_LOC + 3 ; MONITOR ENTRY (UART)
|
|
;
|
|
CBIOS_BOOT .EQU CBIOS_LOC + 0
|
|
CBIOS_WBOOT .EQU CBIOS_LOC + 3
|
|
CBIOS_CONST .EQU CBIOS_LOC + 6
|
|
CBIOS_CONIN .EQU CBIOS_LOC + 9
|
|
CBIOS_CONOUT .EQU CBIOS_LOC + 12
|
|
CBIOS_LIST .EQU CBIOS_LOC + 15
|
|
CBIOS_PUNCH .EQU CBIOS_LOC + 18
|
|
CBIOS_READER .EQU CBIOS_LOC + 21
|
|
CBIOS_HOME .EQU CBIOS_LOC + 24
|
|
CBIOS_SELDSK .EQU CBIOS_LOC + 27
|
|
CBIOS_SETTRK .EQU CBIOS_LOC + 30
|
|
CBIOS_SETSEC .EQU CBIOS_LOC + 33
|
|
CBIOS_SETDMA .EQU CBIOS_LOC + 36
|
|
CBIOS_READ .EQU CBIOS_LOC + 39
|
|
CBIOS_WRITE .EQU CBIOS_LOC + 42
|
|
CBIOS_LISTST .EQU CBIOS_LOC + 45
|
|
CBIOS_SECTRN .EQU CBIOS_LOC + 48
|
|
;
|
|
; EXTENDED CBIOS FUNCTIONS
|
|
;
|
|
CBIOS_BNKSEL .EQU CBIOS_LOC + 51
|
|
CBIOS_GETDSK .EQU CBIOS_LOC + 54
|
|
CBIOS_SETDSK .EQU CBIOS_LOC + 57
|
|
CBIOS_GETINFO .EQU CBIOS_LOC + 60
|
|
;
|
|
; PLACEHOLDERS FOR FUTURE CBIOS EXTENSIONS
|
|
;
|
|
CBIOS_RSVD1 .EQU CBIOS_LOC + 63
|
|
CBIOS_RSVD2 .EQU CBIOS_LOC + 76
|
|
CBIOS_RSVD3 .EQU CBIOS_LOC + 69
|
|
CBIOS_RSVD4 .EQU CBIOS_LOC + 72
|
|
;
|
|
CDISK: .EQU 00004H ; LOC IN PAGE 0 OF CURRENT DISK NUMBER 0=A,...,15=P
|
|
IOBYTE: .EQU 00003H ; LOC IN PAGE 0 OF I/O DEFINITION BYTE.
|
|
;
|
|
; MEMORY CONFIGURATION
|
|
;
|
|
MSIZE .EQU 59 ; CP/M VERSION MEMORY SIZE IN KILOBYTES
|
|
;
|
|
; "BIAS" IS ADDRESS OFFSET FROM 3400H FOR MEMORY SYSTEMS
|
|
; THAN 16K (REFERRED TO AS "B" THROUGHOUT THE TEXT)
|
|
;
|
|
BIAS: .EQU (MSIZE-20)*1024
|
|
CCP: .EQU 3400H+BIAS ; BASE OF CCP
|
|
BDOS: .EQU CCP+806H ; BASE OF BDOS
|
|
BIOS: .EQU CCP+1600H ; BASE OF BIOS
|
|
CCPSIZ: .EQU 00800H
|
|
;
|
|
#IF (PLATFORM == PLT_N8VEM)
|
|
#DEFINE PLATFORM_NAME "N8VEM Z80 SBC"
|
|
#ENDIF
|
|
#IF (PLATFORM == PLT_ZETA)
|
|
#DEFINE PLATFORM_NAME "ZETA Z80 SBC"
|
|
#ENDIF
|
|
#IF (PLATFORM == PLT_N8)
|
|
#DEFINE PLATFORM_NAME "N8 Z180 SBC"
|
|
#ENDIF
|
|
;
|
|
#IF (DSKYENABLE)
|
|
#DEFINE DSKYLBL ", DSKY"
|
|
#ELSE
|
|
#DEFINE DSKYLBL ""
|
|
#ENDIF
|
|
;
|
|
#IF (VDUENABLE)
|
|
#DEFINE VDULBL ", VDU"
|
|
#ELSE
|
|
#DEFINE VDULBL ""
|
|
#ENDIF
|
|
;
|
|
#IF (FDENABLE)
|
|
#IF (FDMAUTO)
|
|
#DEFINE FDLBL ", FLOPPY (AUTOSIZE)"
|
|
#ELSE
|
|
#IF (FDMEDIA == FDM720)
|
|
#DEFINE FDLBL ", FLOPPY (720KB)"
|
|
#ENDIF
|
|
#IF (FDMEDIA == FDM144)
|
|
#DEFINE FDLBL ", FLOPPY (1.44MB)"
|
|
#ENDIF
|
|
#IF (FDMEDIA == FDM120)
|
|
#DEFINE FDLBL ", FLOPPY (1.20MB)"
|
|
#ENDIF
|
|
#IF (FDMEDIA == FDM360)
|
|
#DEFINE FDLBL ", FLOPPY (360KB)"
|
|
#ENDIF
|
|
#IF (FDMEDIA == FDM111)
|
|
#DEFINE FDLBL ", FLOPPY (1.11MB)"
|
|
#ENDIF
|
|
#ENDIF
|
|
#ELSE
|
|
#DEFINE FDLBL ""
|
|
#ENDIF
|
|
;
|
|
#IF (IDEENABLE)
|
|
#IF (IDEMODE == IDEMODE_DIO)
|
|
#DEFINE IDELBL ", IDE (DISKIO)"
|
|
#ENDIF
|
|
#IF (IDEMODE == IDEMODE_DIDE)
|
|
#DEFINE IDELBL ", IDE (DUAL IDE)"
|
|
#ENDIF
|
|
#ELSE
|
|
#DEFINE IDELBL ""
|
|
#ENDIF
|
|
;
|
|
#IF (PPIDEENABLE)
|
|
#IF (PPIDEMODE == PPIDEMODE_STD)
|
|
#DEFINE PPIDELBL ", PPIDE (STD)"
|
|
#ENDIF
|
|
#IF (PPIDEMODE == PPIDEMODE_DIO3)
|
|
#DEFINE PPIDELBL ", PPIDE (DISKIO V3)"
|
|
#ENDIF
|
|
#ELSE
|
|
#DEFINE PPIDELBL ""
|
|
#ENDIF
|
|
;
|
|
#IF (SDENABLE)
|
|
#DEFINE SDLBL ", SD CARD"
|
|
#ELSE
|
|
#DEFINE SDLBL ""
|
|
#ENDIF
|
|
;
|
|
#IF (IDEENABLE)
|
|
#DEFINE IDELBL ", IDE"
|
|
#ELSE
|
|
#DEFINE IDELBL ""
|
|
#ENDIF
|
|
;
|
|
#IF (PPIDEENABLE)
|
|
#DEFINE PPIDELBL ", PPIDE"
|
|
#ELSE
|
|
#DEFINE PPIDELBL ""
|
|
#ENDIF
|
|
|
|
#IF (SDENABLE)
|
|
#DEFINE SDLBL ", SD CARD"
|
|
#ELSE
|
|
#DEFINE SDLBL ""
|
|
#ENDIF
|
|
|
|
#IF (HDSKENABLE)
|
|
#DEFINE HDSKLBL ", SIMH DISK"
|
|
#ELSE
|
|
#DEFINE HDSKLBL ""
|
|
#ENDIF
|
|
|
|
#IF (PRPENABLE)
|
|
#IF (PRPCONENABLE & PRPSDENABLE)
|
|
#DEFINE PRPLBL ", PROPIO (CONSOLE, SD CARD)"
|
|
#ENDIF
|
|
#IF (PRPCONENABLE & !PRPSDENABLE)
|
|
#DEFINE PRPLBL ", PROPIO (CONSOLE)"
|
|
#ENDIF
|
|
#IF (!PRPCONENABLE & PRPSDENABLE)
|
|
#DEFINE PRPLBL ", PROPIO (SD CARD)"
|
|
#ENDIF
|
|
#IF (!PRPCONENABLE & !PRPSDENABLE)
|
|
#DEFINE PRPLBL ", PROPIO ()"
|
|
#ENDIF
|
|
#ELSE
|
|
#DEFINE PRPLBL ""
|
|
#ENDIF
|
|
|
|
#IF (PPPENABLE)
|
|
#IF (PPPCONENABLE & PPPSDENABLE)
|
|
#DEFINE PPPLBL ", PARPORTPROP (CONSOLE, SD CARD)"
|
|
#ENDIF
|
|
#IF (PPPCONENABLE & !PPPSDENABLE)
|
|
#DEFINE PPPLBL ", PARPORTPROP (CONSOLE)"
|
|
#ENDIF
|
|
#IF (!PPPCONENABLE & PPPSDENABLE)
|
|
#DEFINE PPPLBL ", PARPORTPROP (SD CARD)"
|
|
#ENDIF
|
|
#IF (!PPPCONENABLE & !PPPSDENABLE)
|
|
#DEFINE PPPLBL ", PARPORTPROP ()"
|
|
#ENDIF
|
|
#ELSE
|
|
#DEFINE PPPLBL ""
|
|
#ENDIF
|
|
|
|
.ECHO "Configuration: "
|
|
.ECHO PLATFORM_NAME
|
|
.ECHO DSKYLBL
|
|
.ECHO VDULBL
|
|
.ECHO FDLBL
|
|
.ECHO IDELBL
|
|
.ECHO PPIDELBL
|
|
.ECHO SDLBL
|
|
.ECHO PRPLBL
|
|
.ECHO PPPLBL
|
|
.ECHO "\n"
|
|
|