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95 lines
2.1 KiB
95 lines
2.1 KiB
title 'bank & move module for CP/M3 linked BIOS'
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cseg
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public ?move,?xmove,?bank,?bnkxlt
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public ?mvinit,@hbbio,@hbusr
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extrn @cbnk
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?mvinit:
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ld bc,0F8F2h ; HBIOS GET BNKINFO
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;rst 08 ; D: BIOS Bank, E: User Bank
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call 0FFF0h ; D: BIOS Bank, E: User Bank
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ld a,d
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ld (@hbbio),a
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ld a,e
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ld (@hbusr),a
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ret
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?xmove:
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ld (movbnks),bc ; save source & dest banks
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or 0FFh ; flag interbank move type
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ld (movtyp),a ; save it
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ret
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?move:
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ld a,(movtyp) ; get move type flag
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or a ; set flags
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jr nz,xbnkmov ; if so, go to interbank move
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; Intrabank move
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ex de,hl ; we are passed source in DE and dest in HL
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ldir ; use Z80 block move instruction
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ex de,hl ; need next addresses in same regs
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ret
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xbnkmov:
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;ld ix,8888H
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;halt
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; Interbank move
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xor a ; zero
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ld (movtyp),a ; clear move type flag
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ld a,(srcbnk)
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call ?bnkxlt
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ld (0FFE4h),a
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ld a,(dstbnk)
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call ?bnkxlt
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ld (0FFE7h),a
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ex de,hl ; swap address regs for call
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call 0FFF6h ; HBIOS BNKCPY
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ex de,hl ; next addresses in same regs
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ret
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?bank:
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call ?bnkxlt ; xlat to HBIOS bank id
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jp 0FFF3h ; do it and return
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;
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; Convert from CPM3 bank id to HBIOS bank id.
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; CPM3 wants TPA for it's bank 0, so that is special
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; case mapping to HBIOS BID_USR (8Eh). Otherwise, we index
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; down below BID_HBIOS (8Dh). So CPM3 bank usage grows
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; downward.
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;
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; CPM3 HBIOS Typical
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; ------------ -------------- -------
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; COMMON BID_COM 8Fh
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; 0: OS/BUFS BID_USR 8Eh
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; 1: TPA BID_AUX 8Dh
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; 2: BUFS BID_AUX-1 8Ch
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; 3: BUFS BID_AUX-2 8Bh
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; 4: BUFS BID_AUX-3 8Ah
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; 5: BUFS BID_AUX-4 89h
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;
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; N.B., Below BID_AUX is considered RAM disk bank. Need to
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; make sure RAM disk is kept small enough to stay below
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; banks used for OS buffers.
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;
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; @hbbio & @hbusr are dynamically updated during init
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; to adjust for real size of RAM in system
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;
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?bnkxlt:
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neg ; ex: 2 -> -2
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add a,8Eh ; ex: 8Eh - 2 = 8Ch
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@hbusr equ $ - 1 ; BID_USR
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ret
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@hbbio db 0 ; BID_BIOS
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movtyp db 0 ; non-zero for interbank move
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movbnks:
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srcbnk db 0
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dstbnk db 0
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end
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