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213 lines
5.7 KiB
213 lines
5.7 KiB
; ~/RomWBW/branches/s100/Source/std.asm 1/19/2013 dwg -
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;
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;
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; DEPRECATED STUFF!!!
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;
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;DIOPLT .EQU 0 ; DEPRECATED!!!
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;VDUMODE .EQU 0 ; DEPRECATED!!!
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;BIOSSIZE .EQU 0100H ; DEPRECATED!!!
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;
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; PRIMARY HARDWARE PLATFORMS
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;
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;PLT_N8VEM .EQU 1 ; N8VEM ECB Z80 SBC
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;PLT_ZETA .EQU 2 ; ZETA Z80 SBC
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;PLT_N8 .EQU 3 ; N8 (HOME COMPUTER) Z180 SBC
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;PLT_S2I .EQU 4 ; SCSI2IDE
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;PLT_S100 .EQU 5 ; S100COMPUTERS Z80 based system
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; BOOT STYLE
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;
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;BT_MENU .EQU 1 ; WAIT FOR MENU SELECTION AT LOADER PROMPT
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;BT_AUTO .EQU 2 ; AUTO SELECT BOOT_DEFAULT AFTER BOOT_TIMEOUT
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;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;
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; VDA DEVICES (VIDEO DISPLAY ADAPTER)
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;
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;VDADEV_NONE .EQU $00 ; NO VDA DEVICE
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;VDADEV_VDU .EQU $10 ; ECB VDU - 6545 CHIP
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;VDADEV_CVDU .EQU $20 ; ECB COLOR VDU - 8563 CHIP (NOT IMPLEMENTED)
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;VDADEV_UPD7220 .EQU $30 ; ECB uP7220 (NO T IMPLEMENTED)
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;VDADEV_N8V .EQU $40 ; N8 ONBOARD VDA SUBSYSTEM
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;
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; CHARACTER DEVICES
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;
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;CIODEV_UART .EQU $00
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CIODEV_ASCI .EQU $10
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CIODEV_VDU .EQU $20
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CIODEV_CVDU .EQU $30
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CIODEV_UPD7220 .EQU $40
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CIODEV_N8V .EQU $50
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CIODEV_PRPCON .EQU $60
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CIODEV_PPPCON .EQU $70
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CIODEV_CRT .EQU $D0
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;CIODEV_BAT .EQU $E0
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CIODEV_NUL .EQU $F0
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;
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; DISK DEVICES (ONLY FIRST NIBBLE RELEVANT, SECOND NIBBLE RESERVED FOR UNIT)
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;
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;DIODEV_MD .EQU $00
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DIODEV_FD .EQU $10
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DIODEV_IDE .EQU $20
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DIODEV_ATAPI .EQU $30
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DIODEV_PPIDE .EQU $40
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DIODEV_SD .EQU $50
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DIODEV_PRPSD .EQU $60
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DIODEV_PPPSD .EQU $70
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DIODEV_HDSK .EQU $80
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;
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; RAM DISK INITIALIZATION OPTIONS
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;
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;;CLR_NEVER .EQU 0 ; NEVER CLEAR RAM DISK
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;;CLR_AUTO .EQU 1 ; CLEAR RAM DISK IF INVALID DIR ENTRIES
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;;CLR_ALWAYS .EQU 2 ; ALWAYS CLEAR RAM DISK
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;
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; DISK MAP SELECTION OPTIONS
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;
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;DM_ROM .EQU 1 ; ROM DRIVE PRIORITY
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;DM_RAM .EQU 2 ; RAM DRIVE PRIORITY
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;DM_FD .EQU 3 ; FLOPPY DRIVE PRIORITY
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;DM_IDE .EQU 4 ; IDE DRIVE PRIORITY
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;DM_PPIDE .EQU 5 ; PPIDE DRIVE PRIORITY
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;DM_SD .EQU 6 ; SD DRIVE PRIORITY
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;DM_PRPSD .EQU 7 ; PROPIO SD DRIVE PRIORITY
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;DM_PPPSD .EQU 8 ; PROPIO SD DRIVE PRIORITY
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;DM_HDSK .EQU 9 ; SIMH HARD DISK DRIVE PRIORITY
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;
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; FLOPPY DISK MEDIA SELECTIONS (ID'S MUST BE INDEX OF ENTRY IN FCD_TBL)
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;
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;FDM720 .EQU 0 ; 3.5" FLOPPY, 720KB, 2 SIDES, 80 TRKS, 9 SECTORS
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;FDM144 .EQU 1 ; 3.5" FLOPPY, 1.44MB, 2 SIDES, 80 TRKS, 18 SECTORS
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;FDM360 .EQU 2 ; 5.25" FLOPPY, 360KB, 2 SIDES, 40 TRKS, 9 SECTORS
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;FDM120 .EQU 3 ; 5.25" FLOPPY, 1.2MB, 2 SIDES, 80 TRKS, 15 SECTORS
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;FDM111 .EQU 4 ; 8" FLOPPY, 1.11MB, 2 SIDES, 74 TRKS, 15 SECTORS
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;
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; MEDIA ID VALUES
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;
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;MID_NONE .EQU 0
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;MID_MDROM .EQU 1
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;MID_MDRAM .EQU 2
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;MID_HD .EQU 3
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;MID_FD720 .EQU 4
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;MID_FD144 .EQU 5
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;MID_FD360 .EQU 6
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;MID_FD120 .EQU 7
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;MID_FD111 .EQU 8
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;
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; FD MODE SELECTIONS
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;
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;;FDMODE_DIO .EQU 1 ; DISKIO V1
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;;FDMODE_ZETA .EQU 2 ; ZETA
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;;FDMODE_DIDE .EQU 3 ; DUAL IDE
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;;FDMODE_N8 .EQU 4 ; N8
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;;FDMODE_DIO3 .EQU 5 ; DISKIO V3
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;
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; IDE MODE SELECTIONS
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;
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;;IDEMODE_DIO .EQU 1 ; DISKIO V1
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;;IDEMODE_DIDE .EQU 2 ; DUAL IDE
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;
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; PPIDE MODE SELECTIONS
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;
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;;PPIDEMODE_STD .EQU 1 ; STANDARD N8VEM PARALLEL PORT
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;;PPIDEMODE_DIO3 .EQU 2 ; DISKIO V3 PARALLEL PORT
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;
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; CONSOLE TERMINAL TYPE CHOICES
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;
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;;TERM_TTY .EQU 0
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;;TERM_ANSI .EQU 1
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;;TERM_WYSE .EQU 2
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;;TERM_VT52 .EQU 3
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;
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; EMULATION TYPES
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;
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;;EMUTYP_NONE .EQU 0
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;;EMUTYP_TTY .EQU 1
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;;EMUTYP_ANSI .EQU 2
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;
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; SYSTEM GENERATION SETTINGS
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;
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;;SYS_CPM .EQU 1 ; CPM (IMPLIES BDOS + CCP)
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;;SYS_ZSYS .EQU 2 ; ZSYSTEM OS (IMPLIES ZSDOS + ZCPR)
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;
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;;DOS_BDOS .EQU 1 ; BDOS
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;;DOS_ZDDOS .EQU 2 ; ZDDOS VARIANT OF ZSDOS
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;;DOS_ZSDOS .EQU 3 ; ZSDOS
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;
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;;CP_CCP .EQU 1 ; CCP COMMAND PROCESSOR
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;;CP_ZCPR .EQU 2 ; ZCPR COMMAND PROCESSOR
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;
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; CONFIGURE DOS (DOS) AND COMMAND PROCESSOR (CP) BASED ON SYSTEM SETTING (SYS)
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;
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;#IFNDEF BLD_SYS
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;SYS .EQU SYS_CPM
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;#ELSE
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;SYS .EQU BLD_SYS
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;#ENDIF
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;
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;#IF (SYS == SYS_CPM)
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;DOS .EQU DOS_BDOS
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;CP .EQU CP_CCP
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;#DEFINE OSLBL "CP/M-80 2.2"
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;#ENDIF
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;
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;#IF (SYS == SYS_ZSYS)
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;DOS .EQU DOS_ZSDOS
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;CP .EQU CP_ZCPR
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;#DEFINE OSLBL "ZSDOS 1.1"
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;#ENDIF
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;
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; INCLUDE VERSION AND BUILD SETTINGS
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;
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;#INCLUDE "ver.inc" ; ADD BIOSVER
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;
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;#INCLUDE "build.inc" ; INCLUDE USER CONFIG, ADD VARIANT, TIMESTAMP, & ROMSIZE
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;
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#IF (PLATFORM != PLT_N8)
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;
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; N8VEM HARDWARE IO PORT ADDRESSES AND MEMORY LOCATIONS
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;
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MPCL_RAM .EQU 78H ; BASE IO ADDRESS OF RAM MEMORY PAGER CONFIGURATION LATCH
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MPCL_ROM .EQU 7CH ; BASE IO ADDRESS OF ROM MEMORY PAGER CONFIGURATION LATCH
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RTC .EQU 70H ; ADDRESS OF RTC LATCH AND INPUT PORT
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;__HARDWARE_INTERFACES________________________________________________________________________________________________________________
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;
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; PPI 82C55 I/O IS DECODED TO PORT 60-67
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;
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PPIBASE .EQU 60H
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PPIA .EQU PPIBASE + 0 ; PORT A
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PPIB .EQU PPIBASE + 1 ; PORT B
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PPIC .EQU PPIBASE + 2 ; PORT C
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PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT
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;
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; 16C550 SERIAL LINE UART
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;
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SIO_BASE .EQU 68H
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SIO_RBR .EQU SIO_BASE + 0 ; DLAB=0: RCVR BUFFER REG (READ ONLY)
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SIO_THR .EQU SIO_BASE + 0 ; DLAB=0: XMIT HOLDING REG (WRITE ONLY)
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SIO_IER .EQU SIO_BASE + 1 ; DLAB=0: INT ENABLE REG
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SIO_IIR .EQU SIO_BASE + 2 ; INT IDENT REGISTER (READ ONLY)
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SIO_FCR .EQU SIO_BASE + 2 ; FIFO CONTROL REG (WRITE ONLY)
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SIO_LCR .EQU SIO_BASE + 3 ; LINE CONTROL REG
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SIO_MCR .EQU SIO_BASE + 4 ; MODEM CONTROL REG
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SIO_LSR .EQU SIO_BASE + 5 ; LINE STATUS REG
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SIO_MSR .EQU SIO_BASE + 6 ; MODEM STATUS REG
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SIO_SCR .EQU SIO_BASE + 7 ; SCRATCH REGISTER
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SIO_DLL .EQU SIO_BASE + 0 ; DLAB=1: DIVISOR LATCH (LS)
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SIO_DLM .EQU SIO_BASE + 1 ; DLAB=1: DIVISOR LATCH (MS)
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;
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#ENDIF ; (PLATFORM != PLT_N8)
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;
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;;;;;;;;;;;;;;;;;;;;;;;
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; eof - std-n8vem.inc ;
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;;;;;;;;;;;;;;;;;;;;;;;
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