mirror of
https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 22:43:15 -06:00
71 lines
1.5 KiB
NASM
71 lines
1.5 KiB
NASM
;
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;=======================================================================
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; HDIAG ACIA Driver
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;=======================================================================
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;
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acia_cmd .equ $80
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acia_dat .equ $81
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;
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;
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;
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acia_jptbl:
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jp acia_cinit ; Initialize serial port
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jp acia_cin ; Read byte
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jp acia_cout ; Write byte
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jp acia_cist ; Input status
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jp acia_cost ; Output Status
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;
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;
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;
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acia_cinit:
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; Detect ACIA
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ld a,$03 ; master reset
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out (acia_cmd),a ; apply it
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in a,(acia_cmd) ; get status
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or a ; check for zero (expected)
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ret nz ; abort if not
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ld a,$02 ; clear master reset
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out (acia_cmd),a ; apply it
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in a,(acia_cmd) ; get status again
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and %00001110 ; isolate reliable bits
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cp %00000010 ; check for expected value
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ret nz ; abort if not
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; Initialize ACIA
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ld a,%00010110 ; default config
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out (acia_cmd),a ; apply it
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xor a ; signal success
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ret
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;
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;
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;
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acia_cin:
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call acia_cist ; check for char ready
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jr z,acia_cin ; if not, loop
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in a,(acia_dat) ; read byte
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ret ; done
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;
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;
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;
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acia_cout:
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push af ; save incoming
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acia_cout1:
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call acia_cost ; ready for char?
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jr z,acia_cout1 ; loop if not
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pop af ; restore incoming
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out (acia_dat),a ; write byte
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ret ; and done
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;
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;
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;
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acia_cist:
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in a,(acia_cmd) ; get status
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and $01 ; isolate rx ready
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ret ; done
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;
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;
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;
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acia_cost:
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in a,(acia_cmd) ; get status
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and $02 ; isolate tx empty
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ret ; done
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