mirror of
https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 14:11:48 -06:00
8510158aa0
Use a global flag to indicate if interrupts have been enabled during the boot process. Drivers that operate in the pre-interrupt phase can use this to manage interrupt disable bracketing. This allows restoring the location of interrupt enable in the boot process to it's proper location.
511 lines
12 KiB
NASM
511 lines
12 KiB
NASM
;
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;==================================================================================================
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; CENTRONICS (LPT) INTERFACE DRIVER
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;==================================================================================================
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;
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; CENTRONICS-STYLE PARALLEL PRINTER DRIVER.
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;
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; IMPLEMENTED AS A ROMWBW CHARACTER DEVICE. CURRENTLY HANDLES OUPUT
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; ONLY.
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;
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;==================================================================================================
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;
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; IBM PC STANDARD PARALLEL PORT (SPP):
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; - NHYODYNE PRINT MODULE
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;
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; PORT 0 (OUTPUT):
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;
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; D7 D6 D5 D4 D3 D2 D1 D0
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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; | PD7 | PD6 | PD5 | PD4 | PD3 | PD2 | PD1 | PD0 |
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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;
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; PORT 1 (INPUT):
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;
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; D7 D6 D5 D4 D3 D2 D1 D0
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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; | /BUSY | /ACK | POUT | SEL | /ERR | 0 | 0 | 0 |
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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;
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; PORT 2 (OUTPUT):
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;
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; D7 D6 D5 D4 D3 D2 D1 D0
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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; | STAT1 | STAT0 | ENBL | PINT | SEL | RES | LF | STB |
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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;
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;==================================================================================================
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;
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; MG014 STYLE INTERFACE:
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; - RCBUS MG014 MODULE
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;
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; PORT 0 (OUTPUT):
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;
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; D7 D6 D5 D4 D3 D2 D1 D0
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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; | PD7 | PD6 | PD5 | PD4 | PD3 | PD2 | PD1 | PD0 |
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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;
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; PORT 1 (INPUT):
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;
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; D7 D6 D5 D4 D3 D2 D1 D0
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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; | | | | /ERR | SEL | POUT | BUSY | /ACK |
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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;
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; PORT 2 (OUTPUT):
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;
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; D7 D6 D5 D4 D3 D2 D1 D0
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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; | LED | | | | /SEL | /RES | /LF | /STB |
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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;
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;==================================================================================================
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;
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; S100 STYLE INTERFACE:
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; - S100 FPGA Z80
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;
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; BASE I/O PORT (OUTPUT):
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;
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; D7 D6 D5 D4 D3 D2 D1 D0
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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; | PD7 | PD6 | PD5 | PD4 | PD3 | PD2 | PD1 | PD0 |
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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;
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; STATUS PORT (INPUT, BASE I/O - 1):
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;
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; D7 D6 D5 D4 D3 D2 D1 D0
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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; | | | | | | | BUSY | /ACK |
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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;
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; CONTROL PORT (OUTPUT, BASE I/O - 1):
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;
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; D7 D6 D5 D4 D3 D2 D1 D0
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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; | | | | | | | | /STB |
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; +-------+-------+-------+-------+-------+-------+-------+-------+
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;
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;==================================================================================================
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;
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LPT_INIT:
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LD B,LPT_CFGCNT ; LOOP CONTROL
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XOR A ; ZERO TO ACCUM
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LD (LPT_DEV),A ; CURRENT DEVICE NUMBER
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LD IY,LPT_CFG ; POINT TO START OF CFG TABLE
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LPT_INIT0:
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PUSH BC ; SAVE LOOP CONTROL
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CALL LPT_PRTCFG ; PRINT CONFIG
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CALL LPT_INITUNIT ; HAND OFF TO UNIT INIT CODE
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POP BC ; RESTORE LOOP CONTROL
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;
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JR Z,LPT_INIT1 ; IF DETECTED, CONTINUE INIT
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CALL PC_SPACE ; FORMATTING
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LD DE,LPT_STR_NOLPT ; NO LPT MESSAGE
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CALL WRITESTR ; DISPLAY IT
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JR LPT_INIT2 ; AND LOOP AS NEEDED
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;
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LPT_INIT1:
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LD A,(IY+1) ; GET THE LPT TYPE
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OR A ; SET FLAGS
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JR Z,LPT_INIT2 ; SKIP IT IF NOTHING FOUND
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;
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PUSH BC ; SAVE LOOP CONTROL
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PUSH IY ; CFG ENTRY ADDRESS
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POP DE ; ... TO DE
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LD BC,LPT_FNTBL ; BC := FUNCTION TABLE ADDRESS
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CALL NZ,CIO_ADDENT ; ADD ENTRY IF LPT FOUND, BC:DE
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POP BC ; RESTORE LOOP CONTROL
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;
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LPT_INIT2:
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LD DE,LPT_CFGSIZ ; SIZE OF CFG ENTRY
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ADD IY,DE ; BUMP IY TO NEXT ENTRY
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DJNZ LPT_INIT0 ; LOOP UNTIL DONE
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;
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LPT_INIT3:
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XOR A ; SIGNAL SUCCESS
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RET ; AND RETURN
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;
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; LPT INITIALIZATION ROUTINE
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;
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LPT_INITUNIT:
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CALL LPT_DETECT ; DETERMINE LPT TYPE
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RET NZ ; ABORT IF NOTHING THERE
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;
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; UPDATE WORKING LPT DEVICE NUM
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LD HL,LPT_DEV ; POINT TO CURRENT DEVICE NUM
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LD A,(HL) ; PUT IN ACCUM
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INC (HL) ; INCREMENT IT (FOR NEXT LOOP)
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LD (IY),A ; UPDATE UNIT NUM
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;
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; SET DEFAULT CONFIG
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LD DE,-1 ; LEAVE CONFIG ALONE
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JP LPT_INITDEV ; IMPLEMENT IT AND RETURN
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;
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; DRIVER FUNCTION TABLE
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;
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LPT_FNTBL:
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.DW LPT_IN
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.DW LPT_OUT
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.DW LPT_IST
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.DW LPT_OST
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.DW LPT_INITDEV
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.DW LPT_QUERY
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.DW LPT_DEVICE
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#IF (($ - LPT_FNTBL) != (CIO_FNCNT * 2))
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.ECHO "*** INVALID LPT FUNCTION TABLE ***\n"
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!!! ; FORCE AN ASSEMBLY ERROR
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#ENDIF
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;
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; BYTE INTPUT
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;
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LPT_IN:
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; INPUT NOT SUPPORTED - RETURN NULL BYTE
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LD E,0 ; NULL BYTE
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XOR A ; SIGNAL SUCCESS
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RET
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;
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; BYTE OUTPUT
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;
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LPT_OUT:
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CALL LPT_OST ; READY TO SEND?
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JR Z,LPT_OUT ; LOOP IF NOT
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LD C,(IY+3) ; PORT 0 (DATA)
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EZ80_IO
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OUT (C),E ; OUTPUT DATA TO PORT
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#IF (LPTMODE == LPTMODE_SPP)
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LD A,%00001101 ; SELECT & STROBE, LEDS OFF
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#ENDIF
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#IF (LPTMODE == LPTMODE_MG014)
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LD A,%00000100 ; SELECT & STROBE, LED OFF
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#ENDIF
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#IF (LPTMODE == LPTMODE_S100)
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LD A,%00000000 ; STROBE
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#ENDIF
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#IF ((LPTMODE == LPTMODE_SPP) | (LPTMODE == LPTMODE_MG014))
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INC C ; PUT CONTROL PORT IN C
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INC C
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#ENDIF
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#IF (LPTMODE == LPTMODE_S100)
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DEC C ; PUT CONTROL PORT IN C
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#ENDIF
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EZ80_IO
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OUT (C),A ; OUTPUT DATA TO PORT
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CALL DELAY
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#IF (LPTMODE == LPTMODE_SPP)
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LD A,%00001100 ; SELECT, LEDS OFF
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#ENDIF
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#IF (LPTMODE == LPTMODE_MG014)
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LD A,%00000101 ; SELECT, LED OFF
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#ENDIF
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#IF (LPTMODE == LPTMODE_S100)
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LD A,%11111111 ; STROBE
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#ENDIF
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EZ80_IO
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OUT (C),A ; OUTPUT DATA TO PORT
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CALL DELAY
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XOR A ; SIGNAL SUCCESS
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RET
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;
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; INPUT STATUS
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;
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LPT_IST:
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; INPUT NOT SUPPORTED - RETURN NOT READY
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XOR A ; ZERO BYTES AVAILABLE
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RET ; DONE
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;
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; OUTPUT STATUS
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;
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LPT_OST:
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LD C,(IY+3) ; BASE PORT
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#IF ((LPTMODE == LPTMODE_SPP) | (LPTMODE == LPTMODE_MG014))
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INC C ; SELECT STATUS PORT
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#ENDIF
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#IF (LPTMODE == LPTMODE_S100)
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DEC C ; SELECT STATUS PORT
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#ENDIF
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EZ80_IO
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IN A,(C) ; GET STATUS INFO
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#IF (LPTMODE == LPTMODE_SPP)
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AND %10000000 ; ISOLATE /BUSY
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#ENDIF
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#IF (LPTMODE == LPTMODE_MG014)
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AND %00000010 ; ISOLATE BUSY
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XOR %00000010 ; INVERT TO READY
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#ENDIF
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RET ; DONE
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;
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; INITIALIZE DEVICE
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;
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LPT_INITDEV:
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; INTERRUPTS DISABLED DURING INIT
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; ??? IS THIS NEEDED?
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HB_DI ; AVOID CONFLICTS
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CALL LPT_INITDEV0 ; DO THE REAL WORK
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HB_EI ; INTS BACK ON
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RET ; DONE
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;
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; THIS ENTRY POINT BYPASSES DISABLING/ENABLING INTS WHICH IS REQUIRED BY
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; PREINIT ABOVE. PREINIT IS NOT ALLOWED TO ENABLE INTS!
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;
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LPT_INITDEV0:
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;
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#IF (LPTMODE == LPTMODE_SPP)
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;
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LD C,(IY+3) ; PORT 0 (DATA)
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XOR A ; CLEAR ACCUM
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EZ80_IO
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OUT (C),A ; SEND IT
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INC C ; BUMP TO
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INC C ; ... PORT 2
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LD A,%00001000 ; SELECT AND ASSERT RESET, LEDS OFF
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EZ80_IO
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OUT (C),A ; SEND IT
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CALL LDELAY ; HALF SECOND DELAY
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LD A,%00001100 ; SELECT AND DEASSERT RESET, LEDS OFF
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EZ80_IO
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OUT (C),A ; SEND IT
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XOR A ; SIGNAL SUCCESS
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RET ; RETURN
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;
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#ENDIF
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;
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#IF (LPTMODE == LPTMODE_MG014)
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LD A,(IY+3) ; BASE PORT
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ADD A,3 ; BUMP TO CONTROL PORT
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LD C,A ; MOVE TO C FOR I/O
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LD A,$82 ; CONFIG A OUT, B IN, C OUT
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EZ80_IO
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OUT (C),A ; DO IT
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DEC C ; OUTPUT PORT
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LD A,$81 ; STROBE OFF, SELECT ON, RES ON, LED ON
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EZ80_IO
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OUT (C),A ; SEND IT
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CALL LDELAY ; HALF SECOND DELAY
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LD A,$05 ; STROBE OFF, SELECT ON, RES OFF, LED OFF
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EZ80_IO
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OUT (C),A ; SEND IT
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XOR A ; SIGNAL SUCCESS
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RET ; RETURN
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#ENDIF
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;
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#IF (LPTMODE == LPTMODE_S100)
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LD C,(IY+3) ; BASE PORT
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DEC C ; DEC TO CONTROL PORT
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LD A,$FF ; INIT VALUE
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EZ80_IO
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OUT (C),A ; DO IT
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RET ; RETURN
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#ENDIF
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;
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;
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;
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LPT_QUERY:
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LD E,(IY+4) ; FIRST CONFIG BYTE TO E
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LD D,(IY+5) ; SECOND CONFIG BYTE TO D
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XOR A ; SIGNAL SUCCESS
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RET ; DONE
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;
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;
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;
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LPT_DEVICE:
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LD D,CIODEV_LPT ; D := DEVICE TYPE
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LD E,(IY) ; E := PHYSICAL UNIT
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LD C,$40 ; C := DEVICE TYPE, 0x40 IS PIO
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LD H,(IY+1) ; H := MODE
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LD L,(IY+3) ; L := BASE I/O ADDRESS
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XOR A ; SIGNAL SUCCESS
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RET
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;
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; LPT DETECTION ROUTINE
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;
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#IF (LPTMODE == LPTMODE_NONE)
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;
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LPT_DETECT:
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LD A,LPTMODE_NONE ; NOTHING TO DETECT
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RET
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;
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#ENDIF
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;
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#IF (LPTMODE == LPTMODE_SPP)
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;
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LPT_DETECT:
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LD C,(IY+3) ; BASE PORT ADDRESS
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JR LPT_DETECT2 ; CHECK IT
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;
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LPT_DETECT2:
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; LOOK FOR LPT AT BASE PORT ADDRESS IN C
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INC C ; PORT C FOR I/O
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INC C ; ...
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XOR A ; DEFAULT VALUE (TRI-STATE OFF)
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EZ80_IO
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OUT (C),A ; SEND IT
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;
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;IN A,(C) ; READ IT
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;AND %11000000 ; ISOLATE STATUS BITS
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;CP %00000000 ; CORRECT VALUE?
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;RET NZ ; IF NOT, RETURN
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;LD A,%11000000 ; STATUS BITS ON (LEDS OFF)
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;OUT (C),A ; SEND IT
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;IN A,(C) ; READ IT
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;AND %11000000 ; ISOLATE STATUS BITS
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;CP %11000000 ; CORRECT VALUE?
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;
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DEC C ; BACK TO BASE PORT
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DEC C ; ...
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LD A,$A5 ; TEST VALUE
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EZ80_IO
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OUT (C),A ; SEND IT
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EZ80_IO
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IN A,(C) ; READ IT BACK
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CP $A5 ; CORRECT?
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RET ; RETURN (ZF SET CORRECTLY)
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;
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#ENDIF
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;
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#IF (LPTMODE == LPTMODE_MG014)
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LPT_DETECT:
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;
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; TEST FOR PPI EXISTENCE
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; WE SETUP THE PPI TO WRITE, THEN WRITE A VALUE OF $A5
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; TO PORT A (DATALO), THEN READ IT BACK. IF THE PPI IS THERE
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; THEN THE BUS HOLD CIRCUITRY WILL READ BACK THE $A5. SINCE
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; WE ARE IN WRITE MODE, AN IDE CONTROLLER WILL NOT BE ABLE TO
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; INTERFERE WITH THE VALUE BEING READ.
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;
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LD A,(IY+3) ; BASE IO ADDRESS
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ADD A,3 ; BUMP TO CONTROL PORT
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LD C,A ; PUT IN C
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LD A,$80 ; SET PORT A TO WRITE
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EZ80_IO
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OUT (C),A ; WRITE IT
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;
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LD C,(IY+3) ; PPI PORT A
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LD A,$A5 ; TEST VALUE
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EZ80_IO
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OUT (C),A ; PUSH VALUE TO PORT
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EZ80_IO
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IN A,(C) ; GET PORT VALUE
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#IF (LPTTRACE >= 3)
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CALL PC_SPACE
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CALL PRTHEXBYTE
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#ENDIF
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CP $A5 ; CHECK FOR TEST VALUE
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RET ; ZF SET IF DETECTED
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#ENDIF
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;
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#IF (LPTMODE == LPTMODE_S100)
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LPT_DETECT:
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; PORT ALWAYS EXISTS ON FPGA
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XOR A ; SIGNAL SUCCESS
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RET ; DONE
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#ENDIF
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;
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;
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;
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LPT_PRTCFG:
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; ANNOUNCE PORT
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CALL NEWLINE ; FORMATTING
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PRTS("LPT$") ; FORMATTING
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LD A,(IY+2) ; DEVICE NUM
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CALL PRTDECB ; PRINT DEVICE NUM
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PRTS(": IO=0x$") ; FORMATTING
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LD A,(IY+3) ; GET BASE PORT
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CALL PRTHEXBYTE ; PRINT BASE PORT
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; PRINT THE LPT TYPE
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PRTS(" MODE=$") ; FORMATTING
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LD A,(IY+1) ; GET LPT TYPE BYTE
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RLCA ; MAKE IT A WORD OFFSET
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LD HL,LPT_TYPE_MAP ; POINT HL TO TYPE MAP TABLE
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CALL ADDHLA ; HL := ENTRY
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LD E,(HL) ; DEREFERENCE
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INC HL ; ...
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LD D,(HL) ; ... TO GET STRING POINTER
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CALL WRITESTR ; PRINT IT
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;
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; ALL DONE IF NO LPT WAS DETECTED
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LD A,(IY+1) ; GET LPT TYPE BYTE
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OR A ; SET FLAGS
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RET Z ; IF ZERO, NOT PRESENT
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;
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; *** ADD MORE DEVICE INFO??? ***
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;
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XOR A
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RET
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;
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;
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;
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LPT_TYPE_MAP:
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.DW LPT_STR_NONE
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.DW LPT_STR_SPP
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.DW LPT_STR_MG014
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.DW LPT_STR_S100
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;
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LPT_STR_NONE .DB "???$"
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LPT_STR_SPP .DB "SPP$"
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LPT_STR_MG014 .DB "MG014$"
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LPT_STR_S100 .DB "S100$"
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;
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LPT_STR_NOLPT .DB "NOT PRESENT$"
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;
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; WORKING VARIABLES
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;
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LPT_DEV .DB 0 ; DEVICE NUM USED DURING INIT
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;
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; LPT DEVICE CONFIGURATION TABLE
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;
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LPT_CFG:
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;
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LPT0_CFG:
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; LPT MODULE A CONFIG
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.DB 0 ; DEVICE NUMBER (SET DURING INIT)
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.DB LPTMODE ; LPT MODE
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.DB 0 ; MODULE ID
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.DB LPT0BASE ; BASE PORT
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.DW 0 ; LINE CONFIGURATION
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;
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DEVECHO "LPT: MODE="
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#IF (LPTMODE == LPTMODE_SPP)
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DEVECHO "SPP"
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#ENDIF
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#IF (LPTMODE == LPTMODE_MG014)
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DEVECHO "MG014"
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#ENDIF
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#IF (LPTMODE == LPTMODE_S100)
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DEVECHO "S100"
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#ENDIF
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DEVECHO ", IO="
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DEVECHO LPT0BASE
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DEVECHO "\n"
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;
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LPT_CFGSIZ .EQU $ - LPT_CFG ; SIZE OF ONE CFG TABLE ENTRY
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;
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#IF (LPTCNT >= 2)
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;
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LPT1_CFG:
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; LPT MODULE B CONFIG
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.DB 0 ; DEVICE NUMBER (SET DURING INIT)
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.DB LPTMODE ; LPT MODE
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.DB 1 ; MODULE ID
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.DB LPT1BASE ; BASE PORT
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.DW 0 ; LINE CONFIGURATION
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;
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DEVECHO "LPT: MODE="
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#IF (LPTMODE == LPTMODE_SPP)
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DEVECHO "SPP"
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#ENDIF
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#IF (LPTMODE == LPTMODE_MG014)
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DEVECHO "MG014"
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#ENDIF
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#IF (LPTMODE == LPTMODE_S100)
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DEVECHO "S100"
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#ENDIF
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DEVECHO ", IO="
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DEVECHO LPT1BASE
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DEVECHO "\n"
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;
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#ENDIF
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;
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LPT_CFGCNT .EQU ($ - LPT_CFG) / LPT_CFGSIZ
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