mirror of
https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 14:11:48 -06:00
8510158aa0
Use a global flag to indicate if interrupts have been enabled during the boot process. Drivers that operate in the pre-interrupt phase can use this to manage interrupt disable bracketing. This allows restoring the location of interrupt enable in the boot process to it's proper location.
366 lines
9.0 KiB
NASM
366 lines
9.0 KiB
NASM
;
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;==================================================================================================
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; PIO DRIVER (PARALLEL PORT)
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;==================================================================================================
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;
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; SETUP PARAMETER WORD:
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; +-------+---+-------------------+ +---+---+-----------+---+-------+
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; | |RTS| ENCODED BAUD RATE | |DTR|XON| PARITY |STP| 8/7/6 |
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; +-------+---+---+---------------+ ----+---+-----------+---+-------+
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; F E D C B A 9 8 7 6 5 4 3 2 1 0
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; -- MSB (D REGISTER) -- -- LSB (E REGISTER) --
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;
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; THIS DRIVER IS JUST A STUB TO DETECT AND INITIALIZE PIO HARDWARE
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; IF IT EXISTS. FOR NOW, IT DOES NOT REGISTER ANY OF THE PIO CHANNELS
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; AS CHARACTER DEVICE UNITS.
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;
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PIO_NONE .EQU 0
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PIO_PIO .EQU 1
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;
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PIO0A_CTL .EQU PIO0BASE + $02
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PIO0A_DAT .EQU PIO0BASE + $00
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PIO0B_CTL .EQU PIO0BASE + $03
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PIO0B_DAT .EQU PIO0BASE + $01
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;
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#IF (PIOCNT >= 2)
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;
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PIO1A_CTL .EQU PIO1BASE + $02
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PIO1A_DAT .EQU PIO1BASE + $00
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PIO1B_CTL .EQU PIO1BASE + $03
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PIO1B_DAT .EQU PIO1BASE + $01
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;
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#ENDIF
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;
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PIO_PREINIT:
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;
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; SETUP THE DISPATCH TABLE ENTRIES
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; NOTE: INTS WILL BE DISABLED WHEN PREINIT IS CALLED AND THEY MUST REMAIN
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; DISABLED.
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;
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CALL PIO_PROBE ; PROBE FOR CHIPS
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;
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LD B,PIO_CFGCNT ; LOOP CONTROL
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XOR A ; ZERO TO ACCUM
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LD (PIO_DEV),A ; CURRENT DEVICE NUMBER
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LD IY,PIO_CFG ; POINT TO START OF CFG TABLE
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PIO_PREINIT0:
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PUSH BC ; SAVE LOOP CONTROL
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CALL PIO_INITUNIT ; HAND OFF TO GENERIC INIT CODE
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POP BC ; RESTORE LOOP CONTROL
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;
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LD A,(IY+1) ; GET THE PIO TYPE DETECTED
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OR A ; SET FLAGS
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JR Z,PIO_PREINIT2 ; SKIP IT IF NOTHING FOUND
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;
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PUSH BC ; SAVE LOOP CONTROL
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PUSH IY ; CFG ENTRY ADDRESS
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POP DE ; ... TO DE
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LD BC,PIO_FNTBL ; BC := FUNCTION TABLE ADDRESS
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; REGISTRATION OF CHARACTER UNIT IN HBIOS IS BYPASSED
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; FOR NOW. NOT SURE WHAT TO DO WITH THIS HARDWARE YET.
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;CALL NZ,CIO_ADDENT ; ADD ENTRY IF PIO FOUND, BC:DE
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POP BC ; RESTORE LOOP CONTROL
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;
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PIO_PREINIT2:
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LD DE,PIO_CFGSIZ ; SIZE OF CFG ENTRY
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ADD IY,DE ; BUMP IY TO NEXT ENTRY
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DJNZ PIO_PREINIT0 ; LOOP UNTIL DONE
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;
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XOR A ; SIGNAL SUCCESS
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RET ; AND RETURN
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;
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; PIO INITIALIZATION ROUTINE
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;
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PIO_INITUNIT:
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CALL PIO_DETECT ; DETERMINE PIO TYPE
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LD (IY+1),A ; SAVE IN CONFIG TABLE
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OR A ; SET FLAGS
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RET Z ; ABORT IF NOTHING THERE
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;
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; UPDATE WORKING PIO DEVICE NUM
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LD HL,PIO_DEV ; POINT TO CURRENT UART DEVICE NUM
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LD A,(HL) ; PUT IN ACCUM
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INC (HL) ; INCREMENT IT (FOR NEXT LOOP)
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LD (IY),A ; UPDATE UNIT NUM
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;
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; SET DEFAULT CONFIG
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LD DE,-1 ; LEAVE CONFIG ALONE
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JP PIO_INITDEV ; IMPLEMENT IT AND RETURN
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;
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;
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;
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PIO_INIT:
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LD B,PIO_CFGCNT ; COUNT OF POSSIBLE PIO UNITS
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LD IY,PIO_CFG ; POINT TO START OF CFG TABLE
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PIO_INIT1:
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PUSH BC ; SAVE LOOP CONTROL
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LD A,(IY+1) ; GET PIO TYPE
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OR A ; SET FLAGS
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CALL NZ,PIO_PRTCFG ; PRINT IF NOT ZERO
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POP BC ; RESTORE LOOP CONTROL
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LD DE,PIO_CFGSIZ ; SIZE OF CFG ENTRY
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ADD IY,DE ; BUMP IY TO NEXT ENTRY
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DJNZ PIO_INIT1 ; LOOP TILL DONE
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;
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XOR A ; SIGNAL SUCCESS
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RET ; DONE
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;
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; DRIVER FUNCTION TABLE
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;
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PIO_FNTBL:
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.DW PIO_IN
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.DW PIO_OUT
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.DW PIO_IST
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.DW PIO_OST
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.DW PIO_INITDEV
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.DW PIO_QUERY
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.DW PIO_DEVICE
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#IF (($ - PIO_FNTBL) != (CIO_FNCNT * 2))
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.ECHO "*** INVALID PIO FUNCTION TABLE ***\n"
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#ENDIF
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;
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;
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;
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PIO_IN:
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LD E,0 ; DUMMY VALUE
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XOR A ; SIGNAL SUCCESS
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RET
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;
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;
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;
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PIO_OUT:
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XOR A ; SIGNAL SUCCESS
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RET
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;
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;
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;
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PIO_IST:
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XOR A ; NO CHARS WAITING
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RET
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;
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;
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;
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PIO_OST:
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XOR A ; NO BUFFER SPACE AVAIL
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RET
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;
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PIO_INITDEV:
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; INITDEV CAN BE CALLED PRIOR TO INTERRUPTS BEING ENABLED. WE
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; NEED TO LEAVE INTERRUPTS ALONE IN THIS SCENARIO
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LD A,(INTSENAB) ; INTS ENABLED?
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OR A ; TEST VALUE
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JR Z,PIO_INITDEV0 ; BYPASS DI/EI IF NOT ENABLED
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;
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; INTERRUPTS DISABLED DURING INIT
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; ??? IS THIS NEEDED?
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HB_DI ; DISABLE INTS
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CALL PIO_INITDEV0 ; DO THE WORK
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HB_EI ; INTS BACK ON
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RET ; DONE
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;
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PIO_INITDEV0:
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;
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; THIS ENTRY POINT BYPASSES DISABLING/ENABLING INTS WHICH IS REQUIRED BY
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; PREINIT ABOVE. PREINIT IS NOT ALLOWED TO ENABLE INTS!
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;
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LD C,(IY+3) ; CONTROL PORT
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LD A,%00010111 ; CLEAR INTERRUPT CTL WORD
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OUT (C),A
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LD A,%11111111 ; CLEAR MASK
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OUT (C),A
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LD A,%00000000 ; CLEAR INTERRUPT VECTOR
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OUT (C),A
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LD A,%01001111 ; SET MODE 1 (INPUT)
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OUT (C),A
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RET
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;
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;
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;
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PIO_QUERY:
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LD E,(IY+5) ; FIRST CONFIG BYTE TO E
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LD D,(IY+6) ; SECOND CONFIG BYTE TO D
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XOR A ; SIGNAL SUCCESS
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RET ; DONE
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;
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;
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;
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PIO_DEVICE:
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LD D,CIODEV_PIO ; D := DEVICE TYPE
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LD E,(IY) ; E := PHYSICAL UNIT
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LD C,$40 ; C := DEVICE TYPE, 0x40 IS PIO
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LD H,(IY+1) ; H := MODE
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LD L,(IY+3) ; L := BASE I/O ADDRESS
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XOR A ; SIGNAL SUCCESS
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RET
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;
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; PIO CHIP PROBE
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; CHECK FOR PRESENCE OF PIO CHIPS AND POPULATE THE
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; PIO_MAP BITMAP (ONE BIT PER CHIP). THIS DETECTS
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; CHIPS, NOT CHANNELS. EACH CHIP HAS 2 CHANNELS.
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; MAX OF TWO CHIPS CURRENTLY. INT VEC VALUE IS TRASHED!
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;
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PIO_PROBE:
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; CLEAR THE PRESENCE BITMAP
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LD HL,PIO_MAP ; HL POINTS TO BITMAP
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XOR A ; ZERO
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LD (PIO_MAP),A ; CLEAR CHIP PRESENT BITMAP
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;
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; FIRST POSSIBLE CHIP
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LD C,PIO0A_CTL ; FIRST CHIP CMD/STAT PORT
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CALL PIO_PROBECHIP ; PROBE IT
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JR NZ,PIO_PROBE1 ; IF NOT ZERO, NOT FOUND
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SET 0,(HL) ; SET BIT FOR FIRST CARD
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PIO_PROBE1:
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;
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#IF (PIOCNT >= 2)
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LD C,PIO1A_CTL ; SECOND CHIP CMD/STAT PORT
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CALL PIO_PROBECHIP ; PROBE IT
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JR NZ,PIO_PROBE2 ; IF NOT ZERO, NOT FOUND
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SET 1,(HL) ; SET BIT FOR SECOND CARD
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PIO_PROBE2:
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#ENDIF
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;
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RET
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;
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PIO_PROBECHIP:
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; PIO IS HARD TO DETECT DEFINITIVELY. BEST I CAN THINK
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; OF IS TO CHECK THE VALUE READ FROM THE CONTROL PORT.
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; IT APPEARS TO BE ZERO CONSISTENTLY IF CHIP EXISTS.
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IN A,(C) ; GET VALUE
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OR A ; COMPARE TO ZERO
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RET
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;
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; PIO DETECTION ROUTINE
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; THERE IS ONLY ONE VARIATION OF PIO CHIP, SO HERE WE JUST CHECK THE
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; CHIP PRESENCE BITMAP TO SET THE CHIP TYPE OF EITHER NONE OR PIO.
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;
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PIO_DETECT:
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LD B,(IY+2) ; GET CHIP/CHANNEL
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SRL B ; SHIFT AWAY THE CHANNEL BIT
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INC B ; NUMBER OF TIMES TO ROTATE BITS
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LD A,(PIO_MAP) ; BIT MAP IN A
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PIO_DETECT1:
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; ROTATE DESIRED CHIP BIT INTO CF
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RRA ; ROTATE NEXT BIT INTO CF
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DJNZ PIO_DETECT1 ; DO THIS UNTIL WE HAVE DESIRED BIT
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; RETURN CHIP TYPE
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LD A,PIO_NONE ; ASSUME NOTHING HERE
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RET NC ; IF CF NOT SET, RETURN
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LD A,PIO_PIO ; CHIP TYPE IS PIO
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RET ; DONE
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;
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;
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;
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PIO_PRTCFG:
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; ANNOUNCE PORT
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CALL NEWLINE ; FORMATTING
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PRTS("PIO$") ; FORMATTING
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LD A,(IY) ; DEVICE NUM
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CALL PRTDECB ; PRINT DEVICE NUM
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PRTS(": IO=0x$") ; FORMATTING
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LD A,(IY+3) ; GET BASE PORT
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CALL PRTHEXBYTE ; PRINT BASE PORT
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; PRINT THE PIO TYPE
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CALL PC_SPACE ; FORMATTING
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LD A,(IY+1) ; GET PIO TYPE BYTE
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RLCA ; MAKE IT A WORD OFFSET
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LD HL,PIO_TYPE_MAP ; POINT HL TO TYPE MAP TABLE
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CALL ADDHLA ; HL := ENTRY
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LD E,(HL) ; DEREFERENCE
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INC HL ; ...
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LD D,(HL) ; ... TO GET STRING POINTER
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CALL WRITESTR ; PRINT IT
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;
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XOR A
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RET
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;
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;
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;
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PIO_TYPE_MAP:
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.DW PIO_STR_NONE
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.DW PIO_STR_PIO
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PIO_STR_NONE .DB "<NOT PRESENT>$"
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PIO_STR_PIO .DB "PIO$"
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;
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; WORKING VARIABLES
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;
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PIO_DEV .DB 0 ; DEVICE NUM USED DURING INIT
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PIO_MAP .DB 0 ; CHIP PRESENCE BITMAP
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;
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PIO0A_RCVBUF .EQU 0
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PIO0B_RCVBUF .EQU 0
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;
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#IF (PIOCNT >= 2)
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PIO1A_RCVBUF .EQU 0
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PIO1B_RCVBUF .EQU 0
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#ENDIF
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;
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; PIO PORT TABLE
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;
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PIO_CFG:
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; PIO0 CHANNEL A
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PIO0A_CFG:
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.DB 0 ; DEVICE NUMBER (SET DURING INIT)
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.DB 0 ; PIO TYPE (SET DURING INIT)
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.DB $00 ; CHIP 0 / CHANNEL A (LOW BIT IS CHANNEL)
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.DB PIO0A_CTL ; CMD/STATUS PORT
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.DB PIO0A_DAT ; DATA PORT
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.DW DEFSERCFG ; LINE CONFIGURATION
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.DW PIO0A_RCVBUF ; POINTER TO RCV BUFFER STRUCT
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;
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DEVECHO "PIO: IO="
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DEVECHO PIO0BASE
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DEVECHO ", CHANNEL A\n"
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;
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PIO_CFGSIZ .EQU $ - PIO_CFG ; SIZE OF ONE CFG TABLE ENTRY
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;
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; PIO0 CHANNEL B
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PIO0B_CFG:
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.DB 0 ; DEVICE NUMBER (SET DURING INIT)
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.DB 0 ; PIO TYPE (SET DURING INIT)
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.DB $01 ; CHIP 0 / CHANNEL B (LOW BIT IS CHANNEL)
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.DB PIO0B_CTL ; CMD/STATUS PORT
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.DB PIO0B_DAT ; DATA PORT
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.DW DEFSERCFG ; LINE CONFIGURATION
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.DW PIO0B_RCVBUF ; POINTER TO RCV BUFFER STRUCT
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;
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DEVECHO "PIO: IO="
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DEVECHO PIO0BASE
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DEVECHO ", CHANNEL B\n"
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;
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#IF (PIOCNT >= 2)
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;
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; PIO1 CHANNEL A
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PIO1A_CFG:
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.DB 0 ; DEVICE NUMBER (SET DURING INIT)
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.DB 0 ; PIO TYPE (SET DURING INIT)
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.DB $02 ; CHIP 1 / CHANNEL A (LOW BIT IS CHANNEL)
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.DB PIO1A_CTL ; CMD/STATUS PORT
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.DB PIO1A_DAT ; DATA PORT
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.DW DEFSERCFG ; LINE CONFIGURATION
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.DW PIO1A_RCVBUF ; POINTER TO RCV BUFFER STRUCT
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;
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DEVECHO "PIO: IO="
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DEVECHO PIO1BASE
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DEVECHO ", CHANNEL A\n"
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;
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; PIO1 CHANNEL B
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PIO1B_CFG:
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.DB 0 ; DEVICE NUMBER (SET DURING INIT)
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.DB 0 ; PIO TYPE (SET DURING INIT)
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.DB $03 ; CHIP 1 / CHANNEL B (LOW BIT IS CHANNEL)
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.DB PIO1B_CTL ; CMD/STATUS PORT
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.DB PIO1B_DAT ; DATA PORT
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.DW DEFSERCFG ; LINE CONFIGURATION
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.DW PIO1B_RCVBUF ; POINTER TO RCV BUFFER STRUCT
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;
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DEVECHO "PIO: IO="
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DEVECHO PIO1BASE
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DEVECHO ", CHANNEL B\n"
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;
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#ENDIF
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;
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PIO_CFGCNT .EQU ($ - PIO_CFG) / PIO_CFGSIZ
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