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80 lines
1.9 KiB
80 lines
1.9 KiB
;
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;==================================================================================================
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; WRAPPER FOR ZAPPLE MONITOR FOR N8VEM PROJECT
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; WAYNE WARTHEN - 2012-11-26
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;==================================================================================================
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;
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; THE FOLLOWING MACROS DO THE HEAVY LIFTING TO MAKE THE ZAPPLE SOURCE
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; COMPATIBLE WITH TASM
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;
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#DEFINE EQU .EQU
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#DEFINE NAME \;
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#DEFINE PAGE .PAGE
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#DEFINE CSEG .CSEG
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#DEFINE DSEG .DSEG
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#DEFINE ORG .ORG
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#DEFINE END .END
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#DEFINE IF .IF
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#DEFINE ELSE .ELSE
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#DEFINE ENDIF .ENDIF
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#DEFINE DEFB .DB
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#DEFINE DB .DB
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#DEFINE DEFW .DW
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#DEFINE DW .DW
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#DEFINE . _
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#DEFINE TITLE .TITLE
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#DEFINE EXT \;
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#DEFINE NOT ~
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;
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#ADDINSTR IN A,* DB 2 NOP 1
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#ADDINSTR OUT *,A D3 2 NOP 1
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#ADDINSTR ADD A 87 1 NOP 1
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#ADDINSTR ADD D 82 1 NOP 1
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#ADDINSTR ADD * C6 2 NOP 1
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#ADDINSTR ADC A 8F 1 NOP 1
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#ADDINSTR ADC * CE 2 NOP 1
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#ADDINSTR SBC H 9C 1 NOP 1
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;
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;
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;
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COLOC .EQU 0
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LNLOC .EQU 0
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LULOC .EQU 0
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PTPL .EQU 0
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PULOC .EQU 0
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CSLOC .EQU 0
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CILOC .EQU 0
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RPTPL .EQU 0
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RULOC .EQU 0
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;
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; 16C550 SERIAL LINE UART
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;
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SIO_BASE .EQU 90H
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SIO_RBR .EQU SIO_BASE + 0 ; DLAB=0: RCVR BUFFER REG (READ ONLY)
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SIO_THR .EQU SIO_BASE + 0 ; DLAB=0: XMIT HOLDING REG (WRITE ONLY)
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SIO_IER .EQU SIO_BASE + 1 ; DLAB=0: INT ENABLE REG
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SIO_IIR .EQU SIO_BASE + 2 ; INT IDENT REGISTER (READ ONLY)
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SIO_FCR .EQU SIO_BASE + 2 ; FIFO CONTROL REG (WRITE ONLY)
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SIO_LCR .EQU SIO_BASE + 3 ; LINE CONTROL REG
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SIO_MCR .EQU SIO_BASE + 4 ; MODEM CONTROL REG
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SIO_LSR .EQU SIO_BASE + 5 ; LINE STATUS REG
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SIO_MSR .EQU SIO_BASE + 6 ; MODEM STATUS REG
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SIO_SCR .EQU SIO_BASE + 7 ; SCRATCH REGISTER
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SIO_DLL .EQU SIO_BASE + 0 ; DLAB=1: DIVISOR LATCH (LS)
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SIO_DLM .EQU SIO_BASE + 1 ; DLAB=1: DIVISOR LATCH (MS)
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;
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BAUDRATE .EQU 38400
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UART_DIV .EQU (1843200 / (16 * BAUDRATE))
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;
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;
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;
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BASE .EQU $6000
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;
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; NOW INCLUDE THE MAIN SOURCE
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;
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#INCLUDE "zapple.z80"
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;
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.FILL $7000 - $
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;
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.END
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