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305 lines
9.3 KiB
305 lines
9.3 KiB
;___CTC________________________________________________________________________________________________________________
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;
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; Z80 CTC
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;
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; DISPLAY CONFIGURATION DETAILS
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;______________________________________________________________________________________________________________________
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;
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CTC_DEFCFG .EQU %01010011 ; CTC DEFAULT CONFIG
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CTC_CTRCFG .EQU %01010111 ; CTC COUNTER MODE CONFIG
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CTC_TIM16CFG .EQU %00010111 ; CTC TIMER/16 MODE CONFIG
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CTC_TIM256CFG .EQU %00110111 ; CTC TIMER/256 MODE CONFIG
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;CTC_TIMCFG .EQU %11010111 ; CTC TIMER CHANNEL CONFIG
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; |||||||+-- CONTROL WORD FLAG
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; ||||||+--- SOFTWARE RESET
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; |||||+---- TIME CONSTANT FOLLOWS
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; ||||+----- AUTO TRIGGER WHEN TIME CONST LOADED
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; |||+------ RISING EDGE TRIGGER
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; ||+------- TIMER MODE PRESCALER (0=16, 1=256)
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; |+-------- COUNTER MODE
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; +--------- INTERRUPT ENABLE
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;
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;==================================================================================================
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; ONLY IM2 IMPLEMENTED BELOW. I DON'T SEE ANY REASONABLE WAY TO IMPLEMENT AN IM1 TIMER BECAUSE
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; THE CTC PROVIDES NO WAY TO DETERMINE IF IT WAS THE CAUSE OF AN INTERRUPT OR A WAY TO
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; DETERMINE WHICH CHANNEL CAUSED AN INTERRUPT.
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;==================================================================================================
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;
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#IF (CTCTIMER & (INTMODE != 2))
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.ECHO "*** WARNING: CTC TIMER DISABLED -- INTMODE 2 REQUIRED!!!\n"
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#ENDIF
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.ECHO "CTC: IO="
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.ECHO CTCBASE
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;
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#IF (CTCTIMER & (INTMODE == 2))
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;
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#IF (INT_CTC0A % 4)
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.ECHO INT_CTC0A
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.ECHO "\n"
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.ECHO (INT_CTC0A % 4)
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.ECHO "\n"
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.ECHO "*** ERROR: CTC BASE VECTOR NOT DWORD ALIGNED!!!\n"
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!!! ; FORCE AN ASSEMBLY ERROR
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#ENDIF
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;
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;==================================================================================================
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; TIMER SETUP
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;
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; A PERIODIC INTERRUPT TIMER CAN BE SETUP USING EITHER THE CPU SYSTEM CLOCK OR AN EXTERNAL
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; OSCILLATOR CONNECTED TO THE CTC. THE DEFACTO PERIOD FOR THIS TIMER IS 50Hz OR 60Hz.
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;
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; THE DESIRED TIMER PERIOD IS SET IN THE CONFIGURATION:
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; TICKFREQ .SET 60 ; OR
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; TICKFREQ .SET 50
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;
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; THIS DRIVER USES TWO CTC CHANNELS TO CREATE A TWO STEP DIVIDER THAT DIVIDES THE CPU SYSTEM
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; CLOCK OR EXTERNAL OSCILLATOR INTO A PERIODIC TICK THAT GENERATES AN INTERRUPT.
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;
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; THE CPU CLOCK OR CTC EXTERNAL OSCILLATOR NEEDS TO BE LESS THAN 3.932160MHz FOR A 60HZ TIMER
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; TICK OR 3.276800MHz FOR A 50Hz TIMER TICK.
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;
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; THE CHANNELS USED ARE DEFINED BY THE CTCPRECH AND CTCTIMCH DEFINITIONS - TYPICALLY 2 & 3.
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; EXTERNAL HARDWARE MUST BE CONFIGURED TO MATCH THIS CONFIGURATION.
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;
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; EACH CHANNEL SUCCESSIVELY DIVIDES THE CLOCK OR OSCILLATOR FREQUENCY DOWN TO A 50 OR 60Hz TICK.
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; THE FIRST DIVIDER CHANNEL IS THE PRESCALER, THE SECOND IS THE TIMER CHANNEL.
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;
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; IF CTCMODE IS CTCMODE_CTR THEN THE OSCILLATOR CONNECTED TO CTC PRESCALER CHANNEL IS USED.
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;
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; THE CONFIGURATION FILES DEFINE THE OSCILLATOR FREQUENCY THAT IS CONNECTED TO THE PRESCALER
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; CHANNEL. I.E. THE EXTERNAL HARDWARE CONNECTED TO THE CTC.
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;
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; FOR A 60Hz TIMER WITH A 3.579545Mhz OSCILLATOR USE:
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; CTCMODE .SET CTCMODE_CTR
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; TICKFREQ .SET 60
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; CTCOSC .SET 3579545
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;
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; IF CTCMODE IS CTCMODE_TIM16 OR CTCMODE_TIM256 THE CPU SYSTEM CLOCK FREQUENCY IS USED.
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;
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; THIS MODE HAS LIMITED VALUE AS MANY SYSTEMS OPERATE ABOVE THE USABLE TOP FREQUENCY.
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; THE CONFIGURATION FILE MUST BE UPDATED TO MATCH YOUR CPU CLOCK FREQUENCY.
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;
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; FOR A 60Hz TIMER WITH A 2Mhz OSCILLATOR USE:
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; CTCMODE .SET CTCMODE_TIM256
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; TICKFREQ .SET 60
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; CTCOSC .SET 2000000
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;
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; NOTE THAT IF CPU SPEED IS CHANGED IN THIS MODE, THE TIMER SPEED WILL ALSO CHANGE.
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;
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;==================================================================================================
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;
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CTC_PREIO .EQU CTCBASE + CTCPRECH
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CTC_SCLIO .EQU CTCBASE + CTCTIMCH
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;
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#IF (CTCMODE == CTCMODE_CTR)
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CTC_PRECFG .EQU CTC_CTRCFG
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CTC_PRESCL .EQU 1
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#ENDIF
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#IF (CTCMODE == CTCMODE_TIM16)
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CTC_PRECFG .EQU CTC_TIM16CFG
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CTC_PRESCL .EQU 16
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#ENDIF
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#IF (CTCMODE == CTCMODE_TIM256)
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CTC_PRECFG .EQU CTC_TIM256CFG
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CTC_PRESCL .EQU 256
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#ENDIF
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;
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CTC_DIV .EQU CTCOSC / CTC_PRESCL / TICKFREQ
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;
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CTC_DIVHI .EQU CTCPRE
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CTC_DIVLO .EQU (CTC_DIV / CTC_DIVHI)
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;
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.ECHO ", TIMER MODE="
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#IF (CTCMODE == CTCMODE_CTR)
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.ECHO "COUNTER"
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#ENDIF
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#IF (CTCMODE == CTCMODE_TIM16)
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.ECHO "TIMER/16"
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#ENDIF
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#IF (CTCMODE == CTCMODE_TIM256)
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.ECHO "TIMER/256"
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#ENDIF
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.ECHO ", DIVISOR="
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.ECHO CTC_DIV
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.ECHO ", HI="
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.ECHO CTC_DIVHI
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.ECHO ", LO="
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.ECHO CTC_DIVLO
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.ECHO ", INTERRUPTS ENABLED"
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;
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#IF ((CTC_DIV == 0) | (CTC_DIV > $FFFF))
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.ECHO "COMPUTED CTC DIVISOR IS UNUSABLE!\n"
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!!!
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#ENDIF
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;
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#IF ((CTC_DIVHI > $100) | (CTC_DIVLO > $100))
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.ECHO "COMPUTED CTC DIVISOR IS UNUSABLE!\n"
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!!!
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#ENDIF
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;
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#IF ((CTC_DIVHI * CTC_DIVLO * CTC_PRESCL * TICKFREQ) != CTCOSC)
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.ECHO "WARNING: COMPUTED CTC DIVISOR IS INACCURATE!\n"
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#ENDIF
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;
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CTCTIVT .EQU INT_CTC0A + CTCTIMCH
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;
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#ENDIF
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;
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.ECHO "\n"
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;
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;==================================================================================================
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; CTC PRE-INITIALIZATION
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;
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; CHECK TO SEE IF A CTC EXISTS. IF IT EXISTS, ALL FOUR CTC CHANNELS ARE PROGRAMMED TO:
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; INTERRUPTS DISABLED, COUNTER MODE, RISING EDGE TRIGGER, RESET STATE.
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;
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; IF THE CTCTIMER CONFIGURATION IS SET, THEN A PERIOD INTERRUPT TIMER IS SET UP USING CTC CHANNELS
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; 2 (CTCPRECH) & 3 (CTCTIMCH). THE TIMER WILL BE SETUP TO 50 OR 60HZ DEPENDING ON CONFIGURATION
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; SETTING TICKFREQ. CHANNEL 3 WILL GENERATE THE TICK INTERRUPT..
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;==================================================================================================
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;
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CTC_PREINIT:
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; BLINDLY RESET THE CTC ASSUMING IT IS THERE. PER ALAN COX
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; THE CTC CONFIGURATION IS UNDEFINED AT STARTUP. THIS SHOULD
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; PRECLUDE POSSIBLE EXTRANEOUS INTERRUPTS.
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LD A,CTC_DEFCFG
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OUT (CTCBASE),A
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OUT (CTCBASE+1),A
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OUT (CTCBASE+2),A
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OUT (CTCBASE+3),A
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;
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CALL CTC_DETECT ; DO WE HAVE ONE?
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LD (CTC_EXIST),A ; SAVE IT
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RET NZ ; ABORT IF NONE
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;
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#IF (CTCTIMER & (INTMODE == 2))
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; SETUP TIMER INTERRUPT IVT SLOT
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LD HL,HB_TIMINT ; TIMER INT HANDLER ADR
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LD (IVT(CTCTIVT)),HL ; IVT ENTRY FOR TIMER CHANNEL
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;
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; CTC USES 4 CONSECUTIVE VECTOR POSITIONS, ONE FOR
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; EACH CHANNEL. BELOW WE SET THE BASE VECTOR TO THE
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; START OF THE IVT, SO THE FIRST FOUR ENTRIES OF THE
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; IVT CORRESPOND TO CTC CHANNELS A-D.
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LD A,INT_CTC0A * 2
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OUT (CTCBASE),A ; SETUP CTC BASE INT VECTOR
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;
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; IN ORDER TO DIVIDE THE CTC INPUT CLOCK DOWN TO THE
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; DESIRED PERIODIC INTERRUPT, WE NEED TO CONFIGURE ONE
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; CTC CHANNEL AS A PRESCALER AND ANOTHER AS THE ACTUAL
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; TIMER INTERRUPT. THE PRESCALE CHANNEL OUTPUT MUST BE WIRED
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; TO THE TIMER CHANNEL TRIGGER INPUT VIA HARDWARE.
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LD A,CTC_PRECFG ; PRESCALE TIMER CHANNEL CFG
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OUT (CTC_PREIO),A ; SETUP PRESCALE CHANNEL
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LD A,CTC_DIVHI & $FF ; PRESCALE CHANNEL CONSTANT
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OUT (CTC_PREIO),A ; SET PRESCALE CONSTANT
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;
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LD A,CTC_CTRCFG | $80 ; TIMER CHANNEL + INT CFG
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OUT (CTC_SCLIO),A ; SETUP TIMER CHANNEL
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LD A,CTC_DIVLO & $FF ; TIMER CHANNEL CONSTANT
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OUT (CTC_SCLIO),A ; SET TIMER CONSTANT
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;
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#ENDIF
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;
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XOR A
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RET
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;
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;==================================================================================================
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; DRIVER INITIALIZATION
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;==================================================================================================
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;
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CTC_INIT: ; MINIMAL INIT
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CTC_PRTCFG:
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; ANNOUNCE PORT
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CALL NEWLINE ; FORMATTING
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PRTS("CTC:$") ; FORMATTING
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;
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PRTS(" IO=0x$") ; FORMATTING
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LD A,CTCBASE ; GET BASE PORT
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CALL PRTHEXBYTE ; PRINT BASE PORT
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;
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LD A,(CTC_EXIST) ; IS IT THERE?
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OR A ; 0 MEANS YES
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JR Z,CTC_PRTCFG1 ; IF SO, CONTINUE
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;
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; NOTIFY NO CTC HARDWARE
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PRTS(" NOT PRESENT$")
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OR $FF
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RET
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;
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CTC_PRTCFG1:
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;
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#IF (CTCTIMER & (INTMODE == 2))
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;
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PRTS(" TIMER MODE=$") ; FORMATTING
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#IF (CTCMODE == CTCMODE_CTR)
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PRTS("CTR$")
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#ENDIF
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#IF (CTCMODE == CTCMODE_TIM16)
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PRTS("TIM16$")
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#ENDIF
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#IF (CTCMODE == CTCMODE_TIM256)
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PRTS("TIM256$")
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#ENDIF
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;
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#IF (CTCDEBUG)
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PRTS(" DIVHI=$")
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LD A,CTC_DIVHI & $FF
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CALL PRTHEXBYTE
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;
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PRTS(" DIVLO=$")
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LD A,CTC_DIVLO & $FF
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CALL PRTHEXBYTE
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;
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PRTS(" PREIO=$")
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LD A,CTC_PREIO
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CALL PRTHEXBYTE
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;
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PRTS(" SCLIO=$")
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LD A,CTC_SCLIO
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CALL PRTHEXBYTE
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;
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PRTS(" DIV=$")
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LD BC,CTC_DIV
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CALL PRTHEXWORD
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#ENDIF
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;
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#ENDIF
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;
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XOR A
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RET
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;
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;==================================================================================================
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; DETECT CTC BY PROGRAMMING THE FIRST CHANNEL TO COUNT IN TIMER
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; MODE (BASED ON CPU CLOCK). THEN CHECK IF COUNTER IS ACTUALLY
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; RUNNING.
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;==================================================================================================
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;
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CTC_DETECT:
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LD A,CTC_TIM16CFG ; RESET & SETUP TIMER MODE
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OUT (CTCBASE),A ; SEND TO CTC
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LD A,$FF ; TIME CONSTANT $FF
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OUT (CTCBASE),A ; SEND CONSTANT & START CTR
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NOP ; BRIEF DELAY
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IN A,(CTCBASE) ; READ COUNTER
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LD C,A ; SAVE VALUE
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CALL DLY8 ; WAIT A BIT
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IN A,(CTCBASE) ; READ COUNTER AGAIN
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PUSH AF ; SAVE RESULT
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LD A,CTC_DEFCFG ; DEFAULT CHANNEL CFG
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OUT (CTCBASE),A ; RESTORE TO DEFAULTS
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POP AF ; GET RESULT BACK
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CP C ; COMPARE TO PREVIOUS
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JR Z,CTC_NO ; IF SAME, FAIL
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XOR A ; SIGNAL SUCCESS
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RET ; AND DONE
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CTC_NO:
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OR $FF ; SIGNAL FAILURE
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RET ; AND DONE
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;
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; CTC DRIVER DATA STORAGE
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;
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CTC_EXIST .DB $FF ; SET TO ZERO IF EXISTS
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