mirror of
https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 22:13:13 -06:00
146 lines
4.0 KiB
Z80 Assembly
146 lines
4.0 KiB
Z80 Assembly
;:::::::::::::::::::::::::::::::::::::::*****************************
|
||
; HBIOS - HBios Interface Routines ***** Hardware-Specific *****
|
||
; *****************************
|
||
; - Retro Brew -
|
||
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
|
||
;
|
||
; HBIOS Functions
|
||
;
|
||
HBF_ALLOC EQU 0F6H ; HBIOS Func: ALLOCATE Heap Memory
|
||
HBF_PEEK EQU 0FAH ; HBIOS Func: Peek Byte
|
||
HBF_POKE EQU 0FBH ; HBIOS Func: Poke Byte
|
||
HBF_MEMINFO EQU 0F8F1H ; HBIOS Func: Get Memory Info
|
||
HBF_BNKINFO EQU 0F8F2H ; HBIOS Func: Get Bank Info
|
||
;
|
||
; HBIOS Proxy Addresses
|
||
;
|
||
HBX_INVOKE EQU 0FFF0H
|
||
HBX_BNKSEL EQU 0FFF3H
|
||
HBX_BNKCPY EQU 0FFF6H
|
||
HBX_BNKCALL EQU 0FFF9H
|
||
|
||
HBX_CURBNK EQU 0FFE0H
|
||
HBX_INVBNK EQU 0FFE1H
|
||
HBX_SRCADR EQU 0FFE2H
|
||
HBX_SRCBNK EQU 0FFE4H
|
||
HBX_DSTADR EQU 0FFE5H
|
||
HBX_DSTBNK EQU 0FFE7H
|
||
HBX_CPYLEN EQU 0FFE8H
|
||
|
||
CSEG
|
||
|
||
|
||
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
|
||
; Trap initial SELMEM call and fixup HBIOS bank ids.
|
||
; A = Bank
|
||
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
|
||
|
||
; LDSYS calls the SELMEM entry point of BIOSJT in order to
|
||
; place memory contents in SYSBNK. It does this prior to
|
||
; calling CBOOT to start the system. Since we need to adjust
|
||
; the bank numbers on-the-fly at startup to adjust for
|
||
; HBIOS actual RAM size, we intercept the initial HB_SELMEM
|
||
; call here, make required changes, then update the
|
||
; BIOSJT to point directly to the normal SELMEM routine for
|
||
; all subsequent calls.
|
||
|
||
; BPBIOS HBIOS Typical
|
||
; ------------ -------------- --------------
|
||
; -1: <COMMON> BID_COM 90h - 1 = 8Fh
|
||
; -2: TPABNK BID_USR 90h - 2 = 8Eh
|
||
; -3: <HBIOS> BID_BIOS 90h - 3 = 8Dh
|
||
; -4: SYSBNK BID_AUX 90h - 4 = 8Ch
|
||
; -9: BNKM BID_AUX-5 90h - 9 = 87h
|
||
; -16: RAMBNK RAMD0 90h - 16 = 80h
|
||
|
||
HB_SELMEM:
|
||
PUSH AF
|
||
PUSH BC
|
||
PUSH DE
|
||
PUSH HL
|
||
|
||
IF HB_DEBUG AND FALSE
|
||
CALL PRTSTRD
|
||
DEFB '[HB_SELMEM: $'
|
||
CALL PRTHEXBYTE
|
||
CALL PRTSTRD
|
||
DEFB ']',CR,LF,'$'
|
||
ENDIF
|
||
|
||
LD BC,HBF_BNKINFO ; HBIOS BNKINFO function
|
||
CALL HBX_INVOKE ; DO IT, D=BID_BIOS, E=BID_USER
|
||
LD A,D ; BID_BIOS
|
||
LD (HB_BNKBIOS),A ; SET HB_BNKBIOS
|
||
ADD A,3 ; HBIOS + 3
|
||
LD (HB_BNKEND),A ; ... is the ending RAM bank
|
||
IF BANKED
|
||
LD (BNKADJ+1),A ; Dynamically update SELBNK
|
||
ENDIF
|
||
|
||
LD HL,SELMEM ; Future SELMEM calls will
|
||
LD (BIOSJT+(27*3)+1),HL ; ... go to real SELMEM
|
||
|
||
POP HL
|
||
POP DE
|
||
POP BC
|
||
POP AF
|
||
JP SELMEM
|
||
|
||
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
|
||
; Move Data - Possibly between banks. This resembles CP/M 3, but
|
||
; usage of the HL and DE registers is reversed.
|
||
; Enter: HL = Source Address
|
||
; DE = Destination Address
|
||
; BC = Number of bytes to move
|
||
; Exit : None
|
||
; Uses : AF,BC,DE,HL
|
||
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
|
||
|
||
HB_MOVE:
|
||
PUSH HL
|
||
LD HL,HB_BNKEND
|
||
LD A,(HB_SRCBNK)
|
||
ADD A,(HL) ; Adjust for HBIOS bank ids
|
||
LD (HBX_SRCBNK),A
|
||
LD A,(HB_DSTBNK)
|
||
ADD A,(HL) ; Adjust for HBIOS bank ids
|
||
LD (HBX_DSTBNK),A
|
||
POP HL
|
||
CALL HBX_BNKCPY
|
||
PUSH HL
|
||
LD HL,(TPABNK) ; Get TPA Bank #
|
||
LD H,L ; .to both H and L
|
||
LD (HB_SRCBNK),HL ; ..set Source & Destination Bank # to TPA
|
||
POP HL
|
||
RET
|
||
|
||
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
|
||
; Set Banks for Inter-Bank Xfer. Save all Registers.
|
||
; B = Destination Bank, C = Source Bank
|
||
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
|
||
|
||
HB_XMOVE:
|
||
IF HB_DEBUG AND FALSE
|
||
CALL PRTSTRD
|
||
DEFB '[HB_XMOVE: $'
|
||
CALL PRTHEXWORD
|
||
CALL PRTSTRD
|
||
DEFB ']',CR,LF,'$'
|
||
ENDIF
|
||
|
||
LD (HB_SRCBNK),BC
|
||
RET
|
||
|
||
;
|
||
;==================================================================================================
|
||
; HBIOS INITIALIZATION
|
||
;==================================================================================================
|
||
;
|
||
CSEG
|
||
|
||
HB_SRCBNK: DEFS 1 ; Move Source Bank #
|
||
HB_DSTBNK: DEFS 1 ; Move Destination Bank #
|
||
HB_BNKBIOS: DEFS 1 ; Bank id of HBIOS bank
|
||
HB_BNKEND: DEFS 1 ; End of available RAM banks (last bank + 1)
|
||
HB_DSKBUF: DEFS 2 ; Address of physical disk buffer in HBIOS bank
|
||
|