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660 lines
18 KiB
660 lines
18 KiB
;
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;==================================================================================================
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; DALLAS SEMICONDUCTOR DS1302 RTC DRIVER
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;==================================================================================================
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;
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; PROGRAMMING NOTES:
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; - ALL SIGNALS ARE ACTIVE HIGH
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; - DATA OUTPUT (HOST -> RTC) ON RISING EDGE
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; - DATA INPUT (RTC -> HOST) ON FALLING EDGE
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; - SIMPLIFIED TIMING CONSTRAINTS:
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; @ 50MHZ, 1 TSTATE IS WORTH 20NS, 1 NOP IS WORTH 80NS, 1 EX (SP), IX IS WORTH 23 460NS
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; 1) AFTER CHANGING CE, WAIT 1US (2 X EX (SP), IX)
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; 2) AFTER CHANGING CLOCK, WAIT 250NS (3 X NOP)
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; 3) AFTER SETTING A DATA BIT, WAIT 50NS (1 X NOP)
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; 4) PRIOR TO READING A DATA BIT, WAIT 200NS (3 X NOP)
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;
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; COMMAND BYTE:
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;
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; 7 6 5 4 3 2 1 0
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; +-----+-----+-----+-----+-----+-----+-----+-----+
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; | 1 | RAM | A4 | A3 | A2 | A1 | A0 | RD |
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; | | ~CK | | | | | | ~WR |
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; +-----+-----+-----+-----+-----+-----+-----+-----+
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;
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; REGISTER ADDRESSES (HEX / BCD):
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;
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; RD WR D7 D6 D5 D4 D3 D2 D1 D0 RANGE
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; +----+----+----+----+----+----+----+----+----+----+-----------+
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; | 81 | 80 | CH | 10 SECS | SEC | 00-59 |
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; +----+----+----+----+----+----+----+----+----+----+-----------+
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; | 83 | 82 | | 10 MINS | MIN | 00-59 |
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; +----+----+----+----+----+----+----+----+----+----+-----------+
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; | 85 | 84 | TF | 00 | PM | 10 | HOURS | 1-12/0-23 |
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; +----+----+----+----+----+----+----+----+----+----+-----------+
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; | 87 | 86 | 00 | 00 | 10 DATE | DATE | 1-31 |
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; +----+----+----+----+----+----+----+----+----+----+-----------+
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; | 89 | 88 | 00 | 10 MONTHS | MONTH | 1-12 |
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; +----+----+----+----+----+----+----+----+----+----+-----------+
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; | 8B | 8A | 00 | 00 | 00 | 00 | DAY | 1-7 |
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; +----+----+----+----+----+----+----+----+----+----+-----------+
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; | 8D | 8C | 10 YEARS | YEAR | 0-99 |
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; +----+----+----+----+----+----+----+----+----+----+-----------+
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; | 8F | 8E | WP | 00 | 00 | 00 | 00 | 00 | 00 | 00 | |
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; +----+----+----+----+----+----+----+----+----+----+-----------+
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; | 91 | 90 | TCS | DS | RS | |
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; +----+----+----+----+----+----+----+----+----+----+-----------+
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; | BF | BE | *CLOCK BURST* |
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; +----+----+----+----+----+----+----+----+----+----+-----------+
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; | C1 | C0 | | |
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; | .. | .. | *RAM* | |
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; | FD | FC | | |
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; +----+----+----+----+----+----+----+----+----+----+-----------+
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; | FF | FE | *RAM BURST* | |
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; +----+----+----+----+----+----+----+----+----+----+-----------+
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;
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; CH=CLOCK HALT (1=CLOCK HALTED & OSC STOPPED)
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; TF=12 HOUR (1) OR 24 HOUR (0)
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; PM=IF 24 HOURS, 0=AM, 1=PM, ELSE 10 HOURS
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; WP=WRITE PROTECT (1=PROTECTED)
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; TCS=TRICKLE CHARGE ENABLE (1010 TO ENABLE)
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; DS=TRICKLE CHARGE DIODE SELECT
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; RS=TRICKLE CHARGE RESISTOR SELECT
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;
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; CONSTANTS
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;
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; RTC SBC SBC-004 MFPIC N8 N8-CSIO SC
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; ----- ------- ------- ------- ------- ------- -------
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; D7 WR RTC_OUT RTC_OUT -- RTC_OUT RTC_OUT RTC_OUT, I2C_SDA
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; D6 WR RTC_CLK RTC_CLK -- RTC_CLK RTC_CLK RTC_CLK
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; D5 WR /RTC_WE /RTC_WE -- /RTC_WE /RTC_WE /RTC_WE
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; D4 WR RTC_CE RTC_CE -- RTC_CE RTC_CE RTC_CE
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; D3 WR NC SPK /RTC_CE NC NC /SPI_CS2
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; D2 WR NC CLKHI RTC_CLK SPI_CS SPI_CS /SPI_CS1
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; D1 WR -- -- RTC_WE SPI_CLK NC FS
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; D0 WR -- -- RTC_OUT SPI_DI NC I2C_SCL
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;
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; D7 RD -- -- -- -- -- I2C_SDA
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; D6 RD CFG CFG -- SPI_DO CFG --
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; D5 RD -- -- -- -- -- --
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; D4 RD -- -- -- -- -- --
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; D3 RD -- -- -- -- -- --
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; D2 RD -- -- -- -- -- --
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; D1 RD -- -- -- -- -- --
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; D0 RD RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN
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;
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#IF (DSRTCMODE == DSRTCMODE_STD)
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;
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DSRTC_BASE .EQU RTCIO ; RTC PORT
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;
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DSRTC_DATA .EQU %10000000 ; BIT 7 IS RTC DATA OUT
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DSRTC_CLK .EQU %01000000 ; BIT 6 IS RTC CLOCK (CLK)
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DSRTC_RD .EQU %00100000 ; BIT 5 IS DATA DIRECTION (/WE)
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DSRTC_CE .EQU %00010000 ; BIT 4 IS CHIP ENABLE (CE)
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;
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DSRTC_MASK .EQU %11110000 ; MASK FOR BITS WE OWN IN RTC LATCH PORT
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DSRTC_IDLE .EQU %00100000 ; QUIESCENT STATE
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;
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; VALUES FOR DIFFERENT BATTERY OR SUPERCAPACITOR CHARGE RATES
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;
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DS1d2k .EQU %10100101 ; 1 DIODE 2K RESISTOR (DEFAULT)
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DS1d4k .EQU %10100110 ; 1 DIODE 4K RESISTOR
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DS1d8k .EQU %10100111 ; 1 DOIDE 8K RESISTOR
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DS2d2k .EQU %10101001 ; 2 DIODES 2K RESISTOR
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DS2d4k .EQU %10101010 ; 2 DIODES 4K RESISTOR
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DS2d8k .EQU %10101011 ; 2 DIODES 8K RESISTOR
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;
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#ENDIF
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;
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#IF (DSRTCMODE == DSRTCMODE_MFPIC)
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;
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DSRTC_BASE .EQU $43 ; RTC PORT ON MF/PIC
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;
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DSRTC_DATA .EQU %00000001 ; BIT 0 IS RTC DATA OUT
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DSRTC_CLK .EQU %00000100 ; BIT 2 IS RTC CLOCK (CLK)
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DSRTC_WR .EQU %00000010 ; BIT 1 IS DATA DIRECTION (WE)
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DSRTC_CE .EQU %00001000 ; BIT 3 CHIP ENABLE (/CE)
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;
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DSRTC_MASK .EQU %00001111 ; MASK FOR BITS WE OWN IN RTC LATCH PORT
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DSRTC_IDLE .EQU %00101000 ; QUIESCENT STATE
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;
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#ENDIF
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;
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DSRTC_BUFSIZ .EQU 7 ; 7 BYTE BUFFER (YYMMDDHHMMSSWW)
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;
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; RTC DEVICE PRE-INITIALIZATION ENTRY
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;
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DSRTC_PREINIT:
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;
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; SET RELEVANT BITS IN RTC LATCH SHADOW REGISTER
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; TO THEIR QUIESENT STATE
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LD A,(RTCVAL) ; GET CURRENT SHADOW REG VAL
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AND DSRTC_MASK ; CLEAR OUR BITS
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OR DSRTC_IDLE ; SET OUR IDLE BITS
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LD (RTCVAL),A ; SAVE IT
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;
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CALL DSRTC_DETECT ; HARDWARE DETECTION
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LD (DSRTC_STAT),A ; SAVE RESULT
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RET NZ ; ABORT IF ERROR
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;
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; CHECK FOR CLOCK HALTED
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CALL DSRTC_TSTCLK
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JR Z,DSRTC_PREINIT1
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;PRTS(" INIT CLOCK $")
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LD HL,DSRTC_TIMDEF
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CALL DSRTC_TIM2CLK
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LD HL,DSRTC_BUF
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CALL DSRTC_WRCLK
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;
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DSRTC_PREINIT1:
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XOR A ; SIGNAL SUCCESS
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RET ; DONE
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;
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; RTC DEVICE INITIALIZATION ENTRY
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;
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DSRTC_INIT:
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CALL NEWLINE ; FORMATTING
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PRTS("DSRTC: MODE=$")
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;
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#IF (DSRTCMODE == DSRTCMODE_STD)
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PRTS("STD$")
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#ENDIF
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#IF (DSRTCMODE == DSRTCMODE_MFPIC)
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PRTS("MFPIC$")
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#ENDIF
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;
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; PRINT RTC LATCH PORT ADDRESS
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PRTS(" IO=0x$") ; LABEL FOR IO ADDRESS
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LD A,DSRTC_BASE ; GET IO ADDRESS
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CALL PRTHEXBYTE ; PRINT IT
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;
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; CHECK PRESENCE STATUS
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LD A,(DSRTC_STAT) ; GET DEVICE STATUS
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OR A ; SET FLAGS
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JR Z,DSRTC_INIT1 ; IF ZERO, ALL GOOD
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PRTS(" NOT PRESENT$") ; NOT ZERO, H/W NOT PRESENT
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OR $FF ; SIGNAL FAILURE
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RET ; BAIL OUT
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;
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DSRTC_INIT1:
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; DISPLAY CURRENT TIME
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CALL PC_SPACE
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LD HL,DSRTC_BUF
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CALL DSRTC_RDCLK
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LD HL,DSRTC_TIMBUF
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CALL DSRTC_CLK2TIM
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LD HL,DSRTC_TIMBUF
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CALL PRTDT
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;
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#IF DSRTCCHG ; FORCE_RTC_CHARGE_ENABLE
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LD C,$90 ; ACCESS CHARGE REGISTER
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LD E,DS1d2k ; STD CHARGE VALUES
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CALL DSRTC_WRBYTWP
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#ENDIF
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;
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PRTS(" CHARGE=$") ; DISPLAY
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CALL DSRTC_TSTCHG ; CHARGING
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JR NZ,NOCHG1 ; STATUS
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PRTS("ON$")
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JR NOCHG2
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NOCHG1:
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PRTS("OFF$")
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NOCHG2:
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XOR A ; SIGNAL SUCCESS
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RET
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;
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; RTC DEVICE FUNCTION DISPATCH ENTRY
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; A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
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; B: FUNCTION (IN)
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;
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DSRTC_DISPATCH:
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LD A,B ; GET REQUESTED FUNCTION
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AND $0F ; ISOLATE SUB-FUNCTION
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JP Z,DSRTC_GETTIM ; GET TIME
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DEC A
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JP Z,DSRTC_SETTIM ; SET TIME
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DEC A
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JP Z,DSRTC_GETBYT ; GET NVRAM BYTE VALUE
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DEC A
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JP Z,DSRTC_SETBYT ; SET NVRAM BYTE VALUE
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DEC A
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JP Z,DSRTC_GETBLK ; GET NVRAM DATA BLOCK VALUES
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DEC A
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JP Z,DSRTC_SETBLK ; SET NVRAM DATA BLOCK VALUES
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CALL PANIC
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;
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; NVRAM FUNCTIONS ARE NOT AVAILABLE IN SIMULATOR
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;
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DSRTC_GETBLK:
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DSRTC_SETBLK:
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CALL PANIC
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;
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; RTC GET TIME
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; A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
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; HL: DATE/TIME BUFFER (OUT)
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; BUFFER FORMAT IS BCD: YYMMDDHHMMSS
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; 24 HOUR TIME FORMAT IS ASSUMED
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;
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DSRTC_GETTIM:
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;
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PUSH HL ; SAVE ADR OF OUTPUT BUF
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;
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; READ THE CLOCK
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LD HL,DSRTC_BUF ; POINT TO CLOCK BUFFER
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CALL DSRTC_RDCLK ; READ THE CLOCK
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LD HL,DSRTC_TIMBUF ; POINT TO TIME BUFFER
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CALL DSRTC_CLK2TIM ; CONVERT CLOCK TO TIME
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;
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; NOW COPY TO REAL DESTINATION (INTERBANK SAFE)
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LD A,BID_BIOS ; COPY FROM BIOS BANK
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LD (HB_SRCBNK),A ; SET IT
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LD A,(HB_INVBNK) ; COPY TO CURRENT USER BANK
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LD (HB_DSTBNK),A ; SET IT
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LD HL,DSRTC_TIMBUF ; SOURCE ADR
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POP DE ; DEST ADR
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LD BC,6 ; LENGTH IS 6 BYTES
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#IF (INTMODE == 1)
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DI
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#ENDIF
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CALL HB_BNKCPY ; COPY THE CLOCK DATA
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#IF (INTMODE == 1)
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EI
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#ENDIF
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;
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; CLEAN UP AND RETURN
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XOR A ; SIGNAL SUCCESS
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RET ; AND RETURN
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;
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; RTC SET TIME
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; A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
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; HL: DATE/TIME BUFFER (IN)
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; BUFFER FORMAT IS BCD: YYMMDDHHMMSS
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; 24 HOUR TIME FORMAT IS ASSUMED
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;
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DSRTC_SETTIM:
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;
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; COPY INCOMING TIME DATA TO OUR TIME BUFFER
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LD A,(HB_INVBNK) ; COPY FROM CURRENT USER BANK
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LD (HB_SRCBNK),A ; SET IT
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LD A,BID_BIOS ; COPY TO BIOS BANK
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LD (HB_DSTBNK),A ; SET IT
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LD DE,DSRTC_TIMBUF ; DEST ADR
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LD BC,6 ; LENGTH IS 6 BYTES
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#IF (INTMODE == 1)
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DI
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#ENDIF
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CALL HB_BNKCPY ; COPY THE CLOCK DATA
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#IF (INTMODE == 1)
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EI
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#ENDIF
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;
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; WRITE TO CLOCK
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LD HL,DSRTC_TIMBUF ; POINT TO TIME BUFFER
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CALL DSRTC_TIM2CLK ; CONVERT TO CLOCK FORMAT
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LD HL,DSRTC_BUF ; POINT TO CLOCK BUFFER
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CALL DSRTC_WRCLK ; WRITE TO THE CLOCK
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;
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; CLEAN UP AND RETURN
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XOR A ; SIGNAL SUCCESS
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RET ; AND RETURN
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;
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; RTC GET NVRAM BYTE
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; C: INDEX
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; E: VALUE (OUTPUT)
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;
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DSRTC_GETBYT:
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LD A,C ; INDEX
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SLA A ; SHIFT TO INDEX BITS
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ADD A,$C1 ; CMD OFFSET
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LD C,A ; SAVE READ CMD BYTE
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CALL DSRTC_RDBYT ; DO IT
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XOR A ; SIGNAL SUCCESS
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RET ; DONE
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;
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; RTC SET NVRAM BYTE
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; C: INDEX
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; E: VALUE
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;
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DSRTC_SETBYT:
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LD A,C ; INDEX
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SLA A ; SHIFT TO INDEX BITS
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ADD A,$C0 ; CMD OFFSET
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LD C,A ; SAVE WRITE CMD BYTE
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CALL DSRTC_WRBYTWP ; DO IT
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XOR A ; SIGNAL SUCCESS
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RET ; DONE
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;
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; CONVERT DATA IN CLOCK BUFFER TO TIME BUFFER AT HL
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;
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DSRTC_CLK2TIM:
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LD A,(DSRTC_YR)
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LD (HL),A
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INC HL
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LD A,(DSRTC_MON)
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LD (HL),A
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INC HL
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LD A,(DSRTC_DT)
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LD (HL),A
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INC HL
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LD A,(DSRTC_HR)
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LD (HL),A
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INC HL
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LD A,(DSRTC_MIN)
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LD (HL),A
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INC HL
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LD A,(DSRTC_SEC)
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LD (HL),A
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RET
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;
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; CONVERT DATA IN TIME BUFFER AT HL TO CLOCK BUFFER
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;
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DSRTC_TIM2CLK:
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PUSH HL
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LD A,(HL)
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LD (DSRTC_YR),A
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INC HL
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LD A,(HL)
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LD (DSRTC_MON),A
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INC HL
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LD A,(HL)
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LD (DSRTC_DT),A
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INC HL
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LD A,(HL)
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LD (DSRTC_HR),A
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INC HL
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LD A,(HL)
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LD (DSRTC_MIN),A
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INC HL
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LD A,(HL)
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LD (DSRTC_SEC),A
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POP HL
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CALL TIMDOW
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INC A ; CONVERT FROM 0-6 TO 1-7
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LD (DSRTC_DAY),A
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RET
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;
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; TEST CLOCK FOR CHARGE DATA
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;
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DSRTC_TSTCHG:
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LD C,$91 ; CHARGE RESISTOR & DIODE VALUES
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CALL DSRTC_RDBYT ; GET VALUE
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LD A,E ; VALUE TO A
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AND %11110000 ; CHECK FOR
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CP %10100000 ; ... ENABLED FLAG
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RET
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;
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; DETECT RTC HARDWARE PRESENCE
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;
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DSRTC_DETECT:
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LD C,31 ; NVRAM INDEX 31
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CALL DSRTC_GETBYT ; GET VALUE
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LD A,E ; TO ACCUM
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LD (DSRTC_TEMP),A ; SAVE IT
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XOR $FF ; FLIP ALL BITS
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LD E,A ; TO E
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LD C,31 ; NVRAM INDEX 31
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CALL DSRTC_SETBYT ; WRITE IT
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LD C,31 ; NVRAM INDEX 31
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CALL DSRTC_GETBYT ; GET VALUE
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LD A,(DSRTC_TEMP) ; GET SAVED VALUE
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XOR $FF ; FLIP ALL BITS
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CP E ; COMPARE WITH VALUE READ
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LD A,0 ; ASSUME OK
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JR Z,DSRTC_DETECT1 ; IF MATCH, GO AHEAD
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LD A,$FF ; ELSE STATUS IS ERROR
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DSRTC_DETECT1:
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PUSH AF ; SAVE STATUS
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LD A,(DSRTC_TEMP) ; GET SAVED VALUE
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LD C,31 ; NVRAM INDEX 31
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CALL DSRTC_SETBYT ; SAVE IT
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POP AF ; RECOVER STATUS
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OR A ; SET FLAGS
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RET ; DONE
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;
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; TEST CLOCK FOR VALID DATA
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; READ CLOCK HALT BIT AND RETURN ZF BASED ON BIT VALUE
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; 0 = RUNNING
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; 1 = HALTED
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;
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DSRTC_TSTCLK:
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LD C,$81 ; SECONDS REGISTER HAS CLOCK HALT FLAG
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CALL DSRTC_RDBYT ; GET REGISTER VALUE
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LD A,E ; VALUE TO A
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AND %10000000 ; HIGH ORDER BIT IS CLOCK HALT
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RET
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;
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; READ RAW BYTE
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; C=READ CMD BYTE
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; E=VALUE (OUTPUT)
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;
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DSRTC_RDBYT:
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LD E,C
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CALL DSRTC_CMD
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CALL DSRTC_GET
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CALL DSRTC_END
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RET
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;
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; WRITE RAW BYTE
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; C=WRITE CMD BYTE
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; E=VALUE
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;
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DSRTC_WRBYT:
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PUSH DE ; SAVE VALUE TO WRITE
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LD E,C ; CMD TO E
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CALL DSRTC_CMD
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POP DE ; RESTORE VALUE
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CALL DSRTC_PUT
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CALL DSRTC_END
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RET
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;
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; WRITE RAW BYTE W/ WRITE PROTECT BRACKETING
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; C=WRITE CMD BYTE
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; E=VALUE
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;
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DSRTC_WRBYTWP:
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LD D,C ; WRITE CMD TO D
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PUSH DE ; SAVE PARMS
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;
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; TURN OFF WRITE PROTECT
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LD C,$8E ; CMD
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LD E,0 ; WRITE PROTECT OFF
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CALL DSRTC_WRBYT ; DO IT
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;
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; WRITE THE VALUE
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POP DE ; RESTORE INPUTS
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LD C,D ; WRITE CMD BACK TO C
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CALL DSRTC_WRBYT ; DO IT
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;
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; TURN WRITE PROTECT BACK ON
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LD C,$8E ; WRITE CMD TO D
|
|
LD E,$80 ; WRITE PROTECT ON
|
|
CALL DSRTC_WRBYT ; DO IT
|
|
;
|
|
RET
|
|
;
|
|
; BURST READ CLOCK DATA INTO BUFFER AT HL
|
|
;
|
|
DSRTC_RDCLK:
|
|
LD E,$BF ; COMMAND = $BF TO BURST READ CLOCK
|
|
CALL DSRTC_CMD ; SEND COMMAND TO RTC
|
|
LD B,DSRTC_BUFSIZ ; B IS LOOP COUNTER
|
|
DSRTC_RDCLK1:
|
|
PUSH BC ; PRESERVE BC
|
|
CALL DSRTC_GET ; GET NEXT BYTE
|
|
LD (HL),E ; SAVE IN BUFFER
|
|
INC HL ; INC BUF POINTER
|
|
POP BC ; RESTORE BC
|
|
DJNZ DSRTC_RDCLK1 ; LOOP IF NOT DONE
|
|
JP DSRTC_END ; FINISH IT
|
|
;
|
|
; BURST WRITE CLOCK DATA FROM BUFFER AT HL
|
|
;
|
|
DSRTC_WRCLK:
|
|
LD E,$8E ; COMMAND = $8E TO WRITE CONTROL REGISTER
|
|
CALL DSRTC_CMD ; SEND COMMAND
|
|
LD E,$00 ; $00 = UNPROTECT
|
|
CALL DSRTC_PUT ; SEND VALUE TO CONTROL REGISTER
|
|
CALL DSRTC_END ; FINISH IT
|
|
;
|
|
LD E,$BE ; COMMAND = $BE TO BURST WRITE CLOCK
|
|
CALL DSRTC_CMD ; SEND COMMAND TO RTC
|
|
LD B,DSRTC_BUFSIZ ; B IS LOOP COUNTER
|
|
DSRTC_WRCLK1:
|
|
PUSH BC ; PRESERVE BC
|
|
LD E,(HL) ; GET NEXT BYTE TO WRITE
|
|
CALL DSRTC_PUT ; PUT NEXT BYTE
|
|
INC HL ; INC BUF POINTER
|
|
POP BC ; RESTORE BC
|
|
DJNZ DSRTC_WRCLK1 ; LOOP IF NOT DONE
|
|
LD E,$80 ; ADD CONTROL REG BYTE, $80 = PROTECT ON
|
|
CALL DSRTC_PUT ; WRITE REQUIRED 8TH BYTE
|
|
JP DSRTC_END ; FINISH IT
|
|
;
|
|
; SEND COMMAND IN E TO RTC
|
|
; ALL RTC SEQUENCES MUST CALL THIS FIRST TO SEND THE RTC COMMAND.
|
|
; THE COMMAND IS SENT VIA A PUT. CE AND CLK ARE LEFT ASSERTED! THIS
|
|
; IS INTENTIONAL BECAUSE WHEN THE CLOCK IS LOWERED, THE FIRST BIT
|
|
; WILL BE PRESENTED TO READ (IN THE CASE OF A READ CMD).
|
|
;
|
|
; N.B. REGISTER A CONTAINS WORKING VALUE OF LATCH PORT AND MUST NOT
|
|
; BE MODIFIED BETWEEN CALLS TO DSRTC_CMD, DSRTC_PUT, AND DSRTC_GET.
|
|
;
|
|
; 0) ASSUME ALL LINES UNDEFINED AT ENTRY
|
|
; 1) DEASSERT ALL LINES (CE, RD, CLOCK, & DATA)
|
|
; 2) WAIT 1US
|
|
; 3) SET CE HI
|
|
; 4) WAIT 1US
|
|
; 5) PUT COMMAND
|
|
;
|
|
DSRTC_CMD:
|
|
LD A,(RTCVAL) ; INIT A WITH QUIESCENT STATE
|
|
OUT (DSRTC_BASE),A ; WRITE TO PORT
|
|
CALL DLY2 ; DELAY 2 * 27 T-STATES
|
|
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
|
|
AND ~DSRTC_CE ; ASSERT CE (LOW)
|
|
#ELSE
|
|
OR DSRTC_CE ; ASSERT CE (HIGH)
|
|
#ENDIF
|
|
OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
|
|
CALL DLY2 ; DELAY 2 * 27 T-STATES
|
|
CALL DSRTC_PUT ; WRITE IT
|
|
RET
|
|
;
|
|
; WRITE BYTE IN E TO THE RTC
|
|
; WRITE BYTE IN E TO THE RTC. CE IS IMPLICITY ASSERTED AT
|
|
; THE START. CE AND CLK ARE LEFT ASSERTED AT THE END IN CASE
|
|
; NEXT ACTION IS A READ.
|
|
;
|
|
; 0) ASSUME ENTRY WITH CE HI, OTHERS UNDEFINED
|
|
; 1) SET CLK LO
|
|
; 2) WAIT 250NS
|
|
; 3) SET DATA ACCORDING TO BIT VALUE
|
|
; 4) SET CLOCK HI
|
|
; 5) WAIT 250NS (CLOCK READS DATA BIT FROM BUS)
|
|
; 6) LOOP FOR 8 DATA BITS
|
|
; 7) EXIT WITH CE,CLK HI
|
|
;
|
|
DSRTC_PUT:
|
|
LD B,8 ; LOOP FOR 8 BITS
|
|
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
|
|
OR DSRTC_WR ; SET WRITE MODE
|
|
#ELSE
|
|
AND ~DSRTC_RD ; SET WRITE MODE
|
|
#ENDIF
|
|
DSRTC_PUT1:
|
|
AND ~DSRTC_CLK ; SET CLOCK LOW
|
|
OUT (DSRTC_BASE),A ; DO IT
|
|
CALL DLY1 ; DELAY 27 T-STATES
|
|
|
|
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
|
|
RRA ; PREP ACCUM TO GET DATA BIT IN CARRY
|
|
RR E ; ROTATE NEXT BIT TO SEND INTO CARRY
|
|
RLA ; ROTATE BITS BACK TO CORRECT POSTIIONS
|
|
#ELSE
|
|
RLA ; PREP ACCUM TO GET DATA BIT IN CARRY
|
|
RR E ; ROTATE NEXT BIT TO SEND INTO CARRY
|
|
RRA ; ROTATE BITS BACK TO CORRECT POSTIIONS
|
|
#ENDIF
|
|
OUT (DSRTC_BASE),A ; ASSERT DATA BIT ON BUS
|
|
OR DSRTC_CLK ; SET CLOCK HI
|
|
OUT (DSRTC_BASE),A ; DO IT
|
|
CALL DLY1 ; DELAY 27 T-STATES
|
|
DJNZ DSRTC_PUT1 ; LOOP IF NOT DONE
|
|
RET
|
|
;
|
|
; READ BYTE FROM RTC, RETURN VALUE IN E
|
|
; READ THE NEXT BYTE FROM THE RTC INTO E. CE IS IMPLICITLY
|
|
; ASSERTED AT THE START. CE AND CLK ARE LEFT ASSERTED AT
|
|
; THE END. CLOCK *MUST* BE LEFT ASSERTED FROM DSRTC_CMD!
|
|
;
|
|
; 0) ASSUME ENTRY WITH CE HI, OTHERS UNDEFINED
|
|
; 1) SET RD HI AND CLOCK LOW
|
|
; 3) WAIT 250NS (CLOCK PUTS DATA BIT ON BUS)
|
|
; 4) READ DATA BIT
|
|
; 5) SET CLOCK HI
|
|
; 6) WAIT 250NS
|
|
; 7) LOOP FOR 8 DATA BITS
|
|
; 8) EXIT WITH CE,CLK,RD HI
|
|
;
|
|
DSRTC_GET:
|
|
LD E,0 ; INITIALIZE WORKING VALUE TO 0
|
|
LD B,8 ; LOOP FOR 8 BITS
|
|
#IF (DSRTCMODE == DSRTCMODE_MFPIC)
|
|
AND ~DSRTC_WR ; SET READ MODE
|
|
#ELSE
|
|
OR DSRTC_RD ; SET READ MODE
|
|
#ENDIF
|
|
DSRTC_GET1:
|
|
AND ~DSRTC_CLK ; SET CLK LO
|
|
OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
|
|
CALL DLY1 ; DELAY 2 * 27 T-STATES
|
|
PUSH AF ; SAVE PORT VALUE
|
|
IN A,(DSRTC_BASE) ; READ THE RTC PORT
|
|
RRA ; DATA BIT TO CARRY
|
|
RR E ; SHIFT INTO WORKING VALUE
|
|
POP AF ; RESTORE PORT VALUE
|
|
OR DSRTC_CLK ; CLOCK BACK TO HI
|
|
OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
|
|
CALL DLY1 ; DELAY 27 T-STATES
|
|
DJNZ DSRTC_GET1 ; LOOP IF NOT DONE (13)
|
|
RET
|
|
;
|
|
; COMPLETE A COMMAND SEQUENCE
|
|
; FINISHES UP A COMMAND SEQUENCE.
|
|
; DOES NOT DESTROY ANY REGISTERS.
|
|
;
|
|
; 1) SET ALL LINES BACK TO QUIESCENT STATE
|
|
;
|
|
DSRTC_END:
|
|
LD A,(RTCVAL) ; INIT A WITH QUIESCENT STATE
|
|
OUT (DSRTC_BASE),A ; WRITE TO PORT
|
|
RET ; RETURN
|
|
;
|
|
; WORKING VARIABLES
|
|
;
|
|
DSRTC_STAT .DB 0 ; DEVICE STATUS (0=OK)
|
|
DSRTC_TEMP .DB 0 ; TEMP VALUE STORAGE
|
|
;
|
|
; DSRTC_BUF IS USED FOR BURST READ/WRITE OF CLOCK DATA TO DS-1302
|
|
; FIELDS BELOW MATCH ORDER OF DS-1302 FIELDS (BCD)
|
|
;
|
|
DSRTC_BUF:
|
|
DSRTC_SEC .DB 0 ; SECOND
|
|
DSRTC_MIN .DB 0 ; MINUTE
|
|
DSRTC_HR .DB 0 ; HOUR
|
|
DSRTC_DT .DB 0 ; DATE
|
|
DSRTC_MON .DB 0 ; MONTH
|
|
DSRTC_DAY .DB 0 ; DAY OF WEEK
|
|
DSRTC_YR .DB 0 ; YEAR
|
|
;
|
|
; DSRTC_TIMBUF IS TEMP BUF USED TO STORE TIME TEMPORARILY TO DISPLAY
|
|
; IT.
|
|
;
|
|
DSRTC_TIMBUF .FILL 6,0 ; 6 BYTES FOR GETTIM
|
|
;
|
|
; DSRTC_TIMDEF IS DEFAULT TIME VALUE TO INITIALIZE CLOCK IF IT IS
|
|
; NOT RUNNING.
|
|
;
|
|
DSRTC_TIMDEF: ; DEFAULT TIME VALUE TO INIT CLOCK
|
|
.DB $00,$01,$01 ; 2000-01-01
|
|
.DB $00,$00,$00 ; 00:00:00
|
|
|