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108 lines
2.9 KiB
108 lines
2.9 KiB
;
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;=======================================================================
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; HDIAG SIO Driver
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;=======================================================================
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;
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; Assumes the UART port conventions for RCBus. Command/status port
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; at $80 and read/write data port at $81.
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; Assuming a UART clock frequency of 1.8432 MHz, the baud rate
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; will be 38400.
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;
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sio_cmd .equ $80 ; SIO command/status port
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sio_dat .equ $81 ; SIO read/write port
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;
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sio_jptbl:
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jp sio_cinit ; Initialize serial port
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jp sio_cin ; Read byte
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jp sio_cout ; Write byte
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jp sio_cist ; Input status
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jp sio_cost ; Output Status
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;
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;
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;
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sio_cinit:
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; Detect SIO here...
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; Zero the int vector register
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ld a,2 ; select WR2 (int vector)
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out (sio_cmd+2),a ; do it
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xor a ; zero accum
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out (sio_cmd+2),a ; write to WR2
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; Read the int vector register and check for zero
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ld a,2 ; select WR2 (int vector)
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out (sio_cmd+2),a ; do it
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in a,(sio_cmd+2) ; get int vector value
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and $F0 ; only top nibble
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ret nz ; abort if not zero
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; Set test value in int vector register
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ld a,2 ; select WR2 (int vector)
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out (sio_cmd+2),a ; do it
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ld a,$FF ; test value
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out (sio_cmd+2),a ; write to WR2
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; Read the int vector register to confirm value written
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ld a,2 ; select WR2 (int vector)
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out (sio_cmd+2),a ; do it
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in a,(sio_cmd+2) ; get int vector value
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and $F0 ; only top nibble
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cp $F0 ; compare
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ret nz ; abort if miscompare
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;
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; Program the SIO, just channel A
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ld c,sio_cmd ; command port
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ld hl,sio_initregs ; point to init values
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ld b,sio_initlen ; count of bytes to write
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otir ; write all values
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;
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xor a ; signal success
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ret ; done
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;
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;
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;
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sio_cin:
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call sio_cist ; check for char ready
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jr z,sio_cin ; if not, loop
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in a,(sio_dat) ; read byte
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ret ; done
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;
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;
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;
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sio_cout:
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push af ; save incoming
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sio_cout1:
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call sio_cost ; ready for char?
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jr z,sio_cout1 ; loop if not
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pop af ; restore incoming
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out (sio_dat),a ; write byte
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ret ; and done
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;
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;
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;
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sio_cist:
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xor a ; select WR0
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out (sio_cmd),a ; do it
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in a,(sio_cmd) ; get status
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and $01 ; isolate rx ready
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ret ; a != 0 if rx ready, else 0
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;
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;
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;
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sio_cost:
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xor a ; select WR0
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out (sio_cmd),a ; do it
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in a,(sio_cmd) ; get status
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and $04 ; isolate tx ready (empty)
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ret ; a != 0 if tx ready, else 0
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;
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; Table for chip register initialization. Simple setup for clock
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; divided by 64. Assuming a system clock of 7.3728 MHz, this will
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; result in a baud rate of 115200 which is standard for RCBus.
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;
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sio_initregs:
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.db $00, $18 ; wr0: channel reset cmd
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.db $04, $C4 ; wr4: clk baud parity stop bit
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.db $01, $00 ; wr1: no interrupts
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.db $02, $00 ; wr2: im2 vec offset
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.db $03, $E1 ; wr3: 8 bit rcv, cts/dcd auto, rx enable
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.db $05, $EA ; wr5: dtr, 8 bits send, tx enable, rts 1 11 0 1 0 1 0 (1=dtr,11=8bits,0=sendbreak,1=txenable,0=sdlc,1=rts,0=txcrc)
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;
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sio_initlen .equ $-sio_initregs
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