diff --git a/ReadMe.txt b/ReadMe.txt index f43f4536..46a5f004 100644 --- a/ReadMe.txt +++ b/ReadMe.txt @@ -7,7 +7,7 @@ *********************************************************************** Wayne Warthen (wwarthen@gmail.com) -Version 2.9.1-pre.8, 2019-02-18 +Version 2.9.1-pre.9, 2019-02-19 https://www.retrobrewcomputers.org/ RomWBW is a ROM-based implementation of CP/M-80 2.2 and Z-System for diff --git a/Source/CBIOS/ver.inc b/Source/CBIOS/ver.inc index fd364f7a..b652cc9d 100644 --- a/Source/CBIOS/ver.inc +++ b/Source/CBIOS/ver.inc @@ -2,4 +2,4 @@ #DEFINE RMN 9 #DEFINE RUP 1 #DEFINE RTP 0 -#DEFINE BIOSVER "2.9.1-pre.8" +#DEFINE BIOSVER "2.9.1-pre.9" diff --git a/Source/HBIOS/acia.asm b/Source/HBIOS/acia.asm index 7cfb5691..b0b0fa8b 100644 --- a/Source/HBIOS/acia.asm +++ b/Source/HBIOS/acia.asm @@ -51,6 +51,8 @@ ACIA_RTSOFF .EQU %11010110 ; RCV INT, RTS DEASSERTED, 8N1, CLK/64 BAUD ACIA_PREINIT: ; ; SETUP THE DISPATCH TABLE ENTRIES +; NOTE: INTS WILL BE DISABLED WHEN PREINIT IS CALLED AND THEY MUST REMIAIN +; DISABLED. ; LD B,ACIA_CNT ; LOOP CONTROL LD C,0 ; PHYSICAL UNIT INDEX @@ -116,7 +118,9 @@ ACIA_INITUNIT: ; SET DEFAULT CONFIG LD DE,-1 ; LEAVE CONFIG ALONE - JP ACIA_INITDEV ; IMPLEMENT IT AND RETURN + ; CALL INITDEV TO IMPLEMENT CONFIG, BUT NOTE THAT WE CALL + ; THE INITDEV ENTRY POINT THAT DOES NOT ENABLE/DISABLE INTS! + JP ACIA_INITDEVX ; IMPLEMENT IT AND RETURN ; ; ; @@ -167,7 +171,8 @@ ACIAA_INT00: LD E,A ; SAVE BYTE READ LD A,(ACIAA_BUFCNT) ; GET CURRENT BUFFER USED COUNT CP ACIAA_BUFSZ ; COMPARE TO BUFFER SIZE - RET Z ; BAIL OUT IF BUFFER FULL, RCV BYTE DISCARDED + ;RET Z ; BAIL OUT IF BUFFER FULL, RCV BYTE DISCARDED + JR Z,ACIAA_INT2 ; BAIL OUT IF BUFFER FULL, RCV BYTE DISCARDED INC A ; INCREMENT THE COUNT LD (ACIAA_BUFCNT),A ; AND SAVE IT CP ACIAA_BUFSZ - 5 ; BUFFER GETTING FULL? @@ -186,6 +191,7 @@ ACIAA_INT1: INC HL ; INCREMENT HEAD POINTER LD (ACIAA_HD),HL ; SAVE IT ; +ACIAA_INT2: ; CHECK FOR MORE PENDING... IN A,(C) ; GET STATUS RRA ; READY BIT TO CF @@ -210,7 +216,8 @@ ACIAB_INT00: LD E,A ; SAVE BYTE READ LD A,(ACIAB_BUFCNT) ; GET CURRENT BUFFER USED COUNT CP ACIAB_BUFSZ ; COMPARE TO BUFFER SIZE - RET Z ; BAIL OUT IF BUFFER FULL, RCV BYTE DISCARDED + ;RET Z ; BAIL OUT IF BUFFER FULL, RCV BYTE DISCARDED + JR Z,ACIAB_INT2 ; BAIL OUT IF BUFFER FULL, RCV BYTE DISCARDED INC A ; INCREMENT THE COUNT LD (ACIAB_BUFCNT),A ; AND SAVE IT CP ACIAB_BUFSZ - 5 ; BUFFER GETTING FULL? @@ -229,6 +236,7 @@ ACIAB_INT1: INC HL ; INCREMENT HEAD POINTER LD (ACIAB_HD),HL ; SAVE IT ; +ACIAB_INT2: ; CHECK FOR MORE PENDING... IN A,(C) ; GET STATUS RRA ; READY BIT TO CF @@ -396,6 +404,14 @@ ACIA_OST: ; ACIA_INITDEV: HB_DI ; AVOID CONFLICTS + CALL ACIA_INITDEVX ; DO THE REAL WORK + HB_EI ; INTS BACK ON + RET ; DONE +; +ACIA_INITDEVX: +; +; THIS ENTRY POINT BYPASSES DISABLING/ENABLING INTS WHICH IS REQUIRED BY +; PREINIT ABOVE. PREINIT IS NOT ALLOWED TO ENABLE INTS! ; ; PROGRAM THE ACIA CHIP LD C,(IY+3) ; COMMAND PORT @@ -428,7 +444,6 @@ ACIA_INITDEV: ; #ENDIF ; - HB_EI ; READY FOR INTS AGAIN XOR A ; SIGNAL SUCCESS RET ; RETURN ; diff --git a/Source/HBIOS/dsrtc.asm b/Source/HBIOS/dsrtc.asm index 65b9a961..690b7ea1 100644 --- a/Source/HBIOS/dsrtc.asm +++ b/Source/HBIOS/dsrtc.asm @@ -206,9 +206,13 @@ DSRTC_GETTIM: LD HL,DSRTC_TIMBUF ; SOURCE ADR POP DE ; DEST ADR LD BC,6 ; LENGTH IS 6 BYTES - HB_IM1DI +#IF (INTMODE == 1) + DI +#ENDIF CALL HB_BNKCPY ; COPY THE CLOCK DATA - HB_IM1EI +#IF (INTMODE == 1) + EI +#ENDIF ; ; CLEAN UP AND RETURN XOR A ; SIGNAL SUCCESS @@ -229,9 +233,13 @@ DSRTC_SETTIM: LD (HB_DSTBNK),A ; SET IT LD DE,DSRTC_TIMBUF ; DEST ADR LD BC,6 ; LENGTH IS 6 BYTES - HB_IM1DI +#IF (INTMODE == 1) + DI +#ENDIF CALL HB_BNKCPY ; COPY THE CLOCK DATA - HB_IM1EI +#IF (INTMODE == 1) + EI +#ENDIF ; ; WRITE TO CLOCK LD HL,DSRTC_TIMBUF ; POINT TO TIME BUFFER diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm index 786d6838..a23f8e15 100644 --- a/Source/HBIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -84,24 +84,17 @@ MODCNT .SET MODCNT + 1 ; #IF (INTMODE == 0) ; NO INTERRUPT HANDLING -#DEFINE HB_DI DI +#DEFINE HB_DI ; #DEFINE HB_EI ; -#DEFINE HB_IM1DI ; -#DEFINE HB_IM1EI ; #ENDIF -#IF (INTMODE == 1) -; MODE 1 INTERRUPT HANDLING +#IF ((INTMODE == 1) | (INTMODE == 2)) +; MODE 1 OR 2 INTERRUPT HANDLING #DEFINE HB_DI DI #DEFINE HB_EI EI -#DEFINE HB_IM1DI DI -#DEFINE HB_IM1EI EI #ENDIF -#IF (INTMODE == 2) -; MODE 2 INTERRUPT HANDLING -#DEFINE HB_DI DI -#DEFINE HB_EI EI -#DEFINE HB_IM1DI ; -#DEFINE HB_IM1EI ; +#IF (INTMODE > 2) + .ECHO "*** ERROR: INVALID INTMODE SETTING!!!\n" + !!! ; FORCE AN ASSEMBLY ERROR #ENDIF ; ; @@ -597,7 +590,7 @@ HBX_INT_SP .EQU $ - 2 POP HL ; RESTORE HL - EI ; ENABLE INTERRUPTS + HB_EI ; ENABLE INTERRUPTS RETI ; AND RETURN ; #ENDIF @@ -2016,13 +2009,13 @@ HB_TIMINT2: HB_BADINT: #IF 0 ; *DEBUG* - ;LD HL,HB_BADINTCNT - ;INC (HL) - ;LD A,(HL) - ;OUT (DIAGP),A - ;OR $FF - ;RET -;HB_BADINTCNT .DB 0 + LD HL,HB_BADINTCNT + INC (HL) + LD A,(HL) + OUT (DIAGP),A + OR $FF + RET +HB_BADINTCNT .DB 0 #ENDIF ; *DEBUG* CALL NEWLINE2 diff --git a/Source/HBIOS/md.asm b/Source/HBIOS/md.asm index ff831f39..6eb27aad 100644 --- a/Source/HBIOS/md.asm +++ b/Source/HBIOS/md.asm @@ -246,9 +246,13 @@ MD_RDSEC: LD A,B ; GET DESTINATION BANK LD (HB_DSTBNK),A ; SET IT POP BC - HB_IM1DI +#IF (INTMODE == 1) + DI +#ENDIF CALL HB_BNKCPY ; DO THE INTERBANK COPY - HB_IM1EI +#IF (INTMODE == 1) + EI +#ENDIF XOR A RET ; @@ -274,9 +278,13 @@ MD_WRSEC: LD A,B ; GET DESTINATION BANK LD (HB_DSTBNK),A ; SET IT POP BC - HB_IM1DI +#IF (INTMODE == 1) + DI +#ENDIF CALL HB_BNKCPY ; DO THE INTERBANK COPY - HB_IM1EI +#IF (INTMODE == 1) + EI +#ENDIF XOR A RET ; diff --git a/Source/HBIOS/simrtc.asm b/Source/HBIOS/simrtc.asm index 9be44518..2962f098 100644 --- a/Source/HBIOS/simrtc.asm +++ b/Source/HBIOS/simrtc.asm @@ -71,9 +71,13 @@ SIMRTC_GETTIM: LD HL,SIMRTC_BUF ; SOURCE ADR POP DE ; DEST ADR LD BC,SIMRTC_BUFSIZ ; LENGTH - HB_IM1DI +#IF (INTMODE == 1) + DI +#ENDIF CALL HB_BNKCPY ; COPY THE CLOCK DATA - HB_IM1EI +#IF (INTMODE == 1) + EI +#ENDIF ; LD DE,60 ; DELAY 60 * 16US = ~1MS CALL VDELAY ; SLOW DOWN SIMH FOR CLOCK TICKING TEST @@ -103,9 +107,13 @@ SIMRTC_SETTIM: LD (HB_DSTBNK),A ; SET IT LD DE,SIMRTC_BUF ; DEST ADR LD BC,SIMRTC_BUFSIZ ; LENGTH - HB_IM1DI +#IF (INTMODE == 1) + DI +#ENDIF CALL HB_BNKCPY ; COPY THE CLOCK DATA - HB_IM1EI +#IF (INTMODE == 1) + EI +#ENDIF ; LD HL,SIMRTC_BUF ; POINT TO TEMP BUF LD A,SIMRTC_CLKWRITE ; WRITE CLOCK COMMAND diff --git a/Source/HBIOS/sio.asm b/Source/HBIOS/sio.asm index 6d3970e4..e5a44ab7 100644 --- a/Source/HBIOS/sio.asm +++ b/Source/HBIOS/sio.asm @@ -47,6 +47,8 @@ SIOB_DAT .EQU SIOBASE + $05 SIO_PREINIT: ; ; SETUP THE DISPATCH TABLE ENTRIES +; NOTE: INTS WILL BE DISABLED WHEN PREINIT IS CALLED AND THEY MUST REMIAIN +; DISABLED. ; LD B,SIO_CNT ; LOOP CONTROL LD C,0 ; PHYSICAL UNIT INDEX @@ -115,7 +117,9 @@ SIO_INITUNIT: ; SET DEFAULT CONFIG LD DE,-1 ; LEAVE CONFIG ALONE - JP SIO_INITDEV ; IMPLEMENT IT AND RETURN + ; CALL INITDEVX TO IMPLEMENT CONFIG, BUT NOTE THAT WE CALL + ; THE INITDEVX ENTRY POINT THAT DOES NOT ENABLE/DISABLE INTS! + JP SIO_INITDEVX ; IMPLEMENT IT AND RETURN ; ; ; @@ -164,7 +168,8 @@ SIOA_INT00: LD E,A ; SAVE BYTE READ LD A,(SIOA_CNT) ; GET CURRENT BUFFER USED COUNT CP SIOA_BUFSZ ; COMPARE TO BUFFER SIZE - RET Z ; BAIL OUT IF BUFFER FULL, RCV BYTE DISCARDED + ;RET Z ; BAIL OUT IF BUFFER FULL, RCV BYTE DISCARDED + JR Z,SIOA_INT2 ; BAIL OUT IF BUFFER FULL, RCV BYTE DISCARDED INC A ; INCREMENT THE COUNT LD (SIOA_CNT),A ; AND SAVE IT CP SIOA_BUFSZ - 5 ; BUFFER GETTING FULL? @@ -185,6 +190,7 @@ SIOA_INT1: INC HL ; INCREMENT HEAD POINTER LD (SIOA_HD),HL ; SAVE IT ; +SIOA_INT2: ; CHECK FOR MORE PENDING... XOR A ; A := 0 OUT (SIOA_CMD),A ; ADDRESS RD0 @@ -208,7 +214,8 @@ SIOB_INT00: LD E,A ; SAVE BYTE READ LD A,(SIOB_CNT) ; GET CURRENT BUFFER USED COUNT CP SIOB_BUFSZ ; COMPARE TO BUFFER SIZE - RET Z ; BAIL OUT IF BUFFER FULL, RCV BYTE DISCARDED + ;RET Z ; BAIL OUT IF BUFFER FULL, RCV BYTE DISCARDED + JR Z,SIOB_INT2 ; BAIL OUT IF BUFFER FULL, RCV BYTE DISCARDED INC A ; INCREMENT THE COUNT LD (SIOB_CNT),A ; AND SAVE IT CP SIOB_BUFSZ - 5 ; BUFFER GETTING FULL? @@ -229,6 +236,7 @@ SIOB_INT1: INC HL ; INCREMENT HEAD POINTER LD (SIOB_HD),HL ; SAVE IT ; +SIOB_INT2: ; CHECK FOR MORE PENDING... XOR A ; A := 0 OUT (SIOB_CMD),A ; ADDRESS RD0 @@ -418,7 +426,20 @@ SIO_OST: ; MARK & SPACE PARITY AND 1.5 STOP BITS IS NOT SUPPORTED BY THE SIO. ; INITIALIZATION WILL NOT BE COMPLETED IF AN INVALID SETTING IS DETECTED. ; +; NOTE THAT THERE ARE TWO ENTRY POINTS. INITDEV WILL DISABLE/ENABLE INTS +; AND INITDEVX WILL NOT. THIS IS DONE SO THAT THE PREINIT ROUTINE ABOVE +; CAN AVOID ENABLING/DISABLING INTS. +; SIO_INITDEV: + HB_DI ; DISABLE INTS + CALL SIO_INITDEVX ; DO THE WORK + HB_EI ; INTS BACK ON + RET ; DONE +; +SIO_INITDEVX: +; +; THIS ENTRY POINT BYPASSES DISABLING/ENABLING INTS WHICH IS REQUIRED BY +; PREINIT ABOVE. PREINIT IS NOT ALLOWED TO ENABLE INTS! ; ; TEST FOR -1 WHICH MEANS USE CURRENT CONFIG (JUST REINIT) LD A,D ; TEST DE FOR @@ -547,8 +568,6 @@ BROK: LD (IY+4),E ; SAVE LOW WORD LD (IY+5),D ; SAVE HI WORD - - HB_DI ; AVOID CONFLICTS ; ; PROGRAM THE SIO CHIP CHANNEL LD C,(IY+3) ; COMMAND PORT @@ -580,7 +599,6 @@ BROK: ; #ENDIF ; - HB_EI ; READY FOR INTS AGAIN XOR A ; SIGNAL SUCCESS RET ; RETURN ; diff --git a/Source/HBIOS/ver.inc b/Source/HBIOS/ver.inc index fd364f7a..b652cc9d 100644 --- a/Source/HBIOS/ver.inc +++ b/Source/HBIOS/ver.inc @@ -2,4 +2,4 @@ #DEFINE RMN 9 #DEFINE RUP 1 #DEFINE RTP 0 -#DEFINE BIOSVER "2.9.1-pre.8" +#DEFINE BIOSVER "2.9.1-pre.9"