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Pegasys-RomWBW
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Minors

patch
b1ackmai1er 3 years ago
parent
9d1cfd4a22
commit
19101fda39
16 changed files with 16 additions and 16 deletions
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  1. 2
      Source/HBIOS/Config/SBC_max.asm
  2. 2
      Source/HBIOS/cfg_dyno.asm
  3. 2
      Source/HBIOS/cfg_ezz80.asm
  4. 2
      Source/HBIOS/cfg_master.asm
  5. 2
      Source/HBIOS/cfg_mbc.asm
  6. 2
      Source/HBIOS/cfg_mk4.asm
  7. 2
      Source/HBIOS/cfg_n8.asm
  8. 2
      Source/HBIOS/cfg_rcz180.asm
  9. 2
      Source/HBIOS/cfg_rcz280.asm
  10. 2
      Source/HBIOS/cfg_rcz80.asm
  11. 2
      Source/HBIOS/cfg_rph.asm
  12. 2
      Source/HBIOS/cfg_sbc.asm
  13. 2
      Source/HBIOS/cfg_scz180.asm
  14. 2
      Source/HBIOS/cfg_zeta.asm
  15. 2
      Source/HBIOS/cfg_zeta2.asm
  16. 2
      Source/HBIOS/hbios.asm

2
Source/HBIOS/Config/SBC_max.asm
View File

@ -64,4 +64,4 @@ PRPENABLE .SET TRUE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
;
SN7ENABLE .SET TRUE ; SN : SN76489 DRIVER
SN76489ENABLE .SET TRUE ; SN : SN76489 DRIVER

2
Source/HBIOS/cfg_dyno.asm
View File

@ -34,7 +34,7 @@ DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

2
Source/HBIOS/cfg_ezz80.asm
View File

@ -34,7 +34,7 @@ DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

2
Source/HBIOS/cfg_master.asm
View File

@ -31,7 +31,7 @@ DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_NONE ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

2
Source/HBIOS/cfg_mbc.asm
View File

@ -34,7 +34,7 @@ DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_MBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)

2
Source/HBIOS/cfg_mk4.asm
View File

@ -34,7 +34,7 @@ DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

2
Source/HBIOS/cfg_n8.asm
View File

@ -34,7 +34,7 @@ DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_N8 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
RAMBIAS .EQU 0 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
RAMLOC .EQU 0 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE

2
Source/HBIOS/cfg_rcz180.asm
View File

@ -34,7 +34,7 @@ DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

2
Source/HBIOS/cfg_rcz280.asm
View File

@ -34,7 +34,7 @@ DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

2
Source/HBIOS/cfg_rcz80.asm
View File

@ -34,7 +34,7 @@ DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

2
Source/HBIOS/cfg_rph.asm
View File

@ -34,7 +34,7 @@ DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_RPH ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
RAMBIAS .EQU 0 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
RAMLOC .EQU 0 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE

2
Source/HBIOS/cfg_sbc.asm
View File

@ -34,7 +34,7 @@ DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)

2
Source/HBIOS/cfg_scz180.asm
View File

@ -34,7 +34,7 @@ DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
RAMLOC .EQU 19 ; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
RAMBIAS .EQU (1 << (RAMLOC - 10)) ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE

2
Source/HBIOS/cfg_zeta.asm
View File

@ -34,7 +34,7 @@ DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)

2
Source/HBIOS/cfg_zeta2.asm
View File

@ -34,7 +34,7 @@ DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
ROMSIZE_CHK .EQU 0 ; ROMSIZE VALUE VERIFICATION (0=DISABLED)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

2
Source/HBIOS/hbios.asm
View File

@ -90,7 +90,7 @@ MODCNT .SET MODCNT + 1
; SOME HARDWARE REQUIRES A SPECIFIC ROMSIZE (NOTABLY ZZRCC) OR THE
; RESULTING BUILD IMAGES WILL BE CORRUPT. ROMSIZE_CHK IS SPECIFIED
; IN THE CONFIG FILE AND IS VERIFIED AGAINST THE ROMSIZE BEING USED
; BY THE BUILD. A ROMSIZE_CHK VALUE OF 0 INDICATES THE VERFICATION
; BY THE BUILD. A ROMSIZE_CHK VALUE OF 0 INDICATES THE VERIFICATION
; IS DISABLED (WHICH IT USUALLY IS).
;
#IF (ROMSIZE_CHK != 0) & (ROMSIZE != ROMSIZE_CHK)

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