From 21df9d8797010a766ffae91b264912c664ef6184 Mon Sep 17 00:00:00 2001 From: Wayne Warthen Date: Sat, 20 Jul 2024 17:27:59 -0700 Subject: [PATCH] Missing Files --- Source/HBIOS/Config/ZETA2_std.asm | 3 --- Source/HBIOS/Config/ZETA_std.asm | 3 --- Source/HBIOS/uart.asm | 12 ++++++------ 3 files changed, 6 insertions(+), 12 deletions(-) diff --git a/Source/HBIOS/Config/ZETA2_std.asm b/Source/HBIOS/Config/ZETA2_std.asm index 0245bfd5..112d0f6c 100644 --- a/Source/HBIOS/Config/ZETA2_std.asm +++ b/Source/HBIOS/Config/ZETA2_std.asm @@ -30,9 +30,6 @@ CPUOSC .SET 8000000 ; CPU OSC FREQ IN MHZ INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2 CRTACT .SET TRUE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP ; -UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) -UARTSBC .SET TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART -; FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_ZETA2 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC] ; diff --git a/Source/HBIOS/Config/ZETA_std.asm b/Source/HBIOS/Config/ZETA_std.asm index d422cab9..182fc4d2 100644 --- a/Source/HBIOS/Config/ZETA_std.asm +++ b/Source/HBIOS/Config/ZETA_std.asm @@ -30,9 +30,6 @@ CPUOSC .SET 8000000 ; CPU OSC FREQ IN MHZ INTMODE .SET 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2 CRTACT .SET TRUE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP ; -UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) -UARTSBC .SET TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART -; FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) FDMODE .SET FDMODE_ZETA ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC] ; diff --git a/Source/HBIOS/uart.asm b/Source/HBIOS/uart.asm index 0664bd2c..f5444ee6 100644 --- a/Source/HBIOS/uart.asm +++ b/Source/HBIOS/uart.asm @@ -1000,12 +1000,12 @@ UART_CFG: ; #IF (UARTCNT >= 1) UART0_CFG: - .DB 0 ; DEVICE NUMBER (SET DURING INIT) - .DB 0 ; UART TYPE (SET DURING INIT) - .DB UART0BASE ; IO PORT BASE (RBR, THR) - .DB UART0BASE + UART_LSR ; LINE STATUS PORT (LSR) - .DW UART0CFG ; LINE CONFIGURATION - .DW UART0_RCVBUF ; POINTER TO RCV BUFFER STRUCT + .DB 0 ; DEVICE NUMBER (SET DURING INIT) ; +0 + .DB 0 ; UART TYPE (SET DURING INIT) ; +1 + .DB UART0BASE ; IO PORT BASE (RBR, THR) ; +2 + .DB UART0BASE + UART_LSR ; LINE STATUS PORT (LSR) ; +3 + .DW UART0CFG ; LINE CONFIGURATION ; +4 + .DW UART0_RCVBUF ; POINTER TO RCV BUFFER STRUCT ; +6 ; DEVECHO "UART: IO=" DEVECHO UART0BASE