Rename ZZRC -> ZZRCC, Update to CLRDIR

- The naming of ZZRCC was incorrectly ZZRC. Corrected. - Max Scane has provided a small bug fix for CLRDIR. - Minor build updates for new HTalk utility.
2023-10-08 17:57:58 -07:00
parent 76867b8351
commit 25fb2bd59e
58 changed files with 285 additions and 197 deletions
--- a/Applications.pdf
+++ b/Applications.pdf
--- a/Catalog.pdf
+++ b/Catalog.pdf
--- a/Errata.pdf
+++ b/Errata.pdf
--- a/Applications.pdf
+++ b/Applications.pdf
--- a/Doc/RomWBW
+++ b/Doc/RomWBW
--- a/Doc/RomWBW
+++ b/Doc/RomWBW
--- a/ReadMe.md
+++ b/ReadMe.md
@@ -3,7 +3,7 @@
 **RomWBW ReadMe** \
 Version 3.4 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-07 Oct 2023
+08 Oct 2023

 # Overview

--- a/ReadMe.txt
+++ b/ReadMe.txt
@@ -1,6 +1,6 @@
 RomWBW ReadMe
 Wayne Warthen (wwarthen@gmail.com)
-07 Oct 2023
+08 Oct 2023



--- a/Source/Apps/Build.cmd
+++ b/Source/Apps/Build.cmd
@@ -32,6 +32,7 @@ pushd Dev && call Build || exit /b & popd
 pushd VGM && call Build || exit /b & popd
 pushd cpuspd && call Build || exit /b & popd
 pushd Survey && call Build || exit /b & popd
+pushd HTalk && call Build || exit /b & popd

 copy *.com %APPBIN%\ || exit /b

--- a/Source/Apps/Clean.cmd
+++ b/Source/Apps/Clean.cmd
@@ -18,3 +18,4 @@ pushd Dev && call Clean || exit /b 1 & popd
 pushd VGM && call Clean || exit /b 1 & popd
 pushd cpuspd && call Clean || exit /b 1 & popd
 pushd Survey && call Clean || exit /b 1 & popd
+pushd HTalk && call Clean || exit /b 1 & popd
--- a/Source/Apps/HTalk/Clean.cmd
+++ b/Source/Apps/HTalk/Clean.cmd
@@ -1,7 +1,5 @@
@echo off
 setlocal

-if exist dev.com del dev.com
-if exist *.hex del *.hex
+if exist *.com del *.com
 if exist *.lst del *.lst
-if exist *.zip del *.zip
--- a/Source/Build.cmd
+++ b/Source/Build.cmd
@@ -8,7 +8,7 @@ call BuildShared || exit /b
 call BuildImages || exit /b
 call BuildROM %* || exit /b
 call BuildZRC || exit /b
-call BuildZZRC || exit /b
+call BuildZZRCC || exit /b

 if "%1" == "dist" (
  call Clean || exit /b
--- a/Source/BuildZZRC.cmd
+++ b/Source/BuildZZRC.cmd
@@ -1,4 +0,0 @@
-@echo off
-setlocal
-
-pushd ZZRC && call Build || exit /b & popd
--- a/Source/BuildZZRCC.cmd
+++ b/Source/BuildZZRCC.cmd
@@ -0,0 +1,4 @@
+@echo off
+setlocal
+
+pushd ZZRCC && call Build || exit /b & popd
--- a/Source/Clean.cmd
+++ b/Source/Clean.cmd
@@ -22,4 +22,4 @@ pushd Prop && call Clean & popd
 pushd RomDsk && call Clean & popd
 pushd Doc && call Clean & popd
 pushd ZRC && call Clean & popd
-pushd ZZRC && call Clean & popd
+pushd ZZRCC && call Clean & popd
--- a/Source/Doc/Applications.md
+++ b/Source/Doc/Applications.md
@@ -52,6 +52,7 @@ found:
 | FAT         | No       | Yes        | Yes      |
 | TUNE        | No       | Yes        | Yes      |
 | WDATE       | No       | Yes        | Yes      |
+| HTALK       | No       | Yes        | Yes      |

 `\clearpage`{=latex}

@@ -628,9 +629,9 @@ shown on your console.  The `TALK` application does this.
 `TALK` operates at the operating system level (not HBIOS).

 The parameter to `TALK` refers to logical CP/M serial devices.  Upon
-execution all characters types at the console will be sent to the
+execution all characters typed at the console will be sent to the
 device specified and all characters received by the specified device
-will be echoes on the console.
+will be echoed on the console.

 Press Control+Z on the console to terminate the application.

@@ -646,6 +647,36 @@ provided in the RomWBW distribution.

 `\clearpage`{=latex}

+# HTALK
+
+`HTALK` is a variation of the `TALK` utility, but it works directly
+against HBIOS Character Units.
+
+## Syntax
+
+`HTALK COMn:`
+
+## Usage
+
+`HTALK` operates at the HBIOS level.
+
+The parameter to `TALK` refers to a HBIOS character unit.  Upon
+execution all characters typed at the console will be sent to the
+device specified and all characters received by the specified device
+will be echoed on the console.
+
+Press Control+Z on the console to terminate the application.
+
+## Notes
+
+
+## Etymology
+
+The `TALK` command was created and donated to RomWBW by Tom Plano.  It
+is an original product designed specifically for RomWBW.
+
+`\clearpage`{=latex}
+
 # RTC

 Many RomWBW systems provide real time clock hardware.  The RTC
--- a/Source/Doc/UserGuide.md
+++ b/Source/Doc/UserGuide.md
@@ -4012,7 +4012,7 @@ the RomWBW HBIOS configuration.
 |-------------------|--------------------|
 | ROM Image Files   | RCZ80_zrc.rom      |
 | Console Baud Rate | 115200             |
-| Interrupts        | Mode 1        |
+| Interrupts        | Mode 1             |

 - CPU speed is detected at startup if DS1302 RTC is active
   - Otherwise 14.7456 MHz assumed
--- a/Source/HBIOS/Build.cmd
+++ b/Source/HBIOS/Build.cmd
@@ -219,8 +219,8 @@ call Build RCZ180 nat || exit /b
 call Build RCZ280 ext || exit /b
 call Build RCZ280 nat || exit /b
 call Build RCZ280 zz80mb || exit /b
-call Build RCZ280 zzrc || exit /b
-call Build RCZ280 zzrc_ram || exit /b
+call Build RCZ280 zzrcc || exit /b
+call Build RCZ280 zzrcc_ram || exit /b
 call Build SCZ180 sc126 || exit /b
 call Build SCZ180 sc130 || exit /b
 call Build SCZ180 sc131 || exit /b
--- a/Source/HBIOS/Build.sh
+++ b/Source/HBIOS/Build.sh
@@ -18,8 +18,8 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
 	ROM_PLATFORM="RCZ280"; ROM_CONFIG="ext"; bash Build.sh
 	ROM_PLATFORM="RCZ280"; ROM_CONFIG="nat"; bash Build.sh
 	ROM_PLATFORM="RCZ280"; ROM_CONFIG="zz80mb"; bash Build.sh
-	ROM_PLATFORM="RCZ280"; ROM_CONFIG="zzrc"; bash Build.sh
-	ROM_PLATFORM="RCZ280"; ROM_CONFIG="zzrc_ram"; bash Build.sh
+	ROM_PLATFORM="RCZ280"; ROM_CONFIG="zzrcc"; bash Build.sh
+	ROM_PLATFORM="RCZ280"; ROM_CONFIG="zzrcc_ram"; bash Build.sh
 #	ROM_PLATFORM="RCZ80"; ROM_CONFIG="mt"; bash Build.sh
 #	ROM_PLATFORM="RCZ80"; ROM_CONFIG="duart"; bash Build.sh
 	ROM_PLATFORM="RCZ80"; ROM_CONFIG="std"; bash Build.sh
--- a/Source/HBIOS/Config/RCZ280_zzrcc.asm
+++ b/Source/HBIOS/Config/RCZ280_zzrcc.asm
@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   RCBUS Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY ON ZZRC)
+;   RCBUS Z280 ZZRCC CONFIGURATION
 ;==================================================================================================
 ;
 ; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@@ -22,7 +22,7 @@
 ; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
 ; DIRECTORIES ABOVE THIS ONE).
 ;
-#DEFINE PLATFORM_NAME "ZZRC", " [", CONFIG, "]"
+#DEFINE PLATFORM_NAME "ZZRCC", " [", CONFIG, "]"
 ;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
 ;
@@ -47,7 +47,7 @@ Z280_IOWAIT	.SET	1		; Z280: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 Z280_INTWAIT	.SET	0		; Z280: INT ACK WAIT STATUS (0-3)
 ;
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
-MDRAM		.SET	FALSE		; MD: ENABLE RAM DISK
+MDRAM		.SET	TRUE		; MD: ENABLE RAM DISK
 ;
 Z2UENABLE	.SET	TRUE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
 Z2UOSC		.SET	(CPUOSC / 8)	; Z2U: OSC FREQUENCY IN MHZ
--- a/Source/HBIOS/Config/RCZ280_zzrcc_ram.asm
+++ b/Source/HBIOS/Config/RCZ280_zzrcc_ram.asm
@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   RCBUS Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY ON ZZRC)
+;   RCBUS Z280 ZZRCC CONFIGURATION (ROMLESS)
 ;==================================================================================================
 ;
 ; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@@ -22,7 +22,7 @@
 ; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
 ; DIRECTORIES ABOVE THIS ONE).
 ;
-#DEFINE PLATFORM_NAME "ZZRC", " [", CONFIG, "]"
+#DEFINE PLATFORM_NAME "ZZRCC", " [", CONFIG, "]"
 ;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
 ;
--- a/Source/Images/Common/All/CLRDIR.COM
+++ b/Source/Images/Common/All/CLRDIR.COM
--- a/Source/Images/fd_bp.txt
+++ b/Source/Images/fd_bp.txt
@@ -22,6 +22,7 @@
 ../../Binary/Apps/syscopy.com 15:
 ../../Binary/Apps/sysgen.com 15:
 ../../Binary/Apps/talk.com 15:
+../../Binary/Apps/htalk.com 15:
 ../../Binary/Apps/tbasic.com 15:
 ../../Binary/Apps/timer.com 15:
 ../../Binary/Apps/tune.com 15:
--- a/Source/Images/fd_cpm22.txt
+++ b/Source/Images/fd_cpm22.txt
@@ -18,6 +18,7 @@ d_cpm22/ReadMe.txt 0:
 ../../Binary/Apps/syscopy.com 0:
 ../../Binary/Apps/sysgen.com 0:
 ../../Binary/Apps/talk.com 0:
+../../Binary/Apps/htalk.com 0:
 ../../Binary/Apps/tbasic.com 0:
 ../../Binary/Apps/timer.com 0:
 ../../Binary/Apps/tune.com 0:
--- a/Source/Images/fd_cpm3.txt
+++ b/Source/Images/fd_cpm3.txt
@@ -34,6 +34,7 @@
 ../../Binary/Apps/syscopy.com 0:
 #../../Binary/Apps/sysgen.com 0:
 #../../Binary/Apps/talk.com 0:
+#../../Binary/Apps/htalk.com 0:
 ../../Binary/Apps/tbasic.com 0:
 ../../Binary/Apps/timer.com 0:
 ../../Binary/Apps/tune.com 0:
--- a/Source/Images/fd_nzcom.txt
+++ b/Source/Images/fd_nzcom.txt
@@ -19,6 +19,7 @@ d_cpm22/u0/XSUB.COM 0:
 ../../Binary/Apps/rtc.com 0:
 ../../Binary/Apps/syscopy.com 0:
 ../../Binary/Apps/talk.com 0:
+../../Binary/Apps/htalk.com 0:
 ../../Binary/Apps/timer.com 0:
 ../../Binary/Apps/xm.com 0:
 #
--- a/Source/Images/fd_qpm.txt
+++ b/Source/Images/fd_qpm.txt
@@ -22,6 +22,7 @@ d_cpm22/u0/*.* 0:
 ../../Binary/Apps/syscopy.com 0:
 ../../Binary/Apps/sysgen.com 0:
 ../../Binary/Apps/talk.com 0:
+../../Binary/Apps/htalk.com 0:
 ../../Binary/Apps/tbasic.com 0:
 ../../Binary/Apps/timer.com 0:
 ../../Binary/Apps/tune.com 0:
--- a/Source/Images/fd_zpm3.txt
+++ b/Source/Images/fd_zpm3.txt
@@ -32,6 +32,7 @@
 ../../Binary/Apps/syscopy.com 15:
 ../../Binary/Apps/sysgen.com 15:
 ../../Binary/Apps/talk.com 15:
+#../../Binary/Apps/htalk.com 15:
 #../../Binary/Apps/tbasic.com 15:
 ../../Binary/Apps/timer.com 15:
 #../../Binary/Apps/tune.com 15:
--- a/Source/Images/fd_zsdos.txt
+++ b/Source/Images/fd_zsdos.txt
@@ -31,6 +31,7 @@ d_cpm22/u0/XSUB.COM 0:
 ../../Binary/Apps/syscopy.com 0:
 ../../Binary/Apps/sysgen.com 0:
 ../../Binary/Apps/talk.com 0:
+../../Binary/Apps/htalk.com 0:
 ../../Binary/Apps/tbasic.com 0:
 ../../Binary/Apps/timer.com 0:
 ../../Binary/Apps/tune.com 0:
--- a/Source/Images/hd_bp.txt
+++ b/Source/Images/hd_bp.txt
@@ -22,6 +22,7 @@
 ../../Binary/Apps/syscopy.com 15:
 ../../Binary/Apps/sysgen.com 15:
 ../../Binary/Apps/talk.com 15:
+../../Binary/Apps/htalk.com 15:
 ../../Binary/Apps/tbasic.com 15:
 ../../Binary/Apps/timer.com 15:
 ../../Binary/Apps/tune.com 15:
--- a/Source/Images/hd_cpm22.txt
+++ b/Source/Images/hd_cpm22.txt
@@ -18,6 +18,7 @@ d_cpm22/ReadMe.txt 0:
 ../../Binary/Apps/syscopy.com 0:
 ../../Binary/Apps/sysgen.com 0:
 ../../Binary/Apps/talk.com 0:
+../../Binary/Apps/htalk.com 0:
 ../../Binary/Apps/tbasic.com 0:
 ../../Binary/Apps/timer.com 0:
 ../../Binary/Apps/tune.com 0:
--- a/Source/Images/hd_cpm3.txt
+++ b/Source/Images/hd_cpm3.txt
@@ -34,6 +34,7 @@
 ../../Binary/Apps/syscopy.com 0:
 #../../Binary/Apps/sysgen.com 0:
 #../../Binary/Apps/talk.com 0:
+../../Binary/Apps/htalk.com 0:
 ../../Binary/Apps/tbasic.com 0:
 ../../Binary/Apps/timer.com 0:
 ../../Binary/Apps/tune.com 0:
--- a/Source/Images/hd_nzcom.txt
+++ b/Source/Images/hd_nzcom.txt
@@ -35,6 +35,7 @@ d_zsdos/u0/*.* 0:
 ../../Binary/Apps/syscopy.com 0:
 ../../Binary/Apps/sysgen.com 0:
 ../../Binary/Apps/talk.com 0:
+../../Binary/Apps/htalk.com 0:
 ../../Binary/Apps/tbasic.com 0:
 ../../Binary/Apps/timer.com 0:
 ../../Binary/Apps/tune.com 0:
--- a/Source/Images/hd_qpm.txt
+++ b/Source/Images/hd_qpm.txt
@@ -22,6 +22,7 @@ d_cpm22/u0/*.* 0:
 ../../Binary/Apps/syscopy.com 0:
 ../../Binary/Apps/sysgen.com 0:
 ../../Binary/Apps/talk.com 0:
+../../Binary/Apps/htalk.com 0:
 ../../Binary/Apps/tbasic.com 0:
 ../../Binary/Apps/timer.com 0:
 ../../Binary/Apps/tune.com 0:
--- a/Source/Images/hd_zpm3.txt
+++ b/Source/Images/hd_zpm3.txt
@@ -33,6 +33,7 @@
 ../../Binary/Apps/syscopy.com 15:
 ../../Binary/Apps/sysgen.com 15:
 ../../Binary/Apps/talk.com 15:
+../../Binary/Apps/htalk.com 15:
 ../../Binary/Apps/tbasic.com 15:
 ../../Binary/Apps/timer.com 15:
 ../../Binary/Apps/tune.com 15:
--- a/Source/Images/hd_zsdos.txt
+++ b/Source/Images/hd_zsdos.txt
@@ -31,6 +31,7 @@ d_cpm22/u0/XSUB.COM 0:
 ../../Binary/Apps/syscopy.com 0:
 ../../Binary/Apps/sysgen.com 0:
 ../../Binary/Apps/talk.com 0:
+../../Binary/Apps/htalk.com 0:
 ../../Binary/Apps/tbasic.com 0:
 ../../Binary/Apps/timer.com 0:
 ../../Binary/Apps/tune.com 0:
--- a/Source/Makefile
+++ b/Source/Makefile
@@ -24,9 +24,9 @@ ifeq ($(UNAME), Linux)
 # uname machine strings for building Propeller
 endif

-.PHONY: doc prop shared bp images rom zrc zzrc
+.PHONY: doc prop shared bp images rom zrc zzrcc

-all: prop shared images rom zrc zzrc
+all: prop shared images rom zrc zzrcc

 doc:
 	$(MAKE) --directory Doc $(ACTION)
@@ -67,8 +67,8 @@ rom:
 zrc:
 	$(MAKE) --directory ZRC $(ACTION)

-zzrc:
-	$(MAKE) --directory ZZRC $(ACTION)
+zzrcc:
+	$(MAKE) --directory ZZRCC $(ACTION)


 clean: ACTION=clean
--- a/Source/RomDsk/RAM_1024KB/CLRDIR.COM
+++ b/Source/RomDsk/RAM_1024KB/CLRDIR.COM
--- a/Source/RomDsk/RAM_512KB/CLRDIR.COM
+++ b/Source/RomDsk/RAM_512KB/CLRDIR.COM
--- a/Source/RomDsk/ROM_1024KB/CLRDIR.COM
+++ b/Source/RomDsk/ROM_1024KB/CLRDIR.COM
--- a/Source/RomDsk/ROM_256KB/CLRDIR.COM
+++ b/Source/RomDsk/ROM_256KB/CLRDIR.COM
--- a/Source/RomDsk/ROM_512KB/CLRDIR.COM
+++ b/Source/RomDsk/ROM_512KB/CLRDIR.COM
--- a/Source/ZRC/Bank
+++ b/Source/ZRC/Bank
@@ -0,0 +1,41 @@
+ZRC has no real ROM.  It has a single 2048K RAM chip.  There
+are two startup modes supported by RomWBW.
+
+The normal startup mode treats the first 512KB like ROM and the
+remaining 1536KB as RAM.  The first 512KB (pseudo-ROM) must be preloaded
+by the ZRC CF Loader.  This mode simulates a normal ROM-based RomWBW
+startup.
+
+Bank		Contents	Description
+----		--------	-----------
+0x0		BOOT		Boot Bank (HBIOS image)		+
+0x1		IMG0		ROM Loader, Monitor, ROM OSes	|
+0x2		IMG1		ROM Applications		| Pseudo-ROM
+0x3		IMG2		Reserved			|
+0x4-0xF		ROMD		ROM Disk Banks			+
+0x10		BIOS		HBIOS Bank (operating)
+0x11-0x3B	RAMD		RAM Disk Banks
+0x3C		BUF		OS Buffers (CP/M3)
+0x3D		AUX		Aux Bank (CP/M 3, BPBIOS, etc.)
+0x3E		USR		User Bank (CP/M TPA, etc.)
+0x3F		COM		Common Bank, Upper 32KB
+
+The ROMless startup mode treats the entire 2048KB as RAM.  However, in
+this mode, only the first 512KB of RAM is utilized.  This is because
+the RAM Disk is seeded by the CF Loader which is currently constrained
+to loading 512KB.  The entire 512KB of RAM (less the top 32KB) must be
+preloaded by the ZRC CF Loader.  There will be no ROM disk available
+under RomWBW.  There will be a RAM Disk and it's initial contents will
+be seeded by the image loaded by the CF Loader.
+
+Bank		Contents	Description
+--------	--------	-----------
+0x0		BIOS		HBIOS Bank (operating)
+0x1		IMG0		ROM Loader, Monitor, ROM OSes
+0x2		IMG1		ROM Applications
+0x3		IMG2		Reserved
+0x4-0xB		RAMD		RAM Disk Banks
+0xC		BUF		OS Buffers (CP/M3)
+0xD		AUX		Aux Bank (CP/M 3, BPBIOS, etc.)
+0xE		USR		User Bank (CP/M TPA, etc.)
+0xF		COM		Common Bank, Upper 32KB
--- a/Source/ZRC/ZRC
+++ b/Source/ZRC/ZRC
@@ -1,19 +1,17 @@
-CF Boot Loader: Sector 0 (bytes 0-255)
-RomWBW Partition Table: Sector 0 (bytes 256-511)
-ZRC Monitor: Sectors 0xF8-0xFF (bytes 0x1F000-0x1FFFF)
-RomWBW: Sectors 0x120-0x51F (bytes 0x24000-0xA3FFF)
-Start of Slices (0x1E partition): Sector 0x800 (byte 0x100000)
+ZRC Disk Prefix Layout
+======================

-Start	Length	Description
-------	-------	---------------------------
-0x00000 0x00100	CF Boot Loader
-0x00100 0x00100	RomWBW Partition Table
-0x00200 0x1EE00	Filler
-0x1F000 0x01000	ZRC Monitor
-0x20000 0x04000	Filler
-0x24000 0x80000	RomWBW
-0xA4000 0x5C000	Filler
-0x100000: Start of slices (partition 0x1E)
+---- Bytes ----   --- Sectors ---
+Start   Length    Start   Length    Description
+------- -------   ------- -------   ---------------------------
+0x00000 0x00100   0       0.5       CF Boot Loader
+0x00100 0x00100   0.5     0.5       RomWBW Partition Table
+0x00200 0x1EE00   1       247       Unused
+0x1F000 0x01000   248     8         ZRC Monitor v0.7
+0x20000 0x04000   256     32        Unused
+0x24000 0x80000   288     1024      RomWBW
+0xA4000 0x5C000   1312    736       Unused  
+0x100000          2048              Start of slices (partition 0x1E)

 Notes
 -----
@@ -21,4 +19,7 @@ Notes
 - At startup CPLD ROM is mapped to Z80 CPU address space 0x0000-0x003F, CPU begins execution at 0x0000
 - CPLD ROM (CF bootstrap mode) reads CF Boot Loader (256B) from start of CF (MBR) to 0xB000 and runs it
 - CF Boot Loader reads ZRC Monitor (4KB) from sectors 0xF8-0xFF of CF to 0xB400 and runs it
- ZRC Monitor reads 512KB (RomWBW) from sectors 0x120-0x51F of CF into first 512KB of RAM
+- ZRC Monitor reads 512KB (RomWBW) from sectors 0x120-0x51F of CF into first 512KB of physical RAM
+- ZRC Monitor maps first 32KB of physical RAM to first 32KB of CPU RAM and starts execution at 0x0000
+
+-- WBW 2:30 PM 10/8/2023
--- a/Source/ZZRC/Bank
+++ b/Source/ZZRC/Bank
@@ -1,32 +0,0 @@
-ZZRCC has no real ROM.  It has a single 512K RAM chip.  The first
-256K of the RAM chip is loaded from the CF card.  This 256K is
-treated like ROM by RomWBW.  The remainder of the RAM (256K) is
-treated like RAM by RomWBW.
-
-Because of the memory constraints, notice that there is no RAM Disk,
-only a ROM disk.  If you perform a ROM boot to an OS, the A: drive
-will be the ROM disk and will not be writable.  Booting a ROM OS
-on this system is not typical since the system has a CF card by
-definition.
-
-Bank	ROM			RAM			RAM
----	---			---			---
-0	HBIOS (IMG)					
-1	ROMLDR+MON+CP/M2+ZSYS				
-2	FTH+BAS+TBAS+PLAY+USR				
-3	RESERVED					
-4	ROMDISK						
-5	ROMDISK						
-6	ROMDISK						
-7	ROMDISK						
-							
-8				BUF (CPM3)		BUF (CPM3)
-9				BUF (CPM3)		BUF (CPM3)
-A				BUF (CPM3)		BUF (CPM3)
-B				BUF (CPM3)		BUF (CPM3)
-C				AUX (CPM3)		TPA (CPM3)
-D				HBIOS (EXEC)		HBIOS (EXEC)
-E				TPA-LO			OS (CPM3)
-F				COMMON (TPA-HI)		COMMON (TPA-HI)
-
--WBW 6:40 PM 2/16/2022
--- a/Source/ZZRC/Build.cmd
+++ b/Source/ZZRC/Build.cmd
@@ -1,41 +0,0 @@
-:: @echo off
-setlocal
-
-set ROMFILE=..\..\Binary\RCZ280_zzrc.rom
-set ROMSIZE=262144
-
-set TOOLS=../../Tools
-
-set PATH=%TOOLS%\srecord;%PATH%
-
-if exist ..\..\Binary\RCZ280_zzrc.rom call :build_zzrc
-
-if exist ..\..\Binary\RCZ280_zzrc_ram.rom call :build_zzrc_ram
-
-goto :eof
-
-:build_zzrc
-
-srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
-srec_cat temp.dat -binary -exclude 0x0 0x100 zzrc_cfldr.bin -binary -o temp.dat -binary
-srec_cat temp.dat -binary -exclude 0x100 0x200 zzrc_ptbl.bin -binary -offset 0x100 -o temp.dat -binary
-srec_cat temp.dat -binary -exclude 0x1F000 0x20000 zzrc_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
-srec_cat temp.dat -binary -exclude 0x24000 0xA4000 ..\..\Binary\RCZ280_zzrc.rom -binary -offset 0x24000 -o temp.dat -binary
-move temp.dat ..\..\Binary\hd1k_zzrc_prefix.dat
-
-copy /b ..\..\Binary\hd1k_zzrc_prefix.dat + ..\..\Binary\hd1k_cpm22.img + ..\..\Binary\hd1k_zsdos.img + ..\..\Binary\hd1k_nzcom.img + ..\..\Binary\hd1k_cpm3.img + ..\..\Binary\hd1k_zpm3.img + ..\..\Binary\hd1k_ws4.img ..\..\Binary\hd1k_zzrc_combo.img || exit /b
-
-goto :eof
-
-:build_zzrc_ram
-
-srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
-srec_cat temp.dat -binary -exclude 0x0 0x100 zzrc_cfldr.bin -binary -o temp.dat -binary
-srec_cat temp.dat -binary -exclude 0x100 0x200 zzrc_ptbl.bin -binary -offset 0x100 -o temp.dat -binary
-srec_cat temp.dat -binary -exclude 0x1F000 0x20000 zzrc_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
-srec_cat temp.dat -binary -exclude 0x24000 0xA4000 ..\..\Binary\RCZ280_zzrc_ram.rom -binary -offset 0x24000 -o temp.dat -binary
-move temp.dat ..\..\Binary\hd1k_zzrc_ram_prefix.dat
-
-copy /b ..\..\Binary\hd1k_zzrc_ram_prefix.dat + ..\..\Binary\hd1k_cpm22.img + ..\..\Binary\hd1k_zsdos.img + ..\..\Binary\hd1k_nzcom.img + ..\..\Binary\hd1k_cpm3.img + ..\..\Binary\hd1k_zpm3.img + ..\..\Binary\hd1k_ws4.img ..\..\Binary\hd1k_zzrc_ram_combo.img || exit /b
-
-goto :eof
--- a/Source/ZZRC/Makefile
+++ b/Source/ZZRC/Makefile
@@ -1,48 +0,0 @@
-HD1KZZRCPREFIX = hd1k_zzrc_prefix.dat
-HD1KZZRCCOMBOIMG = hd1k_zzrc_combo.img
-HD1KZZRCRAMPREFIX = hd1k_zzrc_ram_prefix.dat
-HD1KZZRCRAMCOMBOIMG = hd1k_zzrc_ram_combo.img
-ZZRCROM = ../../Binary/RCZ280_zzrc.rom
-ZZRCRAMROM = ../../Binary/RCZ280_zzrc_ram.rom
-HD1KIMGS = ../../Binary/hd1k_cpm22.img ../../Binary/hd1k_zsdos.img ../../Binary/hd1k_nzcom.img \
-	../../Binary/hd1k_cpm3.img ../../Binary/hd1k_zpm3.img ../../Binary/hd1k_ws4.img
-
-OBJECTS :=
-
-ifneq ($(wildcard $(ZZRCROM)),)
-	OBJECTS += $(HD1KZZRCPREFIX) $(HD1KZZRCCOMBOIMG)
-endif
-
-ifneq ($(wildcard $(ZZRCRAMROM)),)
-	OBJECTS += $(HD1KZZRCRAMPREFIX) $(HD1KZZRCRAMCOMBOIMG)
-endif
-
-DEST=../../Binary
-
-TOOLS = ../../Tools
-
-include $(TOOLS)/Makefile.inc
-
-DIFFPATH = $(DIFFTO)/Binary
-
-$(HD1KZZRCPREFIX):
-	srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
-	srec_cat temp.dat -binary -exclude 0x0 0x100 zzrc_cfldr.bin -binary -o temp.dat -binary
-	srec_cat temp.dat -binary -exclude 0x100 0x200 zzrc_ptbl.bin -binary -offset 0x100 -o temp.dat -binary
-	srec_cat temp.dat -binary -exclude 0x1F000 0x20000 zzrc_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
-	srec_cat temp.dat -binary -exclude 0x24000 0xA4000 $(ZZRCROM) -binary -offset 0x24000 -o temp.dat -binary
-	mv temp.dat $@
-
-$(HD1KZZRCRAMPREFIX):
-	srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
-	srec_cat temp.dat -binary -exclude 0x0 0x100 zzrc_cfldr.bin -binary -o temp.dat -binary
-	srec_cat temp.dat -binary -exclude 0x100 0x200 zzrc_ptbl.bin -binary -offset 0x100 -o temp.dat -binary
-	srec_cat temp.dat -binary -exclude 0x1F000 0x20000 zzrc_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
-	srec_cat temp.dat -binary -exclude 0x24000 0xA4000 $(ZZRCRAMROM) -binary -offset 0x24000 -o temp.dat -binary
-	mv temp.dat $@
-
-$(HD1KZZRCCOMBOIMG): $(HD1KZZRCPREFIX) $(HD1KIMGS)
-	cat $^ > $@
-
-$(HD1KZZRCRAMCOMBOIMG): $(HD1KZZRCRAMPREFIX) $(HD1KIMGS)
-	cat $^ > $@
--- a/Source/ZZRC/ZZRC
+++ b/Source/ZZRC/ZZRC
@@ -1,31 +0,0 @@
-Start   Length  Sector  Count   Description
------- ------- ------- ------- -----------------------------------------
-0x00000 0x00100 0x000   0x001   CF Boot Loader (first 256 bytes)
-0x00100 0x00100 0x000   0x001   RomWBW Partition Table (last 256 bytes)
-0x00200 0x1EE00 0x001   0x0F7   Filler
-0x1F000 0x01000 0x0F8   0x008   ZZRCC Monitor / RomWBW Loader
-0x20000 0x04000 0x100   0x020   Filler
-0x24000 0x40000 0x120   0x200   RomWBW (256KB ROM image)
-0x64000 0x9C000 0x320   0x4E0   Filler
-0x100000        0x800           Slices
-
-Notes
-----
-
- At startup CPLD ROM is mapped to Z80 CPU address space 0x0000-0x003F, CPU begins execution at 0x0000
- CPLD ROM (CF bootstrap mode) loads CF Boot Loader (256B) to 0xB000 and runs it
- CF Boot Loader loads ZZRCC Monitor to 0xB000 and runs it starting at address 0xB400
- Monitor (Boot RomWBW) loads RomWBW ROM image to first 8 banks of RAM, then runs it starting at address 0x000
-
-Possible alternative layout:
-
-Start   Length  Sector  Count   Description
------- ------- ------- ------- -----------------------------------------
-0x00000 0x00100 0       1       CF Boot Loader (first 256 bytes)
-0x00100 0x00100 0       1       RomWBW Partition Table (last 256 bytes)
-0x00200 0x01000 0x001   0x008   ZZRCC Monitor / RomWBW Loader
-0x01200 0x7EE00 0x009   0x3F7   Filler
-0x80000 0x40000 0x400   0x200   RomWBW (256KB ROM image)
-0xC0000 0x40000 0x600   0x200   Filler
-0x100000        0x800           Slices (0x1E partition start)
-
--- a/Source/ZZRCC/Bank
+++ b/Source/ZZRCC/Bank
@@ -0,0 +1,39 @@
+ZZRCC has no real ROM.  It has a single 512K RAM chip.  There
+are two startup modes supported by RomWBW.
+
+The normal startup mode treats the first 256KB like ROM and the second 
+256KB as RAM.  The first 256KB (pseudo-ROM) must be preloaded by the 
+ZZRCC CF Loader.  This mode simulates a normal ROM-based RomWBW
+startup.
+
+Bank		Contents	Description
+----		--------	-----------
+0x0		BOOT		Boot Bank (HBIOS image)		+
+0x1		IMG0		ROM Loader, Monitor, ROM OSes	|
+0x2		IMG1		ROM Applications		| Pseudo-ROM
+0x3		IMG2		Reserved			|
+0x4-0x7		ROMD		ROM Disk Banks			+
+0x8		BIOS		HBIOS Bank (operating)
+0x9-0xB		RAMD		RAM Disk Banks
+0xC		BUF		OS Buffers (CP/M3)
+0xD		AUX		Aux Bank (CP/M 3, BPBIOS, etc.)
+0xE		USR		User Bank (CP/M TPA, etc.)
+0xF		COM		Common Bank, Upper 32KB
+
+The ROMless startup mode treats the entire 512KB as RAM.  The entire
+512KB of RAM (less the top 32KB) must be preloaded by the ZZRCC CF
+Loader.  There will be no ROM disk available under RomWBW.  There
+will be a RAM Disk and it's initial contents will be seeded by the
+image loaded by the CF Loader.
+
+Bank		Contents	Description
+--------	--------	-----------
+0x0		BIOS		HBIOS Bank (operating)
+0x1		IMG0		ROM Loader, Monitor, ROM OSes
+0x2		IMG1		ROM Applications
+0x3		IMG2		Reserved
+0x4-0xB		RAMD		RAM Disk Banks
+0xC		BUF		OS Buffers (CP/M3)
+0xD		AUX		Aux Bank (CP/M 3, BPBIOS, etc.)
+0xE		USR		User Bank (CP/M TPA, etc.)
+0xF		COM		Common Bank, Upper 32KB
--- a/Source/ZZRCC/Build.cmd
+++ b/Source/ZZRCC/Build.cmd
@@ -0,0 +1,41 @@
+:: @echo off
+setlocal
+
+set ROMFILE=..\..\Binary\RCZ280_zzrcc.rom
+set ROMSIZE=262144
+
+set TOOLS=../../Tools
+
+set PATH=%TOOLS%\srecord;%PATH%
+
+if exist ..\..\Binary\RCZ280_zzrcc.rom call :build_zzrcc
+
+if exist ..\..\Binary\RCZ280_zzrcc_ram.rom call :build_zzrcc_ram
+
+goto :eof
+
+:build_zzrcc
+
+srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
+srec_cat temp.dat -binary -exclude 0x0 0x100 zzrcc_cfldr.bin -binary -o temp.dat -binary
+srec_cat temp.dat -binary -exclude 0x100 0x200 zzrcc_ptbl.bin -binary -offset 0x100 -o temp.dat -binary
+srec_cat temp.dat -binary -exclude 0x1F000 0x20000 zzrcc_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
+srec_cat temp.dat -binary -exclude 0x24000 0xA4000 ..\..\Binary\RCZ280_zzrcc.rom -binary -offset 0x24000 -o temp.dat -binary
+move temp.dat ..\..\Binary\hd1k_zzrcc_prefix.dat
+
+copy /b ..\..\Binary\hd1k_zzrcc_prefix.dat + ..\..\Binary\hd1k_cpm22.img + ..\..\Binary\hd1k_zsdos.img + ..\..\Binary\hd1k_nzcom.img + ..\..\Binary\hd1k_cpm3.img + ..\..\Binary\hd1k_zpm3.img + ..\..\Binary\hd1k_ws4.img ..\..\Binary\hd1k_zzrcc_combo.img || exit /b
+
+goto :eof
+
+:build_zzrcc_ram
+
+srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
+srec_cat temp.dat -binary -exclude 0x0 0x100 zzrcc_cfldr.bin -binary -o temp.dat -binary
+srec_cat temp.dat -binary -exclude 0x100 0x200 zzrcc_ptbl.bin -binary -offset 0x100 -o temp.dat -binary
+srec_cat temp.dat -binary -exclude 0x1F000 0x20000 zzrcc_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
+srec_cat temp.dat -binary -exclude 0x24000 0xA4000 ..\..\Binary\RCZ280_zzrcc_ram.rom -binary -offset 0x24000 -o temp.dat -binary
+move temp.dat ..\..\Binary\hd1k_zzrcc_ram_prefix.dat
+
+copy /b ..\..\Binary\hd1k_zzrcc_ram_prefix.dat + ..\..\Binary\hd1k_cpm22.img + ..\..\Binary\hd1k_zsdos.img + ..\..\Binary\hd1k_nzcom.img + ..\..\Binary\hd1k_cpm3.img + ..\..\Binary\hd1k_zpm3.img + ..\..\Binary\hd1k_ws4.img ..\..\Binary\hd1k_zzrcc_ram_combo.img || exit /b
+
+goto :eof
--- a/Source/ZZRCC/Clean.cmd
+++ b/Source/ZZRCC/Clean.cmd
--- a/Source/ZZRCC/Makefile
+++ b/Source/ZZRCC/Makefile
@@ -0,0 +1,48 @@
+HD1KZZRCCPREFIX = hd1k_zzrcc_prefix.dat
+HD1KZZRCCCOMBOIMG = hd1k_zzrcc_combo.img
+HD1KZZRCCRAMPREFIX = hd1k_zzrcc_ram_prefix.dat
+HD1KZZRCCRAMCOMBOIMG = hd1k_zzrcc_ram_combo.img
+ZZRCCROM = ../../Binary/RCZ280_zzrcc.rom
+ZZRCCRAMROM = ../../Binary/RCZ280_zzrcc_ram.rom
+HD1KIMGS = ../../Binary/hd1k_cpm22.img ../../Binary/hd1k_zsdos.img ../../Binary/hd1k_nzcom.img \
+	../../Binary/hd1k_cpm3.img ../../Binary/hd1k_zpm3.img ../../Binary/hd1k_ws4.img
+
+OBJECTS :=
+
+ifneq ($(wildcard $(ZZRCCROM)),)
+	OBJECTS += $(HD1KZZRCCPREFIX) $(HD1KZZRCCCOMBOIMG)
+endif
+
+ifneq ($(wildcard $(ZZRCCRAMROM)),)
+	OBJECTS += $(HD1KZZRCCRAMPREFIX) $(HD1KZZRCCRAMCOMBOIMG)
+endif
+
+DEST=../../Binary
+
+TOOLS = ../../Tools
+
+include $(TOOLS)/Makefile.inc
+
+DIFFPATH = $(DIFFTO)/Binary
+
+$(HD1KZZRCCPREFIX):
+	srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
+	srec_cat temp.dat -binary -exclude 0x0 0x100 zzrcc_cfldr.bin -binary -o temp.dat -binary
+	srec_cat temp.dat -binary -exclude 0x100 0x200 zzrcc_ptbl.bin -binary -offset 0x100 -o temp.dat -binary
+	srec_cat temp.dat -binary -exclude 0x1F000 0x20000 zzrcc_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
+	srec_cat temp.dat -binary -exclude 0x24000 0xA4000 $(ZZRCCROM) -binary -offset 0x24000 -o temp.dat -binary
+	mv temp.dat $@
+
+$(HD1KZZRCCRAMPREFIX):
+	srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
+	srec_cat temp.dat -binary -exclude 0x0 0x100 zzrcc_cfldr.bin -binary -o temp.dat -binary
+	srec_cat temp.dat -binary -exclude 0x100 0x200 zzrcc_ptbl.bin -binary -offset 0x100 -o temp.dat -binary
+	srec_cat temp.dat -binary -exclude 0x1F000 0x20000 zzrcc_mon.bin -binary -offset 0x1F000 -o temp.dat -binary
+	srec_cat temp.dat -binary -exclude 0x24000 0xA4000 $(ZZRCCRAMROM) -binary -offset 0x24000 -o temp.dat -binary
+	mv temp.dat $@
+
+$(HD1KZZRCCCOMBOIMG): $(HD1KZZRCCPREFIX) $(HD1KIMGS)
+	cat $^ > $@
+
+$(HD1KZZRCCRAMCOMBOIMG): $(HD1KZZRCCRAMPREFIX) $(HD1KIMGS)
+	cat $^ > $@
--- a/Source/ZZRCC/ZZRCC
+++ b/Source/ZZRCC/ZZRCC
@@ -0,0 +1,25 @@
+ZZRCC Disk Prefix Layout
+========================
+
+---- Bytes ----   --- Sectors ---
+Start   Length    Start   Length    Description
+------- -------   ------- -------   ---------------------------
+0x00000 0x00100   0       0.5       CF Boot Loader
+0x00100 0x00100   0.5     0.5       RomWBW Partition Table
+0x00200 0x1EE00   1       247       Unused
+0x1F000 0x01000   248     8         ZZRCC Monitor v0.5
+0x20000 0x04000   256     32        Unused
+0x24000 0x80000   288     1024      RomWBW
+0xA4000 0x5C000   1312    736       Unused  
+0x100000          2048              Start of slices (partition 0x1E)
+
+Notes
+-----
+
+- At startup CPLD ROM is mapped to Z280 CPU address space 0x0000-0x003F, CPU begins execution at 0x0000
+- CPLD ROM (CF bootstrap mode) reads CF Boot Loader (256B) from start of CF (MBR) to 0xB000 and runs it
+- CF Boot Loader reads ZZRCC Monitor (4KB) from sectors 0xF8-0xFF of CF to 0xB400 and runs it
+- ZZRCC Monitor reads 512KB (RomWBW) from sectors 0x120-0x51F of CF into first 512KB of physical RAM
+- ZZRCC Monitor maps first 32KB of physical RAM to first 32KB of CPU RAM and starts execution at 0x0000
+
+-WBW 2:36 PM 10/8/2023
--- a/Source/ZZRCC/zzrcc_cfldr.bin
+++ b/Source/ZZRCC/zzrcc_cfldr.bin
--- a/Source/ZZRCC/zzrcc_mon.bin
+++ b/Source/ZZRCC/zzrcc_mon.bin
--- a/Source/ZZRCC/zzrcc_ptbl.bin
+++ b/Source/ZZRCC/zzrcc_ptbl.bin
--- a/Source/ver.inc
+++ b/Source/ver.inc
@@ -2,7 +2,7 @@
 #DEFINE	RMN	4
 #DEFINE	RUP	0
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.4.0-dev.4"
+#DEFINE BIOSVER	"3.4.0-dev.5"
 #define rmj	RMJ
 #define rmn	RMN
 #define rup	RUP
--- a/Source/ver.lib
+++ b/Source/ver.lib
@@ -3,5 +3,5 @@ rmn	equ	4
 rup	equ	0
 rtp	equ	0
 biosver	macro
-	db	"3.4.0-dev.4"
+	db	"3.4.0-dev.5"
 	endm