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Support multiple devices in IDE driver

patch
Wayne Warthen 6 years ago
parent
0445b3547c
commit
382b5594f0
21 changed files with 755 additions and 415 deletions
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  1. 4
      Doc/ChangeLog.txt
  2. 1
      Source/HBIOS/Config/MK4_std.asm
  3. 1
      Source/HBIOS/Config/RCZ180_ext.asm
  4. 1
      Source/HBIOS/Config/RCZ180_nat.asm
  5. 1
      Source/HBIOS/Config/RCZ80_kio.asm
  6. 1
      Source/HBIOS/Config/RCZ80_std.asm
  7. 1
      Source/HBIOS/Config/SBC_std.asm
  8. 1
      Source/HBIOS/Config/SCZ180_126.asm
  9. 1
      Source/HBIOS/Config/SCZ180_130.asm
  10. 21
      Source/HBIOS/cfg_dyno.asm
  11. 21
      Source/HBIOS/cfg_ezz80.asm
  12. 21
      Source/HBIOS/cfg_master.asm
  13. 21
      Source/HBIOS/cfg_mk4.asm
  14. 21
      Source/HBIOS/cfg_n8.asm
  15. 21
      Source/HBIOS/cfg_rcz180.asm
  16. 21
      Source/HBIOS/cfg_rcz80.asm
  17. 21
      Source/HBIOS/cfg_sbc.asm
  18. 21
      Source/HBIOS/cfg_scz180.asm
  19. 878
      Source/HBIOS/ide.asm
  20. 85
      Source/HBIOS/ppide.asm
  21. 6
      Source/HBIOS/std.asm

4
Doc/ChangeLog.txt
View File

@ -43,6 +43,10 @@ Version 2.9.2
- PMS: Enhanced PPIDE driver to handle multiple PPI interfaces
- PMS: Added a ROM based game
- WBW: Only assign drive letters to hard disk devices with media
- WBW: Enhanced IDE driver to handle multiple IDE interfaces
- D?R: Contributed SC126 How-To: Preparing a MicroSD Card to Transfer Files to/from a Linux System
- PMS: Updated romldr to handle more than 9 drives
- PMS: Added "user" rom module template
Version 2.9.1
-------------

1
Source/HBIOS/Config/MK4_std.asm
View File

@ -38,7 +38,6 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_DIDE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .SET IDEMODE_MK4 ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;

1
Source/HBIOS/Config/RCZ180_ext.asm
View File

@ -41,6 +41,5 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

1
Source/HBIOS/Config/RCZ180_nat.asm
View File

@ -41,6 +41,5 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

1
Source/HBIOS/Config/RCZ80_kio.asm
View File

@ -47,6 +47,5 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

1
Source/HBIOS/Config/RCZ80_std.asm
View File

@ -34,6 +34,5 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

1
Source/HBIOS/Config/SBC_std.asm
View File

@ -34,7 +34,6 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_DIO3 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
;
IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .SET IDEMODE_DIO ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;

1
Source/HBIOS/Config/SCZ180_126.asm
View File

@ -41,7 +41,6 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;

1
Source/HBIOS/Config/SCZ180_130.asm
View File

@ -43,7 +43,6 @@ FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;

21
Source/HBIOS/cfg_dyno.asm
View File

@ -105,9 +105,26 @@ FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .EQU IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IDE8BIT .EQU TRUE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
IDE0MODE .EQU IDEMODE_RC ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE0BASE .EQU $10 ; IDE 0: IO BASE ADDRESS
IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O
IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O
IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER
IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER
IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS
IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O
IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O
IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER
IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER
IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS
IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O
IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O
IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER
IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER
;
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

21
Source/HBIOS/cfg_ezz80.asm
View File

@ -120,9 +120,26 @@ FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
IDEENABLE .EQU TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .EQU IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IDE8BIT .EQU TRUE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
IDE0MODE .EQU IDEMODE_RC ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE0BASE .EQU $10 ; IDE 0: IO BASE ADDRESS
IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O
IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O
IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER
IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER
IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS
IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O
IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O
IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER
IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER
IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS
IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O
IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O
IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER
IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER
;
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

21
Source/HBIOS/cfg_master.asm
View File

@ -164,9 +164,26 @@ RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
;
IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .EQU IDEMODE_NONE ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IDE8BIT .EQU FALSE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
IDE0MODE .EQU IDEMODE_NONE ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE0BASE .EQU $20 ; IDE 0: IO BASE ADDRESS
IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O
IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O
IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER
IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER
IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS
IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O
IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O
IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER
IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER
IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS
IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O
IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O
IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER
IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER
;
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

21
Source/HBIOS/cfg_mk4.asm
View File

@ -119,9 +119,26 @@ RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
;
IDEENABLE .EQU TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .EQU IDEMODE_MK4 ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IDE8BIT .EQU TRUE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
IDE0MODE .EQU IDEMODE_MK4 ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE0BASE .EQU $80 ; IDE 0: IO BASE ADDRESS
IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O
IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O
IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER
IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER
IDE1MODE .EQU IDEMODE_DIDE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE1BASE .EQU $20 ; IDE 1: IO BASE ADDRESS
IDE1DATLO .EQU $28 ; IDE 1: DATA LO PORT FOR 16-BIT I/O
IDE1DATHI .EQU $28 ; IDE 1: DATA HI PORT FOR 16-BIT I/O
IDE1A8BIT .EQU FALSE ; IDE 1A (MASTER): 8 BIT XFER
IDE1B8BIT .EQU FALSE ; IDE 1B (MASTER): 8 BIT XFER
IDE2MODE .EQU IDEMODE_DIDE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE2BASE .EQU $30 ; IDE 2: IO BASE ADDRESS
IDE2DATLO .EQU $38 ; IDE 2: DATA LO PORT FOR 16-BIT I/O
IDE2DATHI .EQU $38 ; IDE 2: DATA HI PORT FOR 16-BIT I/O
IDE2A8BIT .EQU FALSE ; IDE 2A (MASTER): 8 BIT XFER
IDE2B8BIT .EQU FALSE ; IDE 2B (MASTER): 8 BIT XFER
;
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

21
Source/HBIOS/cfg_n8.asm
View File

@ -122,9 +122,26 @@ RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
;
IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .EQU IDEMODE_DIO ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IDE8BIT .EQU FALSE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
IDE0MODE .EQU IDEMODE_DIO ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE0BASE .EQU $20 ; IDE 0: IO BASE ADDRESS
IDE0DATLO .EQU $20 ; IDE 0: DATA LO PORT FOR 16-BIT I/O
IDE0DATHI .EQU $28 ; IDE 0: DATA HI PORT FOR 16-BIT I/O
IDE0A8BIT .EQU FALSE ; IDE 0A (MASTER): 8 BIT XFER
IDE0B8BIT .EQU FALSE ; IDE 0B (MASTER): 8 BIT XFER
IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS
IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O
IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O
IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER
IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER
IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS
IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O
IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O
IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER
IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER
;
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

21
Source/HBIOS/cfg_rcz180.asm
View File

@ -125,9 +125,26 @@ FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .EQU IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IDE8BIT .EQU TRUE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
IDE0MODE .EQU IDEMODE_RC ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE0BASE .EQU $10 ; IDE 0: IO BASE ADDRESS
IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O
IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O
IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER
IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER
IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS
IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O
IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O
IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER
IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER
IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS
IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O
IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O
IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER
IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER
;
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

21
Source/HBIOS/cfg_rcz80.asm
View File

@ -129,9 +129,26 @@ FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .EQU IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IDE8BIT .EQU TRUE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
IDE0MODE .EQU IDEMODE_RC ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE0BASE .EQU $10 ; IDE 0: IO BASE ADDRESS
IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O
IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O
IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER
IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER
IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS
IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O
IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O
IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER
IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER
IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS
IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O
IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O
IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER
IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER
;
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

21
Source/HBIOS/cfg_sbc.asm
View File

@ -122,9 +122,26 @@ RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
;
IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .EQU IDEMODE_DIO ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IDE8BIT .EQU FALSE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
IDE0MODE .EQU IDEMODE_DIO ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE0BASE .EQU $20 ; IDE 0: IO BASE ADDRESS
IDE0DATLO .EQU $20 ; IDE 0: DATA LO PORT FOR 16-BIT I/O
IDE0DATHI .EQU $28 ; IDE 0: DATA HI PORT FOR 16-BIT I/O
IDE0A8BIT .EQU FALSE ; IDE 0A (MASTER): 8 BIT XFER
IDE0B8BIT .EQU FALSE ; IDE 0B (MASTER): 8 BIT XFER
IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS
IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O
IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O
IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER
IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER
IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS
IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O
IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O
IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER
IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER
;
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

21
Source/HBIOS/cfg_scz180.asm
View File

@ -120,9 +120,26 @@ FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDEMODE .EQU IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE]
IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IDE8BIT .EQU TRUE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY)
IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
IDE0MODE .EQU IDEMODE_RC ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE0BASE .EQU $10 ; IDE 0: IO BASE ADDRESS
IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O
IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O
IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER
IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER
IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS
IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O
IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O
IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER
IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER
IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS
IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O
IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O
IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER
IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER
;
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)

878
Source/HBIOS/ide.asm
View File

File diff suppressed because it is too large

85
Source/HBIOS/ppide.asm
View File

@ -4,8 +4,8 @@
;=============================================================================
;
; TODO:
; - IMPLEMENT INTELLIGENT RESET, CHECK IF DEVICE IS ACTUALLY BROKEN BEFORE RESET
; - FIX SCALER CONSTANT
; - GOPARTNER NEEDS TO HANDLE "NO PARTNER" CONDITION
;
; NOTES:
; - WELL KNOWN PPIDE PORT ADDRESSES:
@ -30,8 +30,8 @@ PPIDE_DIR_WRITE .EQU %10000000 ; IDE BUS DATA OUTPUT MODE
PPIDE_CTL_DA0 .EQU %00000001 ; DRIVE ADDRESS BUS - BIT 0 (DA0)
PPIDE_CTL_DA1 .EQU %00000010 ; DRIVE ADDRESS BUS - BIT 1 (DA1)
PPIDE_CTL_DA2 .EQU %00000100 ; DRIVE ADDRESS BUS - BIT 2 (DA2)
PPIDE_CTL_CS1FX .EQU %00001000 ; DRIVE CHIP SELECT 0 (ACTIVE LOW, INVERTED)
PPIDE_CTL_CS3FX .EQU %00010000 ; DRIVE CHIP SELECT 1 (ACTIVE LOW, INVERTED)
PPIDE_CTL_CS1 .EQU %00001000 ; DRIVE CHIP SELECT 0 (ACTIVE LOW, INVERTED)
PPIDE_CTL_CS3 .EQU %00010000 ; DRIVE CHIP SELECT 1 (ACTIVE LOW, INVERTED)
PPIDE_CTL_DIOW .EQU %00100000 ; DRIVE I/O WRITE (ACTIVE LOW, INVERTED)
PPIDE_CTL_DIOR .EQU %01000000 ; DRIVE I/O READ (ACTIVE LOW, INVERTED)
PPIDE_CTL_RESET .EQU %10000000 ; DRIVE RESET (ACTIVE LOW, INVERTED)
@ -66,7 +66,7 @@ PPIDE_CTL_RESET .EQU %10000000 ; DRIVE RESET (ACTIVE LOW, INVERTED)
; | PPIDE_REG_STAT | 0x07 | R | STATUS REGISTER |
; | PPIDE_REG_CMD | 0x07 | W | COMMAND REGISTER (EXECUTE) |
; +-----------------------+-------+-------+-------------------------------+
; * LBA0-4 ARE ALTERNATE DEFINITIONS OF SECT, CYL, AND DRVHD PORTS
; * LBA0-3 ARE ALTERNATE DEFINITIONS OF SECT, CYL, AND DRVHD PORTS
;
; === STATUS REGISTER ===
;
@ -122,33 +122,31 @@ PPIDE_CTL_RESET .EQU %10000000 ; DRIVE RESET (ACTIVE LOW, INVERTED)
; SRST: SOFTWARE RESET
; ~IEN: INTERRUPT ENABLE
;
; CONTROL VALUES TO USE WHEN ACCESSING THE VARIOUS IDE DEVICE REGISTERS
;
PPIDE_REG_DATA .EQU PPIDE_CTL_CS1FX | $00 ; DATA INPUT/OUTPUT (R/W)
PPIDE_REG_ERR .EQU PPIDE_CTL_CS1FX | $01 ; ERROR REGISTER (R)
PPIDE_REG_FEAT .EQU PPIDE_CTL_CS1FX | $01 ; FEATURES REGISTER (W)
PPIDE_REG_COUNT .EQU PPIDE_CTL_CS1FX | $02 ; SECTOR COUNT REGISTER (R/W)
PPIDE_REG_SECT .EQU PPIDE_CTL_CS1FX | $03 ; SECTOR NUMBER REGISTER (R/W)
PPIDE_REG_CYLLO .EQU PPIDE_CTL_CS1FX | $04 ; CYLINDER NUM REGISTER (LSB) (R/W)
PPIDE_REG_CYLHI .EQU PPIDE_CTL_CS1FX | $05 ; CYLINDER NUM REGISTER (MSB) (R/W)
PPIDE_REG_DRVHD .EQU PPIDE_CTL_CS1FX | $06 ; DRIVE/HEAD REGISTER (R/W)
PPIDE_REG_LBA0 .EQU PPIDE_CTL_CS1FX | $03 ; LBA BYTE 0 (BITS 0-7) (R/W)
PPIDE_REG_LBA1 .EQU PPIDE_CTL_CS1FX | $04 ; LBA BYTE 1 (BITS 8-15) (R/W)
PPIDE_REG_LBA2 .EQU PPIDE_CTL_CS1FX | $05 ; LBA BYTE 2 (BITS 16-23) (R/W)
PPIDE_REG_LBA3 .EQU PPIDE_CTL_CS1FX | $06 ; LBA BYTE 3 (BITS 24-27) (R/W)
PPIDE_REG_STAT .EQU PPIDE_CTL_CS1FX | $07 ; STATUS REGISTER (R)
PPIDE_REG_CMD .EQU PPIDE_CTL_CS1FX | $07 ; COMMAND REGISTER (EXECUTE) (W)
PPIDE_REG_ALTSTAT .EQU PPIDE_CTL_CS3FX | $06 ; ALTERNATE STATUS REGISTER (R)
PPIDE_REG_CTRL .EQU PPIDE_CTL_CS3FX | $06 ; DEVICE CONTROL REGISTER (W)
PPIDE_REG_DRVADR .EQU PPIDE_CTL_CS3FX | $07 ; DRIVE ADDRESS REGISTER (R)
;
#IF (PPIDETRACE >= 3)
#DEFINE DCALL CALL
#ELSE
#DEFINE DCALL \;
#ENDIF
;
PPIDE_DEVCNT .EQU PPIDECNT * 2 ; ASSUME ONLY PRIMARY INTERFACE
; CONTROL VALUES TO USE WHEN ACCESSING THE VARIOUS IDE DEVICE REGISTERS
;
PPIDE_REG_DATA .EQU PPIDE_CTL_CS1 | $00 ; DATA INPUT/OUTPUT (R/W)
PPIDE_REG_ERR .EQU PPIDE_CTL_CS1 | $01 ; ERROR REGISTER (R)
PPIDE_REG_FEAT .EQU PPIDE_CTL_CS1 | $01 ; FEATURES REGISTER (W)
PPIDE_REG_COUNT .EQU PPIDE_CTL_CS1 | $02 ; SECTOR COUNT REGISTER (R/W)
PPIDE_REG_SECT .EQU PPIDE_CTL_CS1 | $03 ; SECTOR NUMBER REGISTER (R/W)
PPIDE_REG_CYLLO .EQU PPIDE_CTL_CS1 | $04 ; CYLINDER NUM REGISTER (LSB) (R/W)
PPIDE_REG_CYLHI .EQU PPIDE_CTL_CS1 | $05 ; CYLINDER NUM REGISTER (MSB) (R/W)
PPIDE_REG_DRVHD .EQU PPIDE_CTL_CS1 | $06 ; DRIVE/HEAD REGISTER (R/W)
PPIDE_REG_LBA0 .EQU PPIDE_CTL_CS1 | $03 ; LBA BYTE 0 (BITS 0-7) (R/W)
PPIDE_REG_LBA1 .EQU PPIDE_CTL_CS1 | $04 ; LBA BYTE 1 (BITS 8-15) (R/W)
PPIDE_REG_LBA2 .EQU PPIDE_CTL_CS1 | $05 ; LBA BYTE 2 (BITS 16-23) (R/W)
PPIDE_REG_LBA3 .EQU PPIDE_CTL_CS1 | $06 ; LBA BYTE 3 (BITS 24-27) (R/W)
PPIDE_REG_STAT .EQU PPIDE_CTL_CS1 | $07 ; STATUS REGISTER (R)
PPIDE_REG_CMD .EQU PPIDE_CTL_CS1 | $07 ; COMMAND REGISTER (EXECUTE) (W)
PPIDE_REG_ALTSTAT .EQU PPIDE_CTL_CS3 | $06 ; ALTERNATE STATUS REGISTER (R)
PPIDE_REG_CTRL .EQU PPIDE_CTL_CS3 | $06 ; DEVICE CONTROL REGISTER (W)
PPIDE_REG_DRVADR .EQU PPIDE_CTL_CS3 | $07 ; DRIVE ADDRESS REGISTER (R)
;
; COMMAND BYTES
;
@ -202,7 +200,7 @@ PPIDE_LBA .EQU 9 ; OFFSET OF LBA (DWORD)
PPIDE_DATALO .EQU 13 ; BASE PORT AND IDE DATA BUS LSB (8255 PORT A) (BYTE)
PPIDE_CTL .EQU 14 ; IDE ADDRESS BUS AND CONTROL SIGNALS (8255 PORT C)(BYTE)
PPIDE_PPI .EQU 15 ; 8255 CONTROL PORT(BYTE)
PPIDE_PARTNER .EQU 16 ; PARTNER DEVICE (MASTER <-> SLAVE)
PPIDE_PARTNER .EQU 16 ; PARTNER DEVICE (MASTER <-> SLAVE) (WORD)
;
PPIDE_ACC_MAS .EQU %00000001 ; UNIT IS MASTER (ELSE SLAVE)
PPIDE_ACC_8BIT .EQU %00000010 ; UNIT WANTS 8 BIT I/O (ELSE 16 BIT)
@ -210,6 +208,8 @@ PPIDE_ACC_8BIT .EQU %00000010 ; UNIT WANTS 8 BIT I/O (ELSE 16 BIT)
PPIDE_MED_CF .EQU %00000001 ; MEDIA IS CF CARD
PPIDE_MED_LBA .EQU %00000010 ; MEDIA HAS LBA CAPABILITY
;
PPIDE_DEVCNT .EQU PPIDECNT * 2
;
PPIDE_CFGTBL:
;
#IF (PPIDECNT >= 1)
@ -722,7 +722,6 @@ PPIDE_WRSEC:
;
;
PPIDE_SETADDR:
; XXX
; SEND 3 LOWEST BYTES OF LBA IN REVERSE ORDER
; IDE_IO_LBA3 HAS ALREADY BEEN SET
; HSTLBA2-0 --> IDE_IO_LBA2-0
@ -731,19 +730,19 @@ PPIDE_SETADDR:
DCALL PRTHEXBYTE
CALL PPIDE_OUT
.DB PPIDE_REG_LBA2
;
LD A,(IY+PPIDE_LBA+1)
DCALL PC_SPACE
DCALL PRTHEXBYTE
CALL PPIDE_OUT
.DB PPIDE_REG_LBA1
;
LD A,(IY+PPIDE_LBA+0)
DCALL PC_SPACE
DCALL PRTHEXBYTE
CALL PPIDE_OUT
.DB PPIDE_REG_LBA0
;
LD A,1
DCALL PC_SPACE
DCALL PRTHEXBYTE
@ -1000,7 +999,9 @@ PPIDE_RESET:
CALL PPIDE_GOPARTNER ; POINT TO SLAVE
CALL PPIDE_INITUNIT ; INIT PARTNER UNIT
POP IY ; RECOVER ORIG CFG PTR
RET
;
XOR A ; SIGNAL SUCCESS
RET ; AND DONE
;
;
;
@ -1015,9 +1016,7 @@ PPIDE_INITUNIT:
RET NZ ; JUST RETURN IF NOTHING THERE
CALL PPIDE_INITDEV ; IF FOUND, ATTEMPT TO INIT DEVICE
RET NZ ; IF FAILED, ALL DONE
RET
RET ; DONE
;
; TAKE ANY ACTIONS REQUIRED TO SELECT DESIRED PHYSICAL UNIT
;
@ -1026,15 +1025,15 @@ PPIDE_SELUNIT:
CALL PPIDE_PRTPREFIX
PRTS(" SELUNIT$")
#ENDIF
BIT 0,(IY+PPIDE_ACC) ; MASTER?
JR Z,PPIDE_SELUNIT1 ; HANDLE SLAVE
LD A,PPIDE_DRVMASTER ; MASTER
JR PPIDE_SELUNIT2
PPIDE_SELUNIT1:
LD A,PPIDE_DRVSLAVE ; SLAVE
PPIDE_SELUNIT2:
LD (PPIDE_DRVHD),A ; SAVE IT
XOR A ; SUCCESS
BIT 0,(IY+PPIDE_ACC) ; MASTER?
JR Z,PPIDE_SELUNIT1 ; HANDLE SLAVE
LD A,PPIDE_DRVMASTER ; MASTER
JR PPIDE_SELUNIT2
PPIDE_SELUNIT1:
LD A,PPIDE_DRVSLAVE ; SLAVE
PPIDE_SELUNIT2:
LD (PPIDE_DRVHD),A ; SAVE IT
XOR A ; SUCCESS
RET
;
;

6
Source/HBIOS/std.asm
View File

@ -151,10 +151,8 @@ FDMODE_DYNO .EQU 9 ; DYNO WDC 37C65 @ $84
IDEMODE_NONE .EQU 0
IDEMODE_DIO .EQU 1 ; DISKIO V1
IDEMODE_DIDE .EQU 2 ; DUAL IDE
IDEMODE_MK4 .EQU 3 ; MARK IV ONBOARD IDE (8 BIT)
IDEMODE_RC .EQU 4 ; RC2014 CF MODULE (8 BIT) @ $10 (SPENCER OWEN)
IDEMODE_SMB .EQU 5 ; RC2014 IDE MODULE (8 BIT) @ $E0 (SCOTT BAKER)
IDEMODE_DYNO .EQU 6 ; DYNO IDE MODULE (8 BIT) @4A
IDEMODE_MK4 .EQU 3 ; MARK IV ONBOARD IDE (8 BIT ONLY)
IDEMODE_RC .EQU 4 ; RC2014 CF MODULE (8 BIT ONLY)
;
; PPIDE MODE SELECTIONS
;

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